Lines Matching full:cannot
302 dev_err(dev, "cannot enable regulators\n"); in qcom_pcie_init_2_1_0()
308 dev_err(dev, "cannot assert ahb reset\n"); in qcom_pcie_init_2_1_0()
314 dev_err(dev, "cannot prepare/enable iface clock\n"); in qcom_pcie_init_2_1_0()
320 dev_err(dev, "cannot prepare/enable phy clock\n"); in qcom_pcie_init_2_1_0()
326 dev_err(dev, "cannot prepare/enable core clock\n"); in qcom_pcie_init_2_1_0()
332 dev_err(dev, "cannot deassert ahb reset\n"); in qcom_pcie_init_2_1_0()
368 dev_err(dev, "cannot deassert phy reset\n"); in qcom_pcie_init_2_1_0()
374 dev_err(dev, "cannot deassert pci reset\n"); in qcom_pcie_init_2_1_0()
380 dev_err(dev, "cannot deassert por reset\n"); in qcom_pcie_init_2_1_0()
386 dev_err(dev, "cannot deassert axi reset\n"); in qcom_pcie_init_2_1_0()
465 dev_err(dev, "cannot deassert core reset\n"); in qcom_pcie_init_1_0_0()
471 dev_err(dev, "cannot prepare/enable aux clock\n"); in qcom_pcie_init_1_0_0()
477 dev_err(dev, "cannot prepare/enable iface clock\n"); in qcom_pcie_init_1_0_0()
483 dev_err(dev, "cannot prepare/enable master_bus clock\n"); in qcom_pcie_init_1_0_0()
489 dev_err(dev, "cannot prepare/enable slave_bus clock\n"); in qcom_pcie_init_1_0_0()
495 dev_err(dev, "cannot enable vdda regulator\n"); in qcom_pcie_init_1_0_0()
597 dev_err(dev, "cannot enable regulators\n"); in qcom_pcie_init_2_3_2()
603 dev_err(dev, "cannot prepare/enable aux clock\n"); in qcom_pcie_init_2_3_2()
609 dev_err(dev, "cannot prepare/enable cfg clock\n"); in qcom_pcie_init_2_3_2()
615 dev_err(dev, "cannot prepare/enable master clock\n"); in qcom_pcie_init_2_3_2()
621 dev_err(dev, "cannot prepare/enable slave clock\n"); in qcom_pcie_init_2_3_2()
670 dev_err(dev, "cannot prepare/enable pipe clock\n"); in qcom_pcie_post_init_2_3_2()
778 dev_err(dev, "cannot assert axi master reset\n"); in qcom_pcie_init_2_4_0()
784 dev_err(dev, "cannot assert axi slave reset\n"); in qcom_pcie_init_2_4_0()
792 dev_err(dev, "cannot assert pipe reset\n"); in qcom_pcie_init_2_4_0()
798 dev_err(dev, "cannot assert pipe sticky reset\n"); in qcom_pcie_init_2_4_0()
804 dev_err(dev, "cannot assert phy reset\n"); in qcom_pcie_init_2_4_0()
810 dev_err(dev, "cannot assert phy ahb reset\n"); in qcom_pcie_init_2_4_0()
818 dev_err(dev, "cannot assert axi master sticky reset\n"); in qcom_pcie_init_2_4_0()
824 dev_err(dev, "cannot assert power reset\n"); in qcom_pcie_init_2_4_0()
830 dev_err(dev, "cannot assert ahb reset\n"); in qcom_pcie_init_2_4_0()
838 dev_err(dev, "cannot deassert phy ahb reset\n"); in qcom_pcie_init_2_4_0()
844 dev_err(dev, "cannot deassert phy reset\n"); in qcom_pcie_init_2_4_0()
850 dev_err(dev, "cannot deassert pipe reset\n"); in qcom_pcie_init_2_4_0()
856 dev_err(dev, "cannot deassert pipe sticky reset\n"); in qcom_pcie_init_2_4_0()
864 dev_err(dev, "cannot deassert axi master reset\n"); in qcom_pcie_init_2_4_0()
870 dev_err(dev, "cannot deassert axi master sticky reset\n"); in qcom_pcie_init_2_4_0()
876 dev_err(dev, "cannot deassert axi slave reset\n"); in qcom_pcie_init_2_4_0()
882 dev_err(dev, "cannot deassert power reset\n"); in qcom_pcie_init_2_4_0()
888 dev_err(dev, "cannot deassert ahb reset\n"); in qcom_pcie_init_2_4_0()
896 dev_err(dev, "cannot prepare/enable iface clock\n"); in qcom_pcie_init_2_4_0()
902 dev_err(dev, "cannot prepare/enable core clock\n"); in qcom_pcie_init_2_4_0()
908 dev_err(dev, "cannot prepare/enable phy clock\n"); in qcom_pcie_init_2_4_0()
1045 dev_err(dev, "cannot prepare/enable core clock\n"); in qcom_pcie_init_2_3_3()
1051 dev_err(dev, "cannot prepare/enable core clock\n"); in qcom_pcie_init_2_3_3()
1057 dev_err(dev, "cannot prepare/enable axi slave clock\n"); in qcom_pcie_init_2_3_3()
1063 dev_err(dev, "cannot prepare/enable ahb clock\n"); in qcom_pcie_init_2_3_3()
1069 dev_err(dev, "cannot prepare/enable aux clock\n"); in qcom_pcie_init_2_3_3()
1329 dev_err(dev, "cannot initialize host\n"); in qcom_pcie_probe()