Lines Matching +full:ecam +full:- +full:based
1 // SPDX-License-Identifier: GPL-2.0+
3 * APM X-Gene PCIe Driver
20 #include <linux/pci-acpi.h>
21 #include <linux/pci-ecam.h>
77 return readl(port->csr_base + reg); in xgene_pcie_readl()
82 writel(val, port->csr_base + reg); in xgene_pcie_writel()
95 return (struct xgene_pcie_port *)(bus->sysdata); in pcie_bus_to_port()
97 cfg = bus->sysdata; in pcie_bus_to_port()
98 return (struct xgene_pcie_port *)(cfg->priv); in pcie_bus_to_port()
109 if (bus->number >= (bus->primary + 1)) in xgene_pcie_get_cfg_base()
110 return port->cfg_base + AXI_EP_CFG_ACCESS; in xgene_pcie_get_cfg_base()
112 return port->cfg_base; in xgene_pcie_get_cfg_base()
125 b = bus->number; in xgene_pcie_set_rtdid_reg()
138 * X-Gene PCIe port uses BAR0-BAR1 of RC's configuration space as
177 * Vendor and Device ID of a non-existent device, the controller in xgene_pcie_config_read32()
183 if (pci_is_root_bus(bus) && (port->version == XGENE_PCIE_IP_VER_1) && in xgene_pcie_config_read32()
188 *val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1); in xgene_pcie_config_read32()
198 struct device *dev = &adev->dev; in xgene_get_csr_resource()
217 return -EINVAL; in xgene_get_csr_resource()
221 *res = *entry->res; in xgene_get_csr_resource()
228 struct device *dev = cfg->parent; in xgene_pcie_ecam_init()
236 return -ENOMEM; in xgene_pcie_ecam_init()
243 port->csr_base = devm_pci_remap_cfg_resource(dev, &csr); in xgene_pcie_ecam_init()
244 if (IS_ERR(port->csr_base)) in xgene_pcie_ecam_init()
245 return PTR_ERR(port->csr_base); in xgene_pcie_ecam_init()
247 port->cfg_base = cfg->win; in xgene_pcie_ecam_init()
248 port->version = ipversion; in xgene_pcie_ecam_init()
250 cfg->priv = port; in xgene_pcie_ecam_init()
289 u64 mask = (~(size - 1) & PCI_BASE_ADDRESS_MEM_MASK) | flags; in xgene_pcie_set_ib_mask()
317 port->link_up = false; in xgene_pcie_linkup()
320 port->link_up = true; in xgene_pcie_linkup()
329 struct device *dev = port->dev; in xgene_pcie_init_port()
332 port->clk = clk_get(dev, NULL); in xgene_pcie_init_port()
333 if (IS_ERR(port->clk)) { in xgene_pcie_init_port()
335 return -ENODEV; in xgene_pcie_init_port()
338 rc = clk_prepare_enable(port->clk); in xgene_pcie_init_port()
350 struct device *dev = port->dev; in xgene_pcie_map_reg()
354 port->csr_base = devm_pci_remap_cfg_resource(dev, res); in xgene_pcie_map_reg()
355 if (IS_ERR(port->csr_base)) in xgene_pcie_map_reg()
356 return PTR_ERR(port->csr_base); in xgene_pcie_map_reg()
359 port->cfg_base = devm_ioremap_resource(dev, res); in xgene_pcie_map_reg()
360 if (IS_ERR(port->cfg_base)) in xgene_pcie_map_reg()
361 return PTR_ERR(port->cfg_base); in xgene_pcie_map_reg()
362 port->cfg_addr = res->start; in xgene_pcie_map_reg()
371 struct device *dev = port->dev; in xgene_pcie_setup_ob_reg()
386 mask = ~(size - 1) | flag; in xgene_pcie_setup_ob_reg()
401 u64 addr = port->cfg_addr; in xgene_pcie_setup_cfg_reg()
413 struct device *dev = port->dev; in xgene_pcie_map_ranges()
417 struct resource *res = window->res; in xgene_pcie_map_ranges()
425 res->start - window->offset); in xgene_pcie_map_ranges()
431 if (res->flags & IORESOURCE_PREFETCH) in xgene_pcie_map_ranges()
433 res->start, in xgene_pcie_map_ranges()
434 res->start - in xgene_pcie_map_ranges()
435 window->offset); in xgene_pcie_map_ranges()
438 res->start, in xgene_pcie_map_ranges()
439 res->start - in xgene_pcie_map_ranges()
440 window->offset); in xgene_pcie_map_ranges()
446 return -EINVAL; in xgene_pcie_map_ranges()
464 * X-Gene PCIe support maximum 3 inbound memory regions
465 * This function helps to select a region based on size of region
484 return -EINVAL; in xgene_pcie_select_ib_reg()
490 void __iomem *cfg_base = port->cfg_base; in xgene_pcie_setup_ib_reg()
491 struct device *dev = port->dev; in xgene_pcie_setup_ib_reg()
494 u64 cpu_addr = range->cpu_addr; in xgene_pcie_setup_ib_reg()
495 u64 pci_addr = range->pci_addr; in xgene_pcie_setup_ib_reg()
496 u64 size = range->size; in xgene_pcie_setup_ib_reg()
497 u64 mask = ~(size - 1) | EN_REG; in xgene_pcie_setup_ib_reg()
502 region = xgene_pcie_select_ib_reg(ib_reg_mask, range->size); in xgene_pcie_setup_ib_reg()
504 dev_warn(dev, "invalid pcie dma-range config\n"); in xgene_pcie_setup_ib_reg()
508 if (range->flags & IORESOURCE_PREFETCH) in xgene_pcie_setup_ib_reg()
534 xgene_pcie_setup_pims(port, pim_reg, pci_addr, ~(size - 1)); in xgene_pcie_setup_ib_reg()
539 struct device_node *np = port->node; in xgene_pcie_parse_map_dma_ranges()
542 struct device *dev = port->dev; in xgene_pcie_parse_map_dma_ranges()
546 dev_err(dev, "missing dma-ranges property\n"); in xgene_pcie_parse_map_dma_ranges()
547 return -EINVAL; in xgene_pcie_parse_map_dma_ranges()
550 /* Get the dma-ranges from DT */ in xgene_pcie_parse_map_dma_ranges()
552 u64 end = range.cpu_addr + range.size - 1; in xgene_pcie_parse_map_dma_ranges()
554 dev_dbg(dev, "0x%08x 0x%016llx..0x%016llx -> 0x%016llx\n", in xgene_pcie_parse_map_dma_ranges()
573 struct device *dev = port->dev; in xgene_pcie_setup()
592 if (!port->link_up) in xgene_pcie_setup()
595 dev_info(dev, "(rc) x%d gen-%d link up\n", lanes, speed + 1); in xgene_pcie_setup()
607 struct device *dev = &pdev->dev; in xgene_pcie_probe()
608 struct device_node *dn = dev->of_node; in xgene_pcie_probe()
618 return -ENOMEM; in xgene_pcie_probe()
622 port->node = of_node_get(dn); in xgene_pcie_probe()
623 port->dev = dev; in xgene_pcie_probe()
625 port->version = XGENE_PCIE_IP_VER_UNKN; in xgene_pcie_probe()
626 if (of_device_is_compatible(port->node, "apm,xgene-pcie")) in xgene_pcie_probe()
627 port->version = XGENE_PCIE_IP_VER_1; in xgene_pcie_probe()
650 list_splice_init(&res, &bridge->windows); in xgene_pcie_probe()
651 bridge->dev.parent = dev; in xgene_pcie_probe()
652 bridge->sysdata = port; in xgene_pcie_probe()
653 bridge->busnr = 0; in xgene_pcie_probe()
654 bridge->ops = &xgene_pcie_ops; in xgene_pcie_probe()
655 bridge->map_irq = of_irq_parse_and_map_pci; in xgene_pcie_probe()
656 bridge->swizzle_irq = pci_common_swizzle; in xgene_pcie_probe()
662 bus = bridge->bus; in xgene_pcie_probe()
665 list_for_each_entry(child, &bus->children, node) in xgene_pcie_probe()
676 {.compatible = "apm,xgene-pcie",},
682 .name = "xgene-pcie",