Lines Matching +full:aspm +full:- +full:no +full:- +full:l0s
1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
40 #include "pcie-rockchip.h"
75 if (bus->number == rockchip->root_bus_nr && dev > 0) in rockchip_pcie_valid_device()
82 if (bus->primary == rockchip->root_bus_nr && dev > 0) in rockchip_pcie_valid_device()
93 if (rockchip->legacy_phy) in rockchip_pcie_lane_map()
94 return GENMASK(MAX_LANE_NUM - 1, 0); in rockchip_pcie_lane_map()
99 /* The link may be using a reverse-indexed mapping. */ in rockchip_pcie_lane_map()
111 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + where; in rockchip_pcie_rd_own_conf()
138 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + offset; in rockchip_pcie_wr_own_conf()
145 mask = ~(((1 << (size * 8)) - 1) << ((where & 0x3) * 8)); in rockchip_pcie_wr_own_conf()
165 busdev = PCIE_ECAM_ADDR(bus->number, PCI_SLOT(devfn), in rockchip_pcie_rd_other_conf()
173 if (bus->parent->number == rockchip->root_bus_nr) in rockchip_pcie_rd_other_conf()
181 *val = readl(rockchip->reg_base + busdev); in rockchip_pcie_rd_other_conf()
183 *val = readw(rockchip->reg_base + busdev); in rockchip_pcie_rd_other_conf()
185 *val = readb(rockchip->reg_base + busdev); in rockchip_pcie_rd_other_conf()
199 busdev = PCIE_ECAM_ADDR(bus->number, PCI_SLOT(devfn), in rockchip_pcie_wr_other_conf()
204 if (bus->parent->number == rockchip->root_bus_nr) in rockchip_pcie_wr_other_conf()
212 writel(val, rockchip->reg_base + busdev); in rockchip_pcie_wr_other_conf()
214 writew(val, rockchip->reg_base + busdev); in rockchip_pcie_wr_other_conf()
216 writeb(val, rockchip->reg_base + busdev); in rockchip_pcie_wr_other_conf()
226 struct rockchip_pcie *rockchip = bus->sysdata; in rockchip_pcie_rd_conf()
233 if (bus->number == rockchip->root_bus_nr) in rockchip_pcie_rd_conf()
243 struct rockchip_pcie *rockchip = bus->sysdata; in rockchip_pcie_wr_conf()
248 if (bus->number == rockchip->root_bus_nr) in rockchip_pcie_wr_conf()
265 if (IS_ERR(rockchip->vpcie3v3)) in rockchip_pcie_set_power_limit()
274 curr = regulator_get_current_limit(rockchip->vpcie3v3); in rockchip_pcie_set_power_limit()
283 dev_warn(rockchip->dev, "invalid power supply\n"); in rockchip_pcie_set_power_limit()
286 scale--; in rockchip_pcie_set_power_limit()
297 * rockchip_pcie_host_init_port - Initialize hardware
302 struct device *dev = rockchip->dev; in rockchip_pcie_host_init_port()
306 gpiod_set_value_cansleep(rockchip->ep_gpio, 0); in rockchip_pcie_host_init_port()
312 /* Fix the transmitted FTS count desired to exit from L0s. */ in rockchip_pcie_host_init_port()
334 gpiod_set_value_cansleep(rockchip->ep_gpio, 1); in rockchip_pcie_host_init_port()
337 err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1, in rockchip_pcie_host_init_port()
345 if (rockchip->link_gen == 2) { in rockchip_pcie_host_init_port()
354 err = readl_poll_timeout(rockchip->apb_base + PCIE_CORE_CTRL, in rockchip_pcie_host_init_port()
368 rockchip->lanes_map = rockchip_pcie_lane_map(rockchip); in rockchip_pcie_host_init_port()
370 if (!(rockchip->lanes_map & BIT(i))) { in rockchip_pcie_host_init_port()
372 phy_power_off(rockchip->phys[i]); in rockchip_pcie_host_init_port()
387 /* Clear L0s from RC's link cap */ in rockchip_pcie_host_init_port()
388 if (of_property_read_bool(dev->of_node, "aspm-no-l0s")) { in rockchip_pcie_host_init_port()
401 while (i--) in rockchip_pcie_host_init_port()
402 phy_power_off(rockchip->phys[i]); in rockchip_pcie_host_init_port()
404 while (i--) in rockchip_pcie_host_init_port()
405 phy_exit(rockchip->phys[i]); in rockchip_pcie_host_init_port()
412 struct device *dev = rockchip->dev; in rockchip_pcie_subsys_irq_handler()
478 struct device *dev = rockchip->dev; in rockchip_pcie_client_irq_handler()
498 dev_dbg(dev, "no fatal error interrupt received\n"); in rockchip_pcie_client_irq_handler()
521 struct device *dev = rockchip->dev; in rockchip_pcie_legacy_int_handler()
532 hwirq = ffs(reg) - 1; in rockchip_pcie_legacy_int_handler()
535 virq = irq_find_mapping(rockchip->irq_domain, hwirq); in rockchip_pcie_legacy_int_handler()
548 struct device *dev = rockchip->dev; in rockchip_pcie_setup_irq()
558 IRQF_SHARED, "pcie-sys", rockchip); in rockchip_pcie_setup_irq()
581 IRQF_SHARED, "pcie-client", rockchip); in rockchip_pcie_setup_irq()
591 * rockchip_pcie_parse_host_dt - Parse Device Tree
598 struct device *dev = rockchip->dev; in rockchip_pcie_parse_host_dt()
609 rockchip->vpcie12v = devm_regulator_get_optional(dev, "vpcie12v"); in rockchip_pcie_parse_host_dt()
610 if (IS_ERR(rockchip->vpcie12v)) { in rockchip_pcie_parse_host_dt()
611 if (PTR_ERR(rockchip->vpcie12v) != -ENODEV) in rockchip_pcie_parse_host_dt()
612 return PTR_ERR(rockchip->vpcie12v); in rockchip_pcie_parse_host_dt()
613 dev_info(dev, "no vpcie12v regulator found\n"); in rockchip_pcie_parse_host_dt()
616 rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3"); in rockchip_pcie_parse_host_dt()
617 if (IS_ERR(rockchip->vpcie3v3)) { in rockchip_pcie_parse_host_dt()
618 if (PTR_ERR(rockchip->vpcie3v3) != -ENODEV) in rockchip_pcie_parse_host_dt()
619 return PTR_ERR(rockchip->vpcie3v3); in rockchip_pcie_parse_host_dt()
620 dev_info(dev, "no vpcie3v3 regulator found\n"); in rockchip_pcie_parse_host_dt()
623 rockchip->vpcie1v8 = devm_regulator_get_optional(dev, "vpcie1v8"); in rockchip_pcie_parse_host_dt()
624 if (IS_ERR(rockchip->vpcie1v8)) { in rockchip_pcie_parse_host_dt()
625 if (PTR_ERR(rockchip->vpcie1v8) != -ENODEV) in rockchip_pcie_parse_host_dt()
626 return PTR_ERR(rockchip->vpcie1v8); in rockchip_pcie_parse_host_dt()
627 dev_info(dev, "no vpcie1v8 regulator found\n"); in rockchip_pcie_parse_host_dt()
630 rockchip->vpcie0v9 = devm_regulator_get_optional(dev, "vpcie0v9"); in rockchip_pcie_parse_host_dt()
631 if (IS_ERR(rockchip->vpcie0v9)) { in rockchip_pcie_parse_host_dt()
632 if (PTR_ERR(rockchip->vpcie0v9) != -ENODEV) in rockchip_pcie_parse_host_dt()
633 return PTR_ERR(rockchip->vpcie0v9); in rockchip_pcie_parse_host_dt()
634 dev_info(dev, "no vpcie0v9 regulator found\n"); in rockchip_pcie_parse_host_dt()
642 struct device *dev = rockchip->dev; in rockchip_pcie_set_vpcie()
645 if (!IS_ERR(rockchip->vpcie12v)) { in rockchip_pcie_set_vpcie()
646 err = regulator_enable(rockchip->vpcie12v); in rockchip_pcie_set_vpcie()
653 if (!IS_ERR(rockchip->vpcie3v3)) { in rockchip_pcie_set_vpcie()
654 err = regulator_enable(rockchip->vpcie3v3); in rockchip_pcie_set_vpcie()
661 if (!IS_ERR(rockchip->vpcie1v8)) { in rockchip_pcie_set_vpcie()
662 err = regulator_enable(rockchip->vpcie1v8); in rockchip_pcie_set_vpcie()
669 if (!IS_ERR(rockchip->vpcie0v9)) { in rockchip_pcie_set_vpcie()
670 err = regulator_enable(rockchip->vpcie0v9); in rockchip_pcie_set_vpcie()
680 if (!IS_ERR(rockchip->vpcie1v8)) in rockchip_pcie_set_vpcie()
681 regulator_disable(rockchip->vpcie1v8); in rockchip_pcie_set_vpcie()
683 if (!IS_ERR(rockchip->vpcie3v3)) in rockchip_pcie_set_vpcie()
684 regulator_disable(rockchip->vpcie3v3); in rockchip_pcie_set_vpcie()
686 if (!IS_ERR(rockchip->vpcie12v)) in rockchip_pcie_set_vpcie()
687 regulator_disable(rockchip->vpcie12v); in rockchip_pcie_set_vpcie()
706 irq_set_chip_data(irq, domain->host_data); in rockchip_pcie_intx_map()
717 struct device *dev = rockchip->dev; in rockchip_pcie_init_irq_domain()
718 struct device_node *intc = of_get_next_child(dev->of_node, NULL); in rockchip_pcie_init_irq_domain()
721 dev_err(dev, "missing child interrupt-controller node\n"); in rockchip_pcie_init_irq_domain()
722 return -EINVAL; in rockchip_pcie_init_irq_domain()
725 rockchip->irq_domain = irq_domain_add_linear(intc, PCI_NUM_INTX, in rockchip_pcie_init_irq_domain()
727 if (!rockchip->irq_domain) { in rockchip_pcie_init_irq_domain()
729 return -EINVAL; in rockchip_pcie_init_irq_domain()
745 return -EINVAL; in rockchip_pcie_prog_ob_atu()
747 return -EINVAL; in rockchip_pcie_prog_ob_atu()
749 return -EINVAL; in rockchip_pcie_prog_ob_atu()
752 return -EINVAL; in rockchip_pcie_prog_ob_atu()
756 return -EINVAL; in rockchip_pcie_prog_ob_atu()
787 return -EINVAL; in rockchip_pcie_prog_ib_atu()
789 return -EINVAL; in rockchip_pcie_prog_ib_atu()
791 return -EINVAL; in rockchip_pcie_prog_ib_atu()
807 struct device *dev = rockchip->dev; in rockchip_pcie_cfg_atu()
815 for (reg_no = 0; reg_no < (rockchip->mem_size >> 20); reg_no++) { in rockchip_pcie_cfg_atu()
818 20 - 1, in rockchip_pcie_cfg_atu()
819 rockchip->mem_bus_addr + in rockchip_pcie_cfg_atu()
828 err = rockchip_pcie_prog_ib_atu(rockchip, 2, 32 - 1, 0x0, 0); in rockchip_pcie_cfg_atu()
834 offset = rockchip->mem_size >> 20; in rockchip_pcie_cfg_atu()
835 for (reg_no = 0; reg_no < (rockchip->io_size >> 20); reg_no++) { in rockchip_pcie_cfg_atu()
839 20 - 1, in rockchip_pcie_cfg_atu()
840 rockchip->io_bus_addr + in rockchip_pcie_cfg_atu()
852 20 - 1, 0, 0); in rockchip_pcie_cfg_atu()
854 rockchip->msg_bus_addr = rockchip->mem_bus_addr + in rockchip_pcie_cfg_atu()
865 writel(0x0, rockchip->msg_region + PCIE_RC_SEND_PME_OFF); in rockchip_pcie_wait_l2()
868 err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_DEBUG_OUT_0, in rockchip_pcie_wait_l2()
872 dev_err(rockchip->dev, "PCIe link enter L2 timeout!\n"); in rockchip_pcie_wait_l2()
899 if (!IS_ERR(rockchip->vpcie0v9)) in rockchip_pcie_suspend_noirq()
900 regulator_disable(rockchip->vpcie0v9); in rockchip_pcie_suspend_noirq()
910 if (!IS_ERR(rockchip->vpcie0v9)) { in rockchip_pcie_resume_noirq()
911 err = regulator_enable(rockchip->vpcie0v9); in rockchip_pcie_resume_noirq()
941 if (!IS_ERR(rockchip->vpcie0v9)) in rockchip_pcie_resume_noirq()
942 regulator_disable(rockchip->vpcie0v9); in rockchip_pcie_resume_noirq()
949 struct device *dev = &pdev->dev; in rockchip_pcie_probe()
960 if (!dev->of_node) in rockchip_pcie_probe()
961 return -ENODEV; in rockchip_pcie_probe()
965 return -ENOMEM; in rockchip_pcie_probe()
970 rockchip->dev = dev; in rockchip_pcie_probe()
971 rockchip->is_rc = true; in rockchip_pcie_probe()
1008 switch (resource_type(win->res)) { in rockchip_pcie_probe()
1010 io = win->res; in rockchip_pcie_probe()
1011 io->name = "I/O"; in rockchip_pcie_probe()
1012 rockchip->io_size = resource_size(io); in rockchip_pcie_probe()
1013 rockchip->io_bus_addr = io->start - win->offset; in rockchip_pcie_probe()
1020 rockchip->io = io; in rockchip_pcie_probe()
1023 mem = win->res; in rockchip_pcie_probe()
1024 mem->name = "MEM"; in rockchip_pcie_probe()
1025 rockchip->mem_size = resource_size(mem); in rockchip_pcie_probe()
1026 rockchip->mem_bus_addr = mem->start - win->offset; in rockchip_pcie_probe()
1029 rockchip->root_bus_nr = win->res->start; in rockchip_pcie_probe()
1040 rockchip->msg_region = devm_ioremap(dev, rockchip->msg_bus_addr, SZ_1M); in rockchip_pcie_probe()
1041 if (!rockchip->msg_region) { in rockchip_pcie_probe()
1042 err = -ENOMEM; in rockchip_pcie_probe()
1046 list_splice_init(&res, &bridge->windows); in rockchip_pcie_probe()
1047 bridge->dev.parent = dev; in rockchip_pcie_probe()
1048 bridge->sysdata = rockchip; in rockchip_pcie_probe()
1049 bridge->busnr = 0; in rockchip_pcie_probe()
1050 bridge->ops = &rockchip_pcie_ops; in rockchip_pcie_probe()
1051 bridge->map_irq = of_irq_parse_and_map_pci; in rockchip_pcie_probe()
1052 bridge->swizzle_irq = pci_common_swizzle; in rockchip_pcie_probe()
1058 bus = bridge->bus; in rockchip_pcie_probe()
1060 rockchip->root_bus = bus; in rockchip_pcie_probe()
1064 list_for_each_entry(child, &bus->children, node) in rockchip_pcie_probe()
1071 pci_unmap_iospace(rockchip->io); in rockchip_pcie_probe()
1075 irq_domain_remove(rockchip->irq_domain); in rockchip_pcie_probe()
1079 if (!IS_ERR(rockchip->vpcie12v)) in rockchip_pcie_probe()
1080 regulator_disable(rockchip->vpcie12v); in rockchip_pcie_probe()
1081 if (!IS_ERR(rockchip->vpcie3v3)) in rockchip_pcie_probe()
1082 regulator_disable(rockchip->vpcie3v3); in rockchip_pcie_probe()
1083 if (!IS_ERR(rockchip->vpcie1v8)) in rockchip_pcie_probe()
1084 regulator_disable(rockchip->vpcie1v8); in rockchip_pcie_probe()
1085 if (!IS_ERR(rockchip->vpcie0v9)) in rockchip_pcie_probe()
1086 regulator_disable(rockchip->vpcie0v9); in rockchip_pcie_probe()
1094 struct device *dev = &pdev->dev; in rockchip_pcie_remove()
1097 pci_stop_root_bus(rockchip->root_bus); in rockchip_pcie_remove()
1098 pci_remove_root_bus(rockchip->root_bus); in rockchip_pcie_remove()
1099 pci_unmap_iospace(rockchip->io); in rockchip_pcie_remove()
1100 irq_domain_remove(rockchip->irq_domain); in rockchip_pcie_remove()
1106 if (!IS_ERR(rockchip->vpcie12v)) in rockchip_pcie_remove()
1107 regulator_disable(rockchip->vpcie12v); in rockchip_pcie_remove()
1108 if (!IS_ERR(rockchip->vpcie3v3)) in rockchip_pcie_remove()
1109 regulator_disable(rockchip->vpcie3v3); in rockchip_pcie_remove()
1110 if (!IS_ERR(rockchip->vpcie1v8)) in rockchip_pcie_remove()
1111 regulator_disable(rockchip->vpcie1v8); in rockchip_pcie_remove()
1112 if (!IS_ERR(rockchip->vpcie0v9)) in rockchip_pcie_remove()
1113 regulator_disable(rockchip->vpcie0v9); in rockchip_pcie_remove()
1124 { .compatible = "rockchip,rk3399-pcie", },
1131 .name = "rockchip-pcie",