Lines Matching +full:keep +full:- +full:pll +full:- +full:enabled
2 * phy-brcm-usb-init.c - Broadcom USB Phy chip specific init functions
4 * Copyright (C) 2014-2017 Broadcom
24 #include "phy-brcm-usb-init.h"
142 (params->usb_reg_bits_map[USB_CTRL_##reg##_##field##_SELECTOR])
429 mask = params->usb_reg_bits_map[field]; in usb_ctrl_unset_family()
430 reg = params->ctrl_regs + reg_offset; in usb_ctrl_unset_family()
441 mask = params->usb_reg_bits_map[field]; in usb_ctrl_set_family()
442 reg = params->ctrl_regs + reg_offset; in usb_ctrl_set_family()
505 /* reset USB 2.0 PLL */ in brcmusb_usb_phy_ldo_fix()
507 /* PLL reset period */ in brcmusb_usb_phy_ldo_fix()
510 /* Give PLL enough time to lock */ in brcmusb_usb_phy_ldo_fix()
523 /* Set correct window for PLL lock detect */ in brcmusb_usb3_pll_fix()
532 /* Re-enable USB 3.0 pipe reset */ in brcmusb_usb3_enable_pipe_reset()
592 void __iomem *ctrl_base = params->ctrl_regs; in brcmusb_usb3_pll_54mhz()
596 * 3.0 PLL has been changed from 50MHz to 54MHz so the in brcmusb_usb3_pll_54mhz()
597 * PLL needs to be reprogrammed. in brcmusb_usb3_pll_54mhz()
598 * See SWLINUX-4006. in brcmusb_usb3_pll_54mhz()
601 * 3.0 PLL has been changed from 50MHz to 54MHz to in brcmusb_usb3_pll_54mhz()
603 * See SWLINUX-4169. in brcmusb_usb3_pll_54mhz()
605 switch (params->selected_family) { in brcmusb_usb3_pll_54mhz()
615 if (BRCM_REV(params->family_id) < 0x20) in brcmusb_usb3_pll_54mhz()
620 /* set USB 3.0 PLL to accept 54Mhz reference clock */ in brcmusb_usb3_pll_54mhz()
647 /* restart PLL sequence */ in brcmusb_usb3_pll_54mhz()
649 /* Give PLL enough time to lock */ in brcmusb_usb3_pll_54mhz()
662 /* Currently, USB 3.0 SSC is enabled via port 0 MDIO registers, in brcmusb_usb3_ssc_enable()
664 * USB 3.0 PHY, it must be enabled via both ports (HWUSB3DVT-26). in brcmusb_usb3_ssc_enable()
673 void __iomem *ctrl_base = params->ctrl_regs; in brcmusb_usb3_phy_workarounds()
688 if (params->selected_family != BRCM_FAMILY_7445D0) in brcmusb_memc_fix()
691 * This is a workaround for HW7445-1869 where a DMA write ends up in brcmusb_memc_fix()
692 * doing a read pre-fetch after the end of the DMA buffer. This in brcmusb_memc_fix()
694 * memory, causing the pre-fetch read to access non-existent memory, in brcmusb_memc_fix()
695 * and the chip bondout has MEMC2 disabled. When the pre-fetch read in brcmusb_memc_fix()
701 prid = params->product_id & 0xfffff000; in brcmusb_memc_fix()
715 void __iomem *xhci_ec_base = params->xhci_ec_regs; in brcmusb_usb3_otp_fix()
718 if (params->family_id != 0x74371000 || xhci_ec_base == 0) in brcmusb_usb3_otp_fix()
728 USB_CTRL_UNSET(params->ctrl_regs, USB30_CTL1, PHY3_RESETB); in brcmusb_usb3_otp_fix()
729 USB_CTRL_SET(params->ctrl_regs, USB30_CTL1, PHY3_RESETB); in brcmusb_usb3_otp_fix()
742 } else { /* De-assert reset */ in brcmusb_xhci_soft_reset()
753 * - exact match of chip and major rev
754 * - exact match of chip and closest older major rev
755 * - default chip/rev.
761 int last_type = -1; in brcmusb_get_family_type()
767 family = params->family_id & 0xfffffff0; in brcmusb_get_family_type()
768 family_no_major = params->family_id & 0xffffff00; in brcmusb_get_family_type()
781 if (last_type == -1) in brcmusb_get_family_type()
788 void __iomem *ctrl = params->ctrl_regs; in brcm_usb_init_ipp()
796 if (params->ioc) in brcm_usb_init_ipp()
798 if (params->ipp == 1) in brcm_usb_init_ipp()
810 if (params->ipp != 2) in brcm_usb_init_ipp()
817 if (params->ioc) in brcm_usb_init_ipp()
819 if (params->ipp == 1 && ((reg & USB_CTRL_MASK(SETUP, IPP)) == 0)) in brcm_usb_init_ipp()
833 void __iomem *ctrl = params->ctrl_regs; in brcm_usb_init_get_dual_select()
847 void __iomem *ctrl = params->ctrl_regs; in brcm_usb_init_set_dual_select()
862 void __iomem *ctrl = params->ctrl_regs; in brcm_usb_init_common()
867 /* 1 millisecond - for USB clocks to settle down */ in brcm_usb_init_common()
873 /* 1 millisecond - for USB clocks to settle down */ in brcm_usb_init_common()
877 if (params->selected_family != BRCM_FAMILY_74371A0 && in brcm_usb_init_common()
878 (BRCM_ID(params->family_id) != 0x7364)) in brcm_usb_init_common()
880 * HW7439-637: 7439a0 and its derivatives do not have large in brcm_usb_init_common()
885 /* Block auto PLL suspend by USB2 PHY (Sasi) */ in brcm_usb_init_common()
889 if (params->selected_family == BRCM_FAMILY_7364A0) in brcm_usb_init_common()
898 * interfaces are enabled if they exist. in brcm_usb_init_common()
912 reg |= params->mode; in brcm_usb_init_common()
916 switch (params->mode) { in brcm_usb_init_common()
927 if (params->mode == USB_CTLR_MODE_TYPEC_PD) in brcm_usb_init_common()
938 void __iomem *ctrl = params->ctrl_regs; in brcm_usb_init_eohci()
943 if (params->selected_family == BRCM_FAMILY_7366C0) in brcm_usb_init_eohci()
956 if (params->selected_family == BRCM_FAMILY_7271A0) in brcm_usb_init_eohci()
957 /* Enable LS keep alive fix for certain keyboards */ in brcm_usb_init_eohci()
963 void __iomem *ctrl = params->ctrl_regs; in brcm_usb_init_xhci()
966 /* 1 millisecond - for USB clocks to settle down */ in brcm_usb_init_xhci()
969 if (BRCM_ID(params->family_id) == 0x7366) { in brcm_usb_init_xhci()
1007 USB_CTRL_SET(params->ctrl_regs, USB30_PCTL, PHY3_IDDQ_OVERRIDE); in brcm_usb_uninit_xhci()
1015 params->selected_family = fam; in brcm_usb_set_family_map()
1016 params->usb_reg_bits_map = in brcm_usb_set_family_map()
1018 params->family_name = family_names[fam]; in brcm_usb_set_family_map()