Lines Matching +full:d +full:- +full:phy
2 * Copyright (c) 2013-2015, Linux Foundation. All rights reserved.
15 #include "phy-qcom-ufs-i.h"
35 dev_err(ufs_qcom_phy->dev, "%s: tbl_A is NULL", __func__); in ufs_qcom_phy_calibrate()
42 ufs_qcom_phy->mmio + tbl_A[i].reg_offset); in ufs_qcom_phy_calibrate()
52 dev_err(ufs_qcom_phy->dev, "%s: tbl_B is NULL", in ufs_qcom_phy_calibrate()
60 ufs_qcom_phy->mmio + tbl_B[i].reg_offset); in ufs_qcom_phy_calibrate()
72 * This assumes the embedded phy structure inside generic_phy is of type
77 struct ufs_qcom_phy *get_ufs_qcom_phy(struct phy *generic_phy) in get_ufs_qcom_phy()
87 struct device *dev = &pdev->dev; in ufs_qcom_phy_base_init()
92 phy_common->mmio = devm_ioremap_resource(dev, res); in ufs_qcom_phy_base_init()
93 if (IS_ERR((void const *)phy_common->mmio)) { in ufs_qcom_phy_base_init()
94 err = PTR_ERR((void const *)phy_common->mmio); in ufs_qcom_phy_base_init()
95 phy_common->mmio = NULL; in ufs_qcom_phy_base_init()
96 dev_err(dev, "%s: ioremap for phy_mem resource failed %d\n", in ufs_qcom_phy_base_init()
104 phy_common->dev_ref_clk_ctrl_mmio = devm_ioremap_resource(dev, res); in ufs_qcom_phy_base_init()
105 if (IS_ERR((void const *)phy_common->dev_ref_clk_ctrl_mmio)) in ufs_qcom_phy_base_init()
106 phy_common->dev_ref_clk_ctrl_mmio = NULL; in ufs_qcom_phy_base_init()
111 struct phy *ufs_qcom_phy_generic_probe(struct platform_device *pdev, in ufs_qcom_phy_generic_probe()
117 struct device *dev = &pdev->dev; in ufs_qcom_phy_generic_probe()
118 struct phy *generic_phy = NULL; in ufs_qcom_phy_generic_probe()
123 dev_err(dev, "%s: phy base init failed %d\n", __func__, err); in ufs_qcom_phy_generic_probe()
130 dev_err(dev, "%s: failed to register phy %d\n", __func__, err); in ufs_qcom_phy_generic_probe()
137 dev_err(dev, "%s: failed to create phy %d\n", __func__, err); in ufs_qcom_phy_generic_probe()
142 common_cfg->phy_spec_ops = phy_spec_ops; in ufs_qcom_phy_generic_probe()
143 common_cfg->dev = dev; in ufs_qcom_phy_generic_probe()
160 dev_err(dev, "failed to get %s err %d", name, err); in __ufs_qcom_phy_clk_get()
178 if (of_device_is_compatible(phy_common->dev->of_node, in ufs_qcom_phy_init_clks()
179 "qcom,msm8996-ufs-phy-qmp-14nm")) in ufs_qcom_phy_init_clks()
182 err = ufs_qcom_phy_clk_get(phy_common->dev, "tx_iface_clk", in ufs_qcom_phy_init_clks()
183 &phy_common->tx_iface_clk); in ufs_qcom_phy_init_clks()
187 err = ufs_qcom_phy_clk_get(phy_common->dev, "rx_iface_clk", in ufs_qcom_phy_init_clks()
188 &phy_common->rx_iface_clk); in ufs_qcom_phy_init_clks()
193 err = ufs_qcom_phy_clk_get(phy_common->dev, "ref_clk_src", in ufs_qcom_phy_init_clks()
194 &phy_common->ref_clk_src); in ufs_qcom_phy_init_clks()
202 __ufs_qcom_phy_clk_get(phy_common->dev, "ref_clk_parent", in ufs_qcom_phy_init_clks()
203 &phy_common->ref_clk_parent, false); in ufs_qcom_phy_init_clks()
205 err = ufs_qcom_phy_clk_get(phy_common->dev, "ref_clk", in ufs_qcom_phy_init_clks()
206 &phy_common->ref_clk); in ufs_qcom_phy_init_clks()
221 vreg->name = name; in ufs_qcom_phy_init_vreg()
222 vreg->reg = devm_regulator_get(dev, name); in ufs_qcom_phy_init_vreg()
223 if (IS_ERR(vreg->reg)) { in ufs_qcom_phy_init_vreg()
224 err = PTR_ERR(vreg->reg); in ufs_qcom_phy_init_vreg()
225 dev_err(dev, "failed to get %s, %d\n", name, err); in ufs_qcom_phy_init_vreg()
229 if (dev->of_node) { in ufs_qcom_phy_init_vreg()
230 snprintf(prop_name, MAX_PROP_NAME, "%s-max-microamp", name); in ufs_qcom_phy_init_vreg()
231 err = of_property_read_u32(dev->of_node, in ufs_qcom_phy_init_vreg()
232 prop_name, &vreg->max_uA); in ufs_qcom_phy_init_vreg()
233 if (err && err != -EINVAL) { in ufs_qcom_phy_init_vreg()
237 } else if (err == -EINVAL || !vreg->max_uA) { in ufs_qcom_phy_init_vreg()
238 if (regulator_count_voltages(vreg->reg) > 0) { in ufs_qcom_phy_init_vreg()
247 if (!strcmp(name, "vdda-pll")) { in ufs_qcom_phy_init_vreg()
248 vreg->max_uV = VDDA_PLL_MAX_UV; in ufs_qcom_phy_init_vreg()
249 vreg->min_uV = VDDA_PLL_MIN_UV; in ufs_qcom_phy_init_vreg()
250 } else if (!strcmp(name, "vdda-phy")) { in ufs_qcom_phy_init_vreg()
251 vreg->max_uV = VDDA_PHY_MAX_UV; in ufs_qcom_phy_init_vreg()
252 vreg->min_uV = VDDA_PHY_MIN_UV; in ufs_qcom_phy_init_vreg()
253 } else if (!strcmp(name, "vddp-ref-clk")) { in ufs_qcom_phy_init_vreg()
254 vreg->max_uV = VDDP_REF_CLK_MAX_UV; in ufs_qcom_phy_init_vreg()
255 vreg->min_uV = VDDP_REF_CLK_MIN_UV; in ufs_qcom_phy_init_vreg()
266 err = ufs_qcom_phy_init_vreg(phy_common->dev, &phy_common->vdda_pll, in ufs_qcom_phy_init_vregulators()
267 "vdda-pll"); in ufs_qcom_phy_init_vregulators()
271 err = ufs_qcom_phy_init_vreg(phy_common->dev, &phy_common->vdda_phy, in ufs_qcom_phy_init_vregulators()
272 "vdda-phy"); in ufs_qcom_phy_init_vregulators()
277 err = ufs_qcom_phy_init_vreg(phy_common->dev, &phy_common->vddp_ref_clk, in ufs_qcom_phy_init_vregulators()
278 "vddp-ref-clk"); in ufs_qcom_phy_init_vregulators()
289 struct regulator *reg = vreg->reg; in ufs_qcom_phy_cfg_vreg()
290 const char *name = vreg->name; in ufs_qcom_phy_cfg_vreg()
295 min_uV = on ? vreg->min_uV : 0; in ufs_qcom_phy_cfg_vreg()
296 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV); in ufs_qcom_phy_cfg_vreg()
298 dev_err(dev, "%s: %s set voltage failed, err=%d\n", in ufs_qcom_phy_cfg_vreg()
302 uA_load = on ? vreg->max_uA : 0; in ufs_qcom_phy_cfg_vreg()
311 dev_err(dev, "%s: %s set optimum mode(uA_load=%d) failed, err=%d\n", in ufs_qcom_phy_cfg_vreg()
325 if (!vreg || vreg->enabled) in ufs_qcom_phy_enable_vreg()
330 dev_err(dev, "%s: ufs_qcom_phy_cfg_vreg() failed, err=%d\n", in ufs_qcom_phy_enable_vreg()
335 ret = regulator_enable(vreg->reg); in ufs_qcom_phy_enable_vreg()
337 dev_err(dev, "%s: enable failed, err=%d\n", in ufs_qcom_phy_enable_vreg()
342 vreg->enabled = true; in ufs_qcom_phy_enable_vreg()
347 static int ufs_qcom_phy_enable_ref_clk(struct ufs_qcom_phy *phy) in ufs_qcom_phy_enable_ref_clk() argument
351 if (phy->is_ref_clk_enabled) in ufs_qcom_phy_enable_ref_clk()
355 * reference clock is propagated in a daisy-chained manner from in ufs_qcom_phy_enable_ref_clk()
356 * source to phy, so ungate them at each stage. in ufs_qcom_phy_enable_ref_clk()
358 ret = clk_prepare_enable(phy->ref_clk_src); in ufs_qcom_phy_enable_ref_clk()
360 dev_err(phy->dev, "%s: ref_clk_src enable failed %d\n", in ufs_qcom_phy_enable_ref_clk()
369 if (phy->ref_clk_parent) { in ufs_qcom_phy_enable_ref_clk()
370 ret = clk_prepare_enable(phy->ref_clk_parent); in ufs_qcom_phy_enable_ref_clk()
372 dev_err(phy->dev, "%s: ref_clk_parent enable failed %d\n", in ufs_qcom_phy_enable_ref_clk()
378 ret = clk_prepare_enable(phy->ref_clk); in ufs_qcom_phy_enable_ref_clk()
380 dev_err(phy->dev, "%s: ref_clk enable failed %d\n", in ufs_qcom_phy_enable_ref_clk()
385 phy->is_ref_clk_enabled = true; in ufs_qcom_phy_enable_ref_clk()
389 if (phy->ref_clk_parent) in ufs_qcom_phy_enable_ref_clk()
390 clk_disable_unprepare(phy->ref_clk_parent); in ufs_qcom_phy_enable_ref_clk()
392 clk_disable_unprepare(phy->ref_clk_src); in ufs_qcom_phy_enable_ref_clk()
402 if (!vreg || !vreg->enabled) in ufs_qcom_phy_disable_vreg()
405 ret = regulator_disable(vreg->reg); in ufs_qcom_phy_disable_vreg()
410 vreg->enabled = false; in ufs_qcom_phy_disable_vreg()
412 dev_err(dev, "%s: %s disable failed, err=%d\n", in ufs_qcom_phy_disable_vreg()
413 __func__, vreg->name, ret); in ufs_qcom_phy_disable_vreg()
419 static void ufs_qcom_phy_disable_ref_clk(struct ufs_qcom_phy *phy) in ufs_qcom_phy_disable_ref_clk() argument
421 if (phy->is_ref_clk_enabled) { in ufs_qcom_phy_disable_ref_clk()
422 clk_disable_unprepare(phy->ref_clk); in ufs_qcom_phy_disable_ref_clk()
427 if (phy->ref_clk_parent) in ufs_qcom_phy_disable_ref_clk()
428 clk_disable_unprepare(phy->ref_clk_parent); in ufs_qcom_phy_disable_ref_clk()
429 clk_disable_unprepare(phy->ref_clk_src); in ufs_qcom_phy_disable_ref_clk()
430 phy->is_ref_clk_enabled = false; in ufs_qcom_phy_disable_ref_clk()
436 static void ufs_qcom_phy_dev_ref_clk_ctrl(struct phy *generic_phy, bool enable) in ufs_qcom_phy_dev_ref_clk_ctrl()
438 struct ufs_qcom_phy *phy = get_ufs_qcom_phy(generic_phy); in ufs_qcom_phy_dev_ref_clk_ctrl() local
440 if (phy->dev_ref_clk_ctrl_mmio && in ufs_qcom_phy_dev_ref_clk_ctrl()
441 (enable ^ phy->is_dev_ref_clk_enabled)) { in ufs_qcom_phy_dev_ref_clk_ctrl()
442 u32 temp = readl_relaxed(phy->dev_ref_clk_ctrl_mmio); in ufs_qcom_phy_dev_ref_clk_ctrl()
457 writel_relaxed(temp, phy->dev_ref_clk_ctrl_mmio); in ufs_qcom_phy_dev_ref_clk_ctrl()
468 phy->is_dev_ref_clk_enabled = enable; in ufs_qcom_phy_dev_ref_clk_ctrl()
472 void ufs_qcom_phy_enable_dev_ref_clk(struct phy *generic_phy) in ufs_qcom_phy_enable_dev_ref_clk()
478 void ufs_qcom_phy_disable_dev_ref_clk(struct phy *generic_phy) in ufs_qcom_phy_disable_dev_ref_clk()
484 /* Turn ON M-PHY RMMI interface clocks */
485 static int ufs_qcom_phy_enable_iface_clk(struct ufs_qcom_phy *phy) in ufs_qcom_phy_enable_iface_clk() argument
489 if (phy->is_iface_clk_enabled) in ufs_qcom_phy_enable_iface_clk()
492 ret = clk_prepare_enable(phy->tx_iface_clk); in ufs_qcom_phy_enable_iface_clk()
494 dev_err(phy->dev, "%s: tx_iface_clk enable failed %d\n", in ufs_qcom_phy_enable_iface_clk()
498 ret = clk_prepare_enable(phy->rx_iface_clk); in ufs_qcom_phy_enable_iface_clk()
500 clk_disable_unprepare(phy->tx_iface_clk); in ufs_qcom_phy_enable_iface_clk()
501 dev_err(phy->dev, "%s: rx_iface_clk enable failed %d. disabling also tx_iface_clk\n", in ufs_qcom_phy_enable_iface_clk()
505 phy->is_iface_clk_enabled = true; in ufs_qcom_phy_enable_iface_clk()
511 /* Turn OFF M-PHY RMMI interface clocks */
512 void ufs_qcom_phy_disable_iface_clk(struct ufs_qcom_phy *phy) in ufs_qcom_phy_disable_iface_clk() argument
514 if (phy->is_iface_clk_enabled) { in ufs_qcom_phy_disable_iface_clk()
515 clk_disable_unprepare(phy->tx_iface_clk); in ufs_qcom_phy_disable_iface_clk()
516 clk_disable_unprepare(phy->rx_iface_clk); in ufs_qcom_phy_disable_iface_clk()
517 phy->is_iface_clk_enabled = false; in ufs_qcom_phy_disable_iface_clk()
525 if (!ufs_qcom_phy->phy_spec_ops->start_serdes) { in ufs_qcom_phy_start_serdes()
526 dev_err(ufs_qcom_phy->dev, "%s: start_serdes() callback is not supported\n", in ufs_qcom_phy_start_serdes()
528 ret = -ENOTSUPP; in ufs_qcom_phy_start_serdes()
530 ufs_qcom_phy->phy_spec_ops->start_serdes(ufs_qcom_phy); in ufs_qcom_phy_start_serdes()
536 int ufs_qcom_phy_set_tx_lane_enable(struct phy *generic_phy, u32 tx_lanes) in ufs_qcom_phy_set_tx_lane_enable()
541 if (!ufs_qcom_phy->phy_spec_ops->set_tx_lane_enable) { in ufs_qcom_phy_set_tx_lane_enable()
542 dev_err(ufs_qcom_phy->dev, "%s: set_tx_lane_enable() callback is not supported\n", in ufs_qcom_phy_set_tx_lane_enable()
544 ret = -ENOTSUPP; in ufs_qcom_phy_set_tx_lane_enable()
546 ufs_qcom_phy->phy_spec_ops->set_tx_lane_enable(ufs_qcom_phy, in ufs_qcom_phy_set_tx_lane_enable()
554 void ufs_qcom_phy_save_controller_version(struct phy *generic_phy, in ufs_qcom_phy_save_controller_version()
559 ufs_qcom_phy->host_ctrl_rev_major = major; in ufs_qcom_phy_save_controller_version()
560 ufs_qcom_phy->host_ctrl_rev_minor = minor; in ufs_qcom_phy_save_controller_version()
561 ufs_qcom_phy->host_ctrl_rev_step = step; in ufs_qcom_phy_save_controller_version()
567 if (!ufs_qcom_phy->phy_spec_ops->is_physical_coding_sublayer_ready) { in ufs_qcom_phy_is_pcs_ready()
568 dev_err(ufs_qcom_phy->dev, "%s: is_physical_coding_sublayer_ready() callback is not supported\n", in ufs_qcom_phy_is_pcs_ready()
570 return -ENOTSUPP; in ufs_qcom_phy_is_pcs_ready()
573 return ufs_qcom_phy->phy_spec_ops-> in ufs_qcom_phy_is_pcs_ready()
577 int ufs_qcom_phy_power_on(struct phy *generic_phy) in ufs_qcom_phy_power_on()
580 struct device *dev = phy_common->dev; in ufs_qcom_phy_power_on()
583 if (phy_common->is_powered_on) in ufs_qcom_phy_power_on()
586 if (!phy_common->is_started) { in ufs_qcom_phy_power_on()
595 phy_common->is_started = true; in ufs_qcom_phy_power_on()
598 err = ufs_qcom_phy_enable_vreg(dev, &phy_common->vdda_phy); in ufs_qcom_phy_power_on()
600 dev_err(dev, "%s enable vdda_phy failed, err=%d\n", in ufs_qcom_phy_power_on()
605 phy_common->phy_spec_ops->power_control(phy_common, true); in ufs_qcom_phy_power_on()
608 err = ufs_qcom_phy_enable_vreg(dev, &phy_common->vdda_pll); in ufs_qcom_phy_power_on()
610 dev_err(dev, "%s enable vdda_pll failed, err=%d\n", in ufs_qcom_phy_power_on()
617 dev_err(dev, "%s enable phy iface clock failed, err=%d\n", in ufs_qcom_phy_power_on()
624 dev_err(dev, "%s enable phy ref clock failed, err=%d\n", in ufs_qcom_phy_power_on()
629 /* enable device PHY ref_clk pad rail */ in ufs_qcom_phy_power_on()
630 if (phy_common->vddp_ref_clk.reg) { in ufs_qcom_phy_power_on()
632 &phy_common->vddp_ref_clk); in ufs_qcom_phy_power_on()
634 dev_err(dev, "%s enable vddp_ref_clk failed, err=%d\n", in ufs_qcom_phy_power_on()
640 phy_common->is_powered_on = true; in ufs_qcom_phy_power_on()
648 ufs_qcom_phy_disable_vreg(dev, &phy_common->vdda_pll); in ufs_qcom_phy_power_on()
650 ufs_qcom_phy_disable_vreg(dev, &phy_common->vdda_phy); in ufs_qcom_phy_power_on()
656 int ufs_qcom_phy_power_off(struct phy *generic_phy) in ufs_qcom_phy_power_off()
660 if (!phy_common->is_powered_on) in ufs_qcom_phy_power_off()
663 phy_common->phy_spec_ops->power_control(phy_common, false); in ufs_qcom_phy_power_off()
665 if (phy_common->vddp_ref_clk.reg) in ufs_qcom_phy_power_off()
666 ufs_qcom_phy_disable_vreg(phy_common->dev, in ufs_qcom_phy_power_off()
667 &phy_common->vddp_ref_clk); in ufs_qcom_phy_power_off()
671 ufs_qcom_phy_disable_vreg(phy_common->dev, &phy_common->vdda_pll); in ufs_qcom_phy_power_off()
672 ufs_qcom_phy_disable_vreg(phy_common->dev, &phy_common->vdda_phy); in ufs_qcom_phy_power_off()
673 phy_common->is_powered_on = false; in ufs_qcom_phy_power_off()
681 MODULE_DESCRIPTION("Universal Flash Storage (UFS) QCOM PHY");