Lines Matching full:pctrl
683 static void __iomem *chv_padreg(struct chv_pinctrl *pctrl, unsigned offset, in chv_padreg() argument
692 return pctrl->regs + offset + reg; in chv_padreg()
703 static bool chv_pad_locked(struct chv_pinctrl *pctrl, unsigned offset) in chv_pad_locked() argument
707 reg = chv_padreg(pctrl, offset, CHV_PADCTRL1); in chv_pad_locked()
713 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_groups_count() local
715 return pctrl->community->ngroups; in chv_get_groups_count()
721 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_group_name() local
723 return pctrl->community->groups[group].name; in chv_get_group_name()
729 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_group_pins() local
731 *pins = pctrl->community->groups[group].pins; in chv_get_group_pins()
732 *npins = pctrl->community->groups[group].npins; in chv_get_group_pins()
739 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_pin_dbg_show() local
746 ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0)); in chv_pin_dbg_show()
747 ctrl1 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL1)); in chv_pin_dbg_show()
748 locked = chv_pad_locked(pctrl, offset); in chv_pin_dbg_show()
778 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_functions_count() local
780 return pctrl->community->nfunctions; in chv_get_functions_count()
786 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_function_name() local
788 return pctrl->community->functions[function].name; in chv_get_function_name()
796 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_function_groups() local
798 *groups = pctrl->community->functions[function].groups; in chv_get_function_groups()
799 *ngroups = pctrl->community->functions[function].ngroups; in chv_get_function_groups()
806 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_pinmux_set_mux() local
811 grp = &pctrl->community->groups[group]; in chv_pinmux_set_mux()
817 if (chv_pad_locked(pctrl, grp->pins[i])) { in chv_pinmux_set_mux()
818 dev_warn(pctrl->dev, "unable to set mode for locked pin %u\n", in chv_pinmux_set_mux()
843 reg = chv_padreg(pctrl, pin, CHV_PADCTRL0); in chv_pinmux_set_mux()
853 reg = chv_padreg(pctrl, pin, CHV_PADCTRL1); in chv_pinmux_set_mux()
859 dev_dbg(pctrl->dev, "configured pin %u mode %u OE %sinverted\n", in chv_pinmux_set_mux()
872 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_gpio_request_enable() local
879 if (chv_pad_locked(pctrl, offset)) { in chv_gpio_request_enable()
880 value = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0)); in chv_gpio_request_enable()
890 for (i = 0; i < ARRAY_SIZE(pctrl->intr_lines); i++) { in chv_gpio_request_enable()
891 if (pctrl->intr_lines[i] == offset) { in chv_gpio_request_enable()
892 pctrl->intr_lines[i] = 0; in chv_gpio_request_enable()
898 reg = chv_padreg(pctrl, offset, CHV_PADCTRL1); in chv_gpio_request_enable()
904 reg = chv_padreg(pctrl, offset, CHV_PADCTRL0); in chv_gpio_request_enable()
932 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_gpio_disable_free() local
939 reg = chv_padreg(pctrl, offset, CHV_PADCTRL0); in chv_gpio_disable_free()
950 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_gpio_set_direction() local
951 void __iomem *reg = chv_padreg(pctrl, offset, CHV_PADCTRL0); in chv_gpio_set_direction()
982 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_config_get() local
990 ctrl0 = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); in chv_config_get()
991 ctrl1 = readl(chv_padreg(pctrl, pin, CHV_PADCTRL1)); in chv_config_get()
1059 static int chv_config_set_pull(struct chv_pinctrl *pctrl, unsigned pin, in chv_config_set_pull() argument
1062 void __iomem *reg = chv_padreg(pctrl, pin, CHV_PADCTRL0); in chv_config_set_pull()
1125 static int chv_config_set_oden(struct chv_pinctrl *pctrl, unsigned int pin, in chv_config_set_oden() argument
1128 void __iomem *reg = chv_padreg(pctrl, pin, CHV_PADCTRL1); in chv_config_set_oden()
1149 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_config_set() local
1154 if (chv_pad_locked(pctrl, pin)) in chv_config_set()
1165 ret = chv_config_set_pull(pctrl, pin, param, arg); in chv_config_set()
1171 ret = chv_config_set_oden(pctrl, pin, false); in chv_config_set()
1177 ret = chv_config_set_oden(pctrl, pin, true); in chv_config_set()
1186 dev_dbg(pctrl->dev, "pin %d set config %d arg %u\n", pin, in chv_config_set()
1250 struct chv_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_get() local
1255 ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0)); in chv_gpio_get()
1268 struct chv_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_set() local
1275 reg = chv_padreg(pctrl, offset, CHV_PADCTRL0); in chv_gpio_set()
1290 struct chv_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_get_direction() local
1295 ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0)); in chv_gpio_get_direction()
1330 struct chv_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_ack() local
1336 intr_line = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); in chv_gpio_irq_ack()
1339 chv_writel(BIT(intr_line), pctrl->regs + CHV_INTSTAT); in chv_gpio_irq_ack()
1347 struct chv_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_mask_unmask() local
1354 intr_line = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); in chv_gpio_irq_mask_unmask()
1358 value = readl(pctrl->regs + CHV_INTMASK); in chv_gpio_irq_mask_unmask()
1363 chv_writel(value, pctrl->regs + CHV_INTMASK); in chv_gpio_irq_mask_unmask()
1392 struct chv_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_startup() local
1399 intsel = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); in chv_gpio_irq_startup()
1403 value = readl(chv_padreg(pctrl, pin, CHV_PADCTRL1)); in chv_gpio_irq_startup()
1409 if (!pctrl->intr_lines[intsel]) { in chv_gpio_irq_startup()
1411 pctrl->intr_lines[intsel] = pin; in chv_gpio_irq_startup()
1423 struct chv_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_type() local
1443 if (!chv_pad_locked(pctrl, pin)) { in chv_gpio_irq_type()
1444 void __iomem *reg = chv_padreg(pctrl, pin, CHV_PADCTRL1); in chv_gpio_irq_type()
1466 value = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); in chv_gpio_irq_type()
1470 pctrl->intr_lines[value] = pin; in chv_gpio_irq_type()
1485 struct chv_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_handler() local
1494 pending = readl(pctrl->regs + CHV_INTSTAT); in chv_gpio_irq_handler()
1497 for_each_set_bit(intr_line, &pending, pctrl->community->nirqs) { in chv_gpio_irq_handler()
1500 offset = pctrl->intr_lines[intr_line]; in chv_gpio_irq_handler()
1549 static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) in chv_gpio_probe() argument
1552 struct gpio_chip *chip = &pctrl->chip; in chv_gpio_probe()
1554 const struct chv_community *community = pctrl->community; in chv_gpio_probe()
1560 chip->label = dev_name(pctrl->dev); in chv_gpio_probe()
1561 chip->parent = pctrl->dev; in chv_gpio_probe()
1565 ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl); in chv_gpio_probe()
1567 dev_err(pctrl->dev, "Failed to register gpiochip\n"); in chv_gpio_probe()
1573 ret = gpiochip_add_pin_range(chip, dev_name(pctrl->dev), in chv_gpio_probe()
1577 dev_err(pctrl->dev, "failed to add GPIO pin range\n"); in chv_gpio_probe()
1589 intsel = readl(chv_padreg(pctrl, desc->number, CHV_PADCTRL0)); in chv_gpio_probe()
1609 chv_writel(GENMASK(31, pctrl->community->nirqs), in chv_gpio_probe()
1610 pctrl->regs + CHV_INTMASK); in chv_gpio_probe()
1614 chv_writel(0xffff, pctrl->regs + CHV_INTSTAT); in chv_gpio_probe()
1617 irq_base = devm_irq_alloc_descs(pctrl->dev, -1, 0, in chv_gpio_probe()
1620 dev_err(pctrl->dev, "Failed to allocate IRQ numbers\n"); in chv_gpio_probe()
1625 pctrl->irqchip.name = "chv-gpio"; in chv_gpio_probe()
1626 pctrl->irqchip.irq_startup = chv_gpio_irq_startup; in chv_gpio_probe()
1627 pctrl->irqchip.irq_ack = chv_gpio_irq_ack; in chv_gpio_probe()
1628 pctrl->irqchip.irq_mask = chv_gpio_irq_mask; in chv_gpio_probe()
1629 pctrl->irqchip.irq_unmask = chv_gpio_irq_unmask; in chv_gpio_probe()
1630 pctrl->irqchip.irq_set_type = chv_gpio_irq_type; in chv_gpio_probe()
1631 pctrl->irqchip.flags = IRQCHIP_SKIP_SET_WAKE; in chv_gpio_probe()
1633 ret = gpiochip_irqchip_add(chip, &pctrl->irqchip, 0, in chv_gpio_probe()
1636 dev_err(pctrl->dev, "failed to add IRQ chip\n"); in chv_gpio_probe()
1650 gpiochip_set_chained_irqchip(chip, &pctrl->irqchip, irq, in chv_gpio_probe()
1659 struct chv_pinctrl *pctrl = region_context; in chv_pinctrl_mmio_access_handler() local
1666 chv_writel((u32)(*value), pctrl->regs + (u32)address); in chv_pinctrl_mmio_access_handler()
1668 *value = readl(pctrl->regs + (u32)address); in chv_pinctrl_mmio_access_handler()
1679 struct chv_pinctrl *pctrl; in chv_pinctrl_probe() local
1689 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); in chv_pinctrl_probe()
1690 if (!pctrl) in chv_pinctrl_probe()
1695 pctrl->community = chv_communities[i]; in chv_pinctrl_probe()
1701 pctrl->dev = &pdev->dev; in chv_pinctrl_probe()
1704 pctrl->saved_pin_context = devm_kcalloc(pctrl->dev, in chv_pinctrl_probe()
1705 pctrl->community->npins, sizeof(*pctrl->saved_pin_context), in chv_pinctrl_probe()
1707 if (!pctrl->saved_pin_context) in chv_pinctrl_probe()
1712 pctrl->regs = devm_ioremap_resource(&pdev->dev, res); in chv_pinctrl_probe()
1713 if (IS_ERR(pctrl->regs)) in chv_pinctrl_probe()
1714 return PTR_ERR(pctrl->regs); in chv_pinctrl_probe()
1722 pctrl->pctldesc = chv_pinctrl_desc; in chv_pinctrl_probe()
1723 pctrl->pctldesc.name = dev_name(&pdev->dev); in chv_pinctrl_probe()
1724 pctrl->pctldesc.pins = pctrl->community->pins; in chv_pinctrl_probe()
1725 pctrl->pctldesc.npins = pctrl->community->npins; in chv_pinctrl_probe()
1727 pctrl->pctldev = devm_pinctrl_register(&pdev->dev, &pctrl->pctldesc, in chv_pinctrl_probe()
1728 pctrl); in chv_pinctrl_probe()
1729 if (IS_ERR(pctrl->pctldev)) { in chv_pinctrl_probe()
1731 return PTR_ERR(pctrl->pctldev); in chv_pinctrl_probe()
1734 ret = chv_gpio_probe(pctrl, irq); in chv_pinctrl_probe()
1739 pctrl->community->acpi_space_id, in chv_pinctrl_probe()
1741 NULL, pctrl); in chv_pinctrl_probe()
1745 platform_set_drvdata(pdev, pctrl); in chv_pinctrl_probe()
1752 struct chv_pinctrl *pctrl = platform_get_drvdata(pdev); in chv_pinctrl_remove() local
1755 pctrl->community->acpi_space_id, in chv_pinctrl_remove()
1765 struct chv_pinctrl *pctrl = platform_get_drvdata(pdev); in chv_pinctrl_suspend_noirq() local
1771 pctrl->saved_intmask = readl(pctrl->regs + CHV_INTMASK); in chv_pinctrl_suspend_noirq()
1773 for (i = 0; i < pctrl->community->npins; i++) { in chv_pinctrl_suspend_noirq()
1778 desc = &pctrl->community->pins[i]; in chv_pinctrl_suspend_noirq()
1779 if (chv_pad_locked(pctrl, desc->number)) in chv_pinctrl_suspend_noirq()
1782 ctx = &pctrl->saved_pin_context[i]; in chv_pinctrl_suspend_noirq()
1784 reg = chv_padreg(pctrl, desc->number, CHV_PADCTRL0); in chv_pinctrl_suspend_noirq()
1787 reg = chv_padreg(pctrl, desc->number, CHV_PADCTRL1); in chv_pinctrl_suspend_noirq()
1799 struct chv_pinctrl *pctrl = platform_get_drvdata(pdev); in chv_pinctrl_resume_noirq() local
1810 chv_writel(0, pctrl->regs + CHV_INTMASK); in chv_pinctrl_resume_noirq()
1812 for (i = 0; i < pctrl->community->npins; i++) { in chv_pinctrl_resume_noirq()
1818 desc = &pctrl->community->pins[i]; in chv_pinctrl_resume_noirq()
1819 if (chv_pad_locked(pctrl, desc->number)) in chv_pinctrl_resume_noirq()
1822 ctx = &pctrl->saved_pin_context[i]; in chv_pinctrl_resume_noirq()
1825 reg = chv_padreg(pctrl, desc->number, CHV_PADCTRL0); in chv_pinctrl_resume_noirq()
1829 dev_dbg(pctrl->dev, "restored pin %2u ctrl0 0x%08x\n", in chv_pinctrl_resume_noirq()
1833 reg = chv_padreg(pctrl, desc->number, CHV_PADCTRL1); in chv_pinctrl_resume_noirq()
1837 dev_dbg(pctrl->dev, "restored pin %2u ctrl1 0x%08x\n", in chv_pinctrl_resume_noirq()
1846 chv_writel(0xffff, pctrl->regs + CHV_INTSTAT); in chv_pinctrl_resume_noirq()
1847 chv_writel(pctrl->saved_intmask, pctrl->regs + CHV_INTMASK); in chv_pinctrl_resume_noirq()