Lines Matching +full:pctrl +full:- +full:syscon
20 #include <linux/mfd/syscon.h>
28 #include <linux/pinctrl/pinconf-generic.h>
34 #include "mtk-eint.h"
73 /* struct mtk_pin_field - the structure that holds the information of the field
88 /* struct mtk_pin_field_calc - the structure that holds the range providing
108 /* struct mtk_pin_reg_calc - the structure that holds all ranges used to
119 /* struct mtk_pin_soc - the structure that holds SoC-specific data */
133 struct pinctrl_dev *pctrl; member
941 writel_relaxed(val, pctl->base + reg); in mtk_w32()
946 return readl_relaxed(pctl->base + reg); in mtk_r32()
966 c = rc->range; in mtk_hw_pin_field_lookup()
967 e = c + rc->nranges; in mtk_hw_pin_field_lookup()
970 if (pin >= c->s_pin && pin <= c->e_pin) in mtk_hw_pin_field_lookup()
976 dev_err(hw->dev, "Out of range for pin = %d\n", pin); in mtk_hw_pin_field_lookup()
977 return -EINVAL; in mtk_hw_pin_field_lookup()
981 bits = c->s_bit + (pin - c->s_pin) * (c->x_bits); in mtk_hw_pin_field_lookup()
983 /* Fill pfd from bits and 32-bit register applied is assumed */ in mtk_hw_pin_field_lookup()
984 pfd->offset = c->s_addr + c->x_addrs * (bits / 32); in mtk_hw_pin_field_lookup()
985 pfd->bitpos = bits % 32; in mtk_hw_pin_field_lookup()
986 pfd->mask = (1 << c->x_bits) - 1; in mtk_hw_pin_field_lookup()
988 /* pfd->next is used for indicating that bit wrapping-around happens in mtk_hw_pin_field_lookup()
992 pfd->next = pfd->bitpos + c->x_bits - 1 > 31 ? c->x_addrs : 0; in mtk_hw_pin_field_lookup()
1003 dev_err(hw->dev, "Invalid Field %d\n", field); in mtk_hw_pin_field_get()
1004 return -EINVAL; in mtk_hw_pin_field_get()
1007 if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) { in mtk_hw_pin_field_get()
1008 rc = &hw->soc->reg_cal[field]; in mtk_hw_pin_field_get()
1010 dev_err(hw->dev, "Undefined range for field %d\n", field); in mtk_hw_pin_field_get()
1011 return -EINVAL; in mtk_hw_pin_field_get()
1019 *l = 32 - pf->bitpos; in mtk_hw_bits_part()
1020 *h = get_count_order(pf->mask) - *l; in mtk_hw_bits_part()
1030 mtk_rmw(hw, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
1031 (value & pf->mask) << pf->bitpos); in mtk_hw_write_cross_field()
1033 mtk_rmw(hw, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
1034 (value & pf->mask) >> nbits_l); in mtk_hw_write_cross_field()
1044 l = (mtk_r32(hw, pf->offset) >> pf->bitpos) & (BIT(nbits_l) - 1); in mtk_hw_read_cross_field()
1045 h = (mtk_r32(hw, pf->offset + pf->next)) & (BIT(nbits_h) - 1); in mtk_hw_read_cross_field()
1097 return -EINVAL; in mtk_pinmux_set_mux()
1101 return -EINVAL; in mtk_pinmux_set_mux()
1103 dev_dbg(pctldev->dev, "enable function %s group %s\n", in mtk_pinmux_set_mux()
1104 func->name, grp->name); in mtk_pinmux_set_mux()
1106 for (i = 0; i < grp->num_pins; i++) { in mtk_pinmux_set_mux()
1107 int *pin_modes = grp->data; in mtk_pinmux_set_mux()
1109 mtk_hw_set_value(hw, grp->pins[i], PINCTRL_PIN_REG_MODE, in mtk_pinmux_set_mux()
1153 return -EINVAL; in mtk_pinconf_get()
1169 return -EINVAL; in mtk_pinconf_get()
1178 /* HW takes input mode as zero; output mode as non-zero */ in mtk_pinconf_get()
1181 return -EINVAL; in mtk_pinconf_get()
1194 return -EINVAL; in mtk_pinconf_get()
1225 return -ENOTSUPP; in mtk_pinconf_get()
1312 arg = arg / 4 - 1; in mtk_pinconf_set()
1325 err = -ENOTSUPP; in mtk_pinconf_set()
1338 err = -ENOTSUPP; in mtk_pinconf_set()
1358 return -ENOTSUPP; in mtk_pinconf_group_get()
1362 return -ENOTSUPP; in mtk_pinconf_group_get()
1447 return pinctrl_gpio_direction_input(chip->base + gpio); in mtk_gpio_direction_input()
1455 return pinctrl_gpio_direction_output(chip->base + gpio); in mtk_gpio_direction_output()
1463 if (!hw->eint) in mtk_gpio_to_irq()
1464 return -ENOTSUPP; in mtk_gpio_to_irq()
1468 return mtk_eint_find_irq(hw->eint, eint_n); in mtk_gpio_to_irq()
1478 if (!hw->eint || in mtk_gpio_set_config()
1480 return -ENOTSUPP; in mtk_gpio_set_config()
1485 return mtk_eint_set_debounce(hw->eint, eint_n, debounce); in mtk_gpio_set_config()
1490 struct gpio_chip *chip = &hw->chip; in mtk_build_gpiochip()
1493 chip->label = PINCTRL_PINCTRL_DEV; in mtk_build_gpiochip()
1494 chip->parent = hw->dev; in mtk_build_gpiochip()
1495 chip->request = gpiochip_generic_request; in mtk_build_gpiochip()
1496 chip->free = gpiochip_generic_free; in mtk_build_gpiochip()
1497 chip->direction_input = mtk_gpio_direction_input; in mtk_build_gpiochip()
1498 chip->direction_output = mtk_gpio_direction_output; in mtk_build_gpiochip()
1499 chip->get = mtk_gpio_get; in mtk_build_gpiochip()
1500 chip->set = mtk_gpio_set; in mtk_build_gpiochip()
1501 chip->to_irq = mtk_gpio_to_irq, in mtk_build_gpiochip()
1502 chip->set_config = mtk_gpio_set_config, in mtk_build_gpiochip()
1503 chip->base = -1; in mtk_build_gpiochip()
1504 chip->ngpio = hw->soc->npins; in mtk_build_gpiochip()
1505 chip->of_node = np; in mtk_build_gpiochip()
1506 chip->of_gpio_n_cells = 2; in mtk_build_gpiochip()
1513 * "gpio-ranges" property. Otherwise, called directly from a in mtk_build_gpiochip()
1514 * DeviceTree-supported pinctrl driver is DEPRECATED. in mtk_build_gpiochip()
1517 * bind pinctrl and gpio drivers via the "gpio-ranges" property. in mtk_build_gpiochip()
1519 if (!of_find_property(np, "gpio-ranges", NULL)) { in mtk_build_gpiochip()
1520 ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0, in mtk_build_gpiochip()
1521 chip->ngpio); in mtk_build_gpiochip()
1535 for (i = 0; i < hw->soc->ngrps; i++) { in mtk_build_groups()
1536 const struct group_desc *group = hw->soc->grps + i; in mtk_build_groups()
1538 err = pinctrl_generic_add_group(hw->pctrl, group->name, in mtk_build_groups()
1539 group->pins, group->num_pins, in mtk_build_groups()
1540 group->data); in mtk_build_groups()
1542 dev_err(hw->dev, "Failed to register group %s\n", in mtk_build_groups()
1543 group->name); in mtk_build_groups()
1555 for (i = 0; i < hw->soc->nfuncs ; i++) { in mtk_build_functions()
1556 const struct function_desc *func = hw->soc->funcs + i; in mtk_build_functions()
1558 err = pinmux_generic_add_function(hw->pctrl, func->name, in mtk_build_functions()
1559 func->group_names, in mtk_build_functions()
1560 func->num_group_names, in mtk_build_functions()
1561 func->data); in mtk_build_functions()
1563 dev_err(hw->dev, "Failed to register function %s\n", in mtk_build_functions()
1564 func->name); in mtk_build_functions()
1578 *gpio_chip = &hw->chip; in mtk_xt_get_gpio_n()
1634 struct device_node *np = pdev->dev.of_node; in mtk_build_eint()
1640 if (!of_property_read_bool(np, "interrupt-controller")) in mtk_build_eint()
1641 return -ENODEV; in mtk_build_eint()
1643 hw->eint = devm_kzalloc(hw->dev, sizeof(*hw->eint), GFP_KERNEL); in mtk_build_eint()
1644 if (!hw->eint) in mtk_build_eint()
1645 return -ENOMEM; in mtk_build_eint()
1649 dev_err(&pdev->dev, "Unable to get eint resource\n"); in mtk_build_eint()
1650 return -ENODEV; in mtk_build_eint()
1653 hw->eint->base = devm_ioremap_resource(&pdev->dev, res); in mtk_build_eint()
1654 if (IS_ERR(hw->eint->base)) in mtk_build_eint()
1655 return PTR_ERR(hw->eint->base); in mtk_build_eint()
1657 hw->eint->irq = irq_of_parse_and_map(np, 0); in mtk_build_eint()
1658 if (!hw->eint->irq) in mtk_build_eint()
1659 return -EINVAL; in mtk_build_eint()
1661 hw->eint->dev = &pdev->dev; in mtk_build_eint()
1662 hw->eint->hw = hw->soc->eint_hw; in mtk_build_eint()
1663 hw->eint->pctl = hw; in mtk_build_eint()
1664 hw->eint->gpio_xlate = &mtk_eint_xt; in mtk_build_eint()
1666 return mtk_eint_do_init(hw->eint); in mtk_build_eint()
1670 { .compatible = "mediatek,mt7622-pinctrl", .data = &mt7622_data},
1679 of_match_device(mtk_pinctrl_of_match, &pdev->dev); in mtk_pinctrl_probe()
1682 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL); in mtk_pinctrl_probe()
1684 return -ENOMEM; in mtk_pinctrl_probe()
1686 hw->soc = of_id->data; in mtk_pinctrl_probe()
1690 dev_err(&pdev->dev, "missing IO resource\n"); in mtk_pinctrl_probe()
1691 return -ENXIO; in mtk_pinctrl_probe()
1694 hw->dev = &pdev->dev; in mtk_pinctrl_probe()
1695 hw->base = devm_ioremap_resource(&pdev->dev, res); in mtk_pinctrl_probe()
1696 if (IS_ERR(hw->base)) in mtk_pinctrl_probe()
1697 return PTR_ERR(hw->base); in mtk_pinctrl_probe()
1700 mtk_desc.pins = hw->soc->pins; in mtk_pinctrl_probe()
1701 mtk_desc.npins = hw->soc->npins; in mtk_pinctrl_probe()
1708 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw, in mtk_pinctrl_probe()
1709 &hw->pctrl); in mtk_pinctrl_probe()
1716 dev_err(&pdev->dev, "Failed to build groups\n"); in mtk_pinctrl_probe()
1723 dev_err(&pdev->dev, "Failed to build functions\n"); in mtk_pinctrl_probe()
1730 err = pinctrl_enable(hw->pctrl); in mtk_pinctrl_probe()
1736 dev_warn(&pdev->dev, in mtk_pinctrl_probe()
1740 err = mtk_build_gpiochip(hw, pdev->dev.of_node); in mtk_pinctrl_probe()
1742 dev_err(&pdev->dev, "Failed to add gpio_chip\n"); in mtk_pinctrl_probe()
1753 .name = "mtk-pinctrl",