Lines Matching full:pctrl
45 * @pctrl: pinctrl handle.
59 struct pinctrl_dev *pctrl; member
78 struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in msm_get_groups_count() local
80 return pctrl->soc->ngroups; in msm_get_groups_count()
86 struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in msm_get_group_name() local
88 return pctrl->soc->groups[group].name; in msm_get_group_name()
96 struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in msm_get_group_pins() local
98 *pins = pctrl->soc->groups[group].pins; in msm_get_group_pins()
99 *num_pins = pctrl->soc->groups[group].npins; in msm_get_group_pins()
113 struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in msm_pinmux_request() local
114 struct gpio_chip *chip = &pctrl->chip; in msm_pinmux_request()
121 struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in msm_get_functions_count() local
123 return pctrl->soc->nfunctions; in msm_get_functions_count()
129 struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in msm_get_function_name() local
131 return pctrl->soc->functions[function].name; in msm_get_function_name()
139 struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in msm_get_function_groups() local
141 *groups = pctrl->soc->functions[function].groups; in msm_get_function_groups()
142 *num_groups = pctrl->soc->functions[function].ngroups; in msm_get_function_groups()
150 struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in msm_pinmux_set_mux() local
156 g = &pctrl->soc->groups[group]; in msm_pinmux_set_mux()
167 raw_spin_lock_irqsave(&pctrl->lock, flags); in msm_pinmux_set_mux()
169 val = readl(pctrl->regs + g->ctl_reg); in msm_pinmux_set_mux()
172 writel(val, pctrl->regs + g->ctl_reg); in msm_pinmux_set_mux()
174 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in msm_pinmux_set_mux()
187 static int msm_config_reg(struct msm_pinctrl *pctrl, in msm_config_reg() argument
233 struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in msm_config_group_get() local
241 g = &pctrl->soc->groups[group]; in msm_config_group_get()
243 ret = msm_config_reg(pctrl, g, param, &mask, &bit); in msm_config_group_get()
247 val = readl(pctrl->regs + g->ctl_reg); in msm_config_group_get()
263 if (pctrl->soc->pull_no_keeper) in msm_config_group_get()
271 if (pctrl->soc->pull_no_keeper) in msm_config_group_get()
286 val = readl(pctrl->regs + g->io_reg); in msm_config_group_get()
310 struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in msm_config_group_set() local
320 g = &pctrl->soc->groups[group]; in msm_config_group_set()
326 ret = msm_config_reg(pctrl, g, param, &mask, &bit); in msm_config_group_set()
339 if (pctrl->soc->pull_no_keeper) in msm_config_group_set()
345 if (pctrl->soc->pull_no_keeper) in msm_config_group_set()
359 raw_spin_lock_irqsave(&pctrl->lock, flags); in msm_config_group_set()
360 val = readl(pctrl->regs + g->io_reg); in msm_config_group_set()
365 writel(val, pctrl->regs + g->io_reg); in msm_config_group_set()
366 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in msm_config_group_set()
376 dev_err(pctrl->dev, "Unsupported config parameter: %x\n", in msm_config_group_set()
383 dev_err(pctrl->dev, "config %x: %x is invalid\n", param, arg); in msm_config_group_set()
387 raw_spin_lock_irqsave(&pctrl->lock, flags); in msm_config_group_set()
388 val = readl(pctrl->regs + g->ctl_reg); in msm_config_group_set()
391 writel(val, pctrl->regs + g->ctl_reg); in msm_config_group_set()
392 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in msm_config_group_set()
407 struct msm_pinctrl *pctrl = gpiochip_get_data(chip); in msm_gpio_direction_input() local
411 g = &pctrl->soc->groups[offset]; in msm_gpio_direction_input()
413 raw_spin_lock_irqsave(&pctrl->lock, flags); in msm_gpio_direction_input()
415 val = readl(pctrl->regs + g->ctl_reg); in msm_gpio_direction_input()
417 writel(val, pctrl->regs + g->ctl_reg); in msm_gpio_direction_input()
419 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in msm_gpio_direction_input()
427 struct msm_pinctrl *pctrl = gpiochip_get_data(chip); in msm_gpio_direction_output() local
431 g = &pctrl->soc->groups[offset]; in msm_gpio_direction_output()
433 raw_spin_lock_irqsave(&pctrl->lock, flags); in msm_gpio_direction_output()
435 val = readl(pctrl->regs + g->io_reg); in msm_gpio_direction_output()
440 writel(val, pctrl->regs + g->io_reg); in msm_gpio_direction_output()
442 val = readl(pctrl->regs + g->ctl_reg); in msm_gpio_direction_output()
444 writel(val, pctrl->regs + g->ctl_reg); in msm_gpio_direction_output()
446 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in msm_gpio_direction_output()
453 struct msm_pinctrl *pctrl = gpiochip_get_data(chip); in msm_gpio_get_direction() local
457 g = &pctrl->soc->groups[offset]; in msm_gpio_get_direction()
459 val = readl(pctrl->regs + g->ctl_reg); in msm_gpio_get_direction()
468 struct msm_pinctrl *pctrl = gpiochip_get_data(chip); in msm_gpio_get() local
471 g = &pctrl->soc->groups[offset]; in msm_gpio_get()
473 val = readl(pctrl->regs + g->io_reg); in msm_gpio_get()
480 struct msm_pinctrl *pctrl = gpiochip_get_data(chip); in msm_gpio_set() local
484 g = &pctrl->soc->groups[offset]; in msm_gpio_set()
486 raw_spin_lock_irqsave(&pctrl->lock, flags); in msm_gpio_set()
488 val = readl(pctrl->regs + g->io_reg); in msm_gpio_set()
493 writel(val, pctrl->regs + g->io_reg); in msm_gpio_set()
495 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in msm_gpio_set()
508 struct msm_pinctrl *pctrl = gpiochip_get_data(chip); in msm_gpio_dbg_show_one() local
532 g = &pctrl->soc->groups[offset]; in msm_gpio_dbg_show_one()
533 ctl_reg = readl(pctrl->regs + g->ctl_reg); in msm_gpio_dbg_show_one()
534 io_reg = readl(pctrl->regs + g->io_reg); in msm_gpio_dbg_show_one()
549 if (pctrl->soc->pull_no_keeper) in msm_gpio_dbg_show_one()
600 static void msm_gpio_update_dual_edge_pos(struct msm_pinctrl *pctrl, in msm_gpio_update_dual_edge_pos() argument
609 val = readl(pctrl->regs + g->io_reg) & BIT(g->in_bit); in msm_gpio_update_dual_edge_pos()
611 pol = readl(pctrl->regs + g->intr_cfg_reg); in msm_gpio_update_dual_edge_pos()
613 writel(pol, pctrl->regs + g->intr_cfg_reg); in msm_gpio_update_dual_edge_pos()
615 val2 = readl(pctrl->regs + g->io_reg) & BIT(g->in_bit); in msm_gpio_update_dual_edge_pos()
616 intstat = readl(pctrl->regs + g->intr_status_reg); in msm_gpio_update_dual_edge_pos()
620 dev_err(pctrl->dev, "dual-edge irq failed to stabilize, %#08x != %#08x\n", in msm_gpio_update_dual_edge_pos()
627 struct msm_pinctrl *pctrl = gpiochip_get_data(gc); in msm_gpio_irq_mask() local
632 g = &pctrl->soc->groups[d->hwirq]; in msm_gpio_irq_mask()
634 raw_spin_lock_irqsave(&pctrl->lock, flags); in msm_gpio_irq_mask()
636 val = readl(pctrl->regs + g->intr_cfg_reg); in msm_gpio_irq_mask()
661 writel(val, pctrl->regs + g->intr_cfg_reg); in msm_gpio_irq_mask()
663 clear_bit(d->hwirq, pctrl->enabled_irqs); in msm_gpio_irq_mask()
665 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in msm_gpio_irq_mask()
671 struct msm_pinctrl *pctrl = gpiochip_get_data(gc); in msm_gpio_irq_unmask() local
676 g = &pctrl->soc->groups[d->hwirq]; in msm_gpio_irq_unmask()
678 raw_spin_lock_irqsave(&pctrl->lock, flags); in msm_gpio_irq_unmask()
680 val = readl(pctrl->regs + g->intr_cfg_reg); in msm_gpio_irq_unmask()
683 writel(val, pctrl->regs + g->intr_cfg_reg); in msm_gpio_irq_unmask()
685 set_bit(d->hwirq, pctrl->enabled_irqs); in msm_gpio_irq_unmask()
687 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in msm_gpio_irq_unmask()
693 struct msm_pinctrl *pctrl = gpiochip_get_data(gc); in msm_gpio_irq_ack() local
698 g = &pctrl->soc->groups[d->hwirq]; in msm_gpio_irq_ack()
700 raw_spin_lock_irqsave(&pctrl->lock, flags); in msm_gpio_irq_ack()
702 val = readl(pctrl->regs + g->intr_status_reg); in msm_gpio_irq_ack()
707 writel(val, pctrl->regs + g->intr_status_reg); in msm_gpio_irq_ack()
709 if (test_bit(d->hwirq, pctrl->dual_edge_irqs)) in msm_gpio_irq_ack()
710 msm_gpio_update_dual_edge_pos(pctrl, g, d); in msm_gpio_irq_ack()
712 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in msm_gpio_irq_ack()
718 struct msm_pinctrl *pctrl = gpiochip_get_data(gc); in msm_gpio_irq_set_type() local
723 g = &pctrl->soc->groups[d->hwirq]; in msm_gpio_irq_set_type()
725 raw_spin_lock_irqsave(&pctrl->lock, flags); in msm_gpio_irq_set_type()
731 set_bit(d->hwirq, pctrl->dual_edge_irqs); in msm_gpio_irq_set_type()
733 clear_bit(d->hwirq, pctrl->dual_edge_irqs); in msm_gpio_irq_set_type()
736 val = readl(pctrl->regs + g->intr_target_reg); in msm_gpio_irq_set_type()
739 writel(val, pctrl->regs + g->intr_target_reg); in msm_gpio_irq_set_type()
746 val = readl(pctrl->regs + g->intr_cfg_reg); in msm_gpio_irq_set_type()
794 writel(val, pctrl->regs + g->intr_cfg_reg); in msm_gpio_irq_set_type()
796 if (test_bit(d->hwirq, pctrl->dual_edge_irqs)) in msm_gpio_irq_set_type()
797 msm_gpio_update_dual_edge_pos(pctrl, g, d); in msm_gpio_irq_set_type()
799 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in msm_gpio_irq_set_type()
812 struct msm_pinctrl *pctrl = gpiochip_get_data(gc); in msm_gpio_irq_set_wake() local
815 raw_spin_lock_irqsave(&pctrl->lock, flags); in msm_gpio_irq_set_wake()
817 irq_set_irq_wake(pctrl->irq, on); in msm_gpio_irq_set_wake()
819 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in msm_gpio_irq_set_wake()
828 struct msm_pinctrl *pctrl = gpiochip_get_data(gc); in msm_gpio_irq_handler() local
841 for_each_set_bit(i, pctrl->enabled_irqs, pctrl->chip.ngpio) { in msm_gpio_irq_handler()
842 g = &pctrl->soc->groups[i]; in msm_gpio_irq_handler()
843 val = readl(pctrl->regs + g->intr_status_reg); in msm_gpio_irq_handler()
859 struct msm_pinctrl *pctrl) in msm_gpio_init_valid_mask() argument
863 unsigned int max_gpios = pctrl->soc->ngpios; in msm_gpio_init_valid_mask()
867 len = ret = device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0); in msm_gpio_init_valid_mask()
878 ret = device_property_read_u16_array(pctrl->dev, "gpios", tmp, len); in msm_gpio_init_valid_mask()
880 dev_err(pctrl->dev, "could not read list of GPIOs\n"); in msm_gpio_init_valid_mask()
893 static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl) in msm_gpio_needs_valid_mask() argument
895 return device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0) > 0; in msm_gpio_needs_valid_mask()
898 static int msm_gpio_init(struct msm_pinctrl *pctrl) in msm_gpio_init() argument
902 unsigned ngpio = pctrl->soc->ngpios; in msm_gpio_init()
907 chip = &pctrl->chip; in msm_gpio_init()
910 chip->label = dev_name(pctrl->dev); in msm_gpio_init()
911 chip->parent = pctrl->dev; in msm_gpio_init()
913 chip->of_node = pctrl->dev->of_node; in msm_gpio_init()
914 chip->need_valid_mask = msm_gpio_needs_valid_mask(pctrl); in msm_gpio_init()
916 pctrl->irq_chip.name = "msmgpio"; in msm_gpio_init()
917 pctrl->irq_chip.irq_mask = msm_gpio_irq_mask; in msm_gpio_init()
918 pctrl->irq_chip.irq_unmask = msm_gpio_irq_unmask; in msm_gpio_init()
919 pctrl->irq_chip.irq_ack = msm_gpio_irq_ack; in msm_gpio_init()
920 pctrl->irq_chip.irq_set_type = msm_gpio_irq_set_type; in msm_gpio_init()
921 pctrl->irq_chip.irq_set_wake = msm_gpio_irq_set_wake; in msm_gpio_init()
923 ret = gpiochip_add_data(&pctrl->chip, pctrl); in msm_gpio_init()
925 dev_err(pctrl->dev, "Failed register gpiochip\n"); in msm_gpio_init()
929 ret = msm_gpio_init_valid_mask(chip, pctrl); in msm_gpio_init()
931 dev_err(pctrl->dev, "Failed to setup irq valid bits\n"); in msm_gpio_init()
932 gpiochip_remove(&pctrl->chip); in msm_gpio_init()
946 if (!of_property_read_bool(pctrl->dev->of_node, "gpio-ranges")) { in msm_gpio_init()
947 ret = gpiochip_add_pin_range(&pctrl->chip, in msm_gpio_init()
948 dev_name(pctrl->dev), 0, 0, chip->ngpio); in msm_gpio_init()
950 dev_err(pctrl->dev, "Failed to add pin range\n"); in msm_gpio_init()
951 gpiochip_remove(&pctrl->chip); in msm_gpio_init()
957 &pctrl->irq_chip, in msm_gpio_init()
962 dev_err(pctrl->dev, "Failed to add irqchip to gpiochip\n"); in msm_gpio_init()
963 gpiochip_remove(&pctrl->chip); in msm_gpio_init()
967 gpiochip_set_chained_irqchip(chip, &pctrl->irq_chip, pctrl->irq, in msm_gpio_init()
976 struct msm_pinctrl *pctrl = container_of(nb, struct msm_pinctrl, restart_nb); in msm_ps_hold_restart() local
978 writel(0, pctrl->regs + PS_HOLD_OFFSET); in msm_ps_hold_restart()
990 static void msm_pinctrl_setup_pm_reset(struct msm_pinctrl *pctrl) in msm_pinctrl_setup_pm_reset() argument
993 const struct msm_function *func = pctrl->soc->functions; in msm_pinctrl_setup_pm_reset()
995 for (i = 0; i < pctrl->soc->nfunctions; i++) in msm_pinctrl_setup_pm_reset()
997 pctrl->restart_nb.notifier_call = msm_ps_hold_restart; in msm_pinctrl_setup_pm_reset()
998 pctrl->restart_nb.priority = 128; in msm_pinctrl_setup_pm_reset()
999 if (register_restart_handler(&pctrl->restart_nb)) in msm_pinctrl_setup_pm_reset()
1000 dev_err(pctrl->dev, in msm_pinctrl_setup_pm_reset()
1002 poweroff_pctrl = pctrl; in msm_pinctrl_setup_pm_reset()
1011 struct msm_pinctrl *pctrl; in msm_pinctrl_probe() local
1015 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); in msm_pinctrl_probe()
1016 if (!pctrl) in msm_pinctrl_probe()
1019 pctrl->dev = &pdev->dev; in msm_pinctrl_probe()
1020 pctrl->soc = soc_data; in msm_pinctrl_probe()
1021 pctrl->chip = msm_gpio_template; in msm_pinctrl_probe()
1023 raw_spin_lock_init(&pctrl->lock); in msm_pinctrl_probe()
1026 pctrl->regs = devm_ioremap_resource(&pdev->dev, res); in msm_pinctrl_probe()
1027 if (IS_ERR(pctrl->regs)) in msm_pinctrl_probe()
1028 return PTR_ERR(pctrl->regs); in msm_pinctrl_probe()
1030 msm_pinctrl_setup_pm_reset(pctrl); in msm_pinctrl_probe()
1032 pctrl->irq = platform_get_irq(pdev, 0); in msm_pinctrl_probe()
1033 if (pctrl->irq < 0) { in msm_pinctrl_probe()
1035 return pctrl->irq; in msm_pinctrl_probe()
1038 pctrl->desc.owner = THIS_MODULE; in msm_pinctrl_probe()
1039 pctrl->desc.pctlops = &msm_pinctrl_ops; in msm_pinctrl_probe()
1040 pctrl->desc.pmxops = &msm_pinmux_ops; in msm_pinctrl_probe()
1041 pctrl->desc.confops = &msm_pinconf_ops; in msm_pinctrl_probe()
1042 pctrl->desc.name = dev_name(&pdev->dev); in msm_pinctrl_probe()
1043 pctrl->desc.pins = pctrl->soc->pins; in msm_pinctrl_probe()
1044 pctrl->desc.npins = pctrl->soc->npins; in msm_pinctrl_probe()
1046 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl); in msm_pinctrl_probe()
1047 if (IS_ERR(pctrl->pctrl)) { in msm_pinctrl_probe()
1049 return PTR_ERR(pctrl->pctrl); in msm_pinctrl_probe()
1052 ret = msm_gpio_init(pctrl); in msm_pinctrl_probe()
1056 platform_set_drvdata(pdev, pctrl); in msm_pinctrl_probe()
1066 struct msm_pinctrl *pctrl = platform_get_drvdata(pdev); in msm_pinctrl_remove() local
1068 gpiochip_remove(&pctrl->chip); in msm_pinctrl_remove()
1070 unregister_restart_handler(&pctrl->restart_nb); in msm_pinctrl_remove()