2  * drivers/pwm/pwm-tegra.c
4  * Tegra pulse-width-modulation controller driver
7  * Based on arch/arm/plat-mxc/pwm.c by Sascha Hauer <s.hauer@pengutronix.de>
21  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
24 #include <linux/clk.h>
53 	struct clk *clk;  member
70 	return readl(chip->regs + (num << 4));  in pwm_readl()
76 	writel(val, chip->regs + (num << 4));  in pwm_writel()
83 	unsigned long long c = duty_ns, hz;  in tegra_pwm_config()  local
84 	unsigned long rate;  in tegra_pwm_config()  local
100 	 * cycles at the PWM clock rate will take period_ns nanoseconds.  in tegra_pwm_config()
102 	rate = pc->clk_rate >> PWM_DUTY_WIDTH;  in tegra_pwm_config()
104 	/* Consider precision in PWM_SCALE_WIDTH rate calculation */  in tegra_pwm_config()
105 	hz = DIV_ROUND_CLOSEST_ULL(100ULL * NSEC_PER_SEC, period_ns);  in tegra_pwm_config()
106 	rate = DIV_ROUND_CLOSEST_ULL(100ULL * rate, hz);  in tegra_pwm_config()
113 	if (rate > 0)  in tegra_pwm_config()
114 		rate--;  in tegra_pwm_config()
117 	 * Make sure that the rate will fit in the register's frequency  in tegra_pwm_config()
120 	if (rate >> PWM_SCALE_WIDTH)  in tegra_pwm_config()
121 		return -EINVAL;  in tegra_pwm_config()
123 	val |= rate << PWM_SCALE_SHIFT;  in tegra_pwm_config()
130 		err = clk_prepare_enable(pc->clk);  in tegra_pwm_config()
136 	pwm_writel(pc, pwm->hwpwm, val);  in tegra_pwm_config()
142 		clk_disable_unprepare(pc->clk);  in tegra_pwm_config()
153 	rc = clk_prepare_enable(pc->clk);  in tegra_pwm_enable()
157 	val = pwm_readl(pc, pwm->hwpwm);  in tegra_pwm_enable()
159 	pwm_writel(pc, pwm->hwpwm, val);  in tegra_pwm_enable()
169 	val = pwm_readl(pc, pwm->hwpwm);  in tegra_pwm_disable()
171 	pwm_writel(pc, pwm->hwpwm, val);  in tegra_pwm_disable()
173 	clk_disable_unprepare(pc->clk);  in tegra_pwm_disable()
189 	pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);  in tegra_pwm_probe()
191 		return -ENOMEM;  in tegra_pwm_probe()
193 	pwm->soc = of_device_get_match_data(&pdev->dev);  in tegra_pwm_probe()
194 	pwm->dev = &pdev->dev;  in tegra_pwm_probe()
197 	pwm->regs = devm_ioremap_resource(&pdev->dev, r);  in tegra_pwm_probe()
198 	if (IS_ERR(pwm->regs))  in tegra_pwm_probe()
199 		return PTR_ERR(pwm->regs);  in tegra_pwm_probe()
203 	pwm->clk = devm_clk_get(&pdev->dev, NULL);  in tegra_pwm_probe()
204 	if (IS_ERR(pwm->clk))  in tegra_pwm_probe()
205 		return PTR_ERR(pwm->clk);  in tegra_pwm_probe()
208 	ret = clk_set_rate(pwm->clk, pwm->soc->max_frequency);  in tegra_pwm_probe()
210 		dev_err(&pdev->dev, "Failed to set max frequency: %d\n", ret);  in tegra_pwm_probe()
219 	pwm->clk_rate = clk_get_rate(pwm->clk);  in tegra_pwm_probe()
221 	pwm->rst = devm_reset_control_get_exclusive(&pdev->dev, "pwm");  in tegra_pwm_probe()
222 	if (IS_ERR(pwm->rst)) {  in tegra_pwm_probe()
223 		ret = PTR_ERR(pwm->rst);  in tegra_pwm_probe()
224 		dev_err(&pdev->dev, "Reset control is not found: %d\n", ret);  in tegra_pwm_probe()
228 	reset_control_deassert(pwm->rst);  in tegra_pwm_probe()
230 	pwm->chip.dev = &pdev->dev;  in tegra_pwm_probe()
231 	pwm->chip.ops = &tegra_pwm_ops;  in tegra_pwm_probe()
232 	pwm->chip.base = -1;  in tegra_pwm_probe()
233 	pwm->chip.npwm = pwm->soc->num_channels;  in tegra_pwm_probe()
235 	ret = pwmchip_add(&pwm->chip);  in tegra_pwm_probe()
237 		dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);  in tegra_pwm_probe()
238 		reset_control_assert(pwm->rst);  in tegra_pwm_probe()
252 		return -ENODEV;  in tegra_pwm_remove()
254 	err = clk_prepare_enable(pc->clk);  in tegra_pwm_remove()
258 	for (i = 0; i < pc->chip.npwm; i++) {  in tegra_pwm_remove()
259 		struct pwm_device *pwm = &pc->chip.pwms[i];  in tegra_pwm_remove()
262 			if (clk_prepare_enable(pc->clk) < 0)  in tegra_pwm_remove()
267 		clk_disable_unprepare(pc->clk);  in tegra_pwm_remove()
270 	reset_control_assert(pc->rst);  in tegra_pwm_remove()
271 	clk_disable_unprepare(pc->clk);  in tegra_pwm_remove()
273 	return pwmchip_remove(&pc->chip);  in tegra_pwm_remove()
299 	{ .compatible = "nvidia,tegra20-pwm", .data = &tegra20_pwm_soc },
300 	{ .compatible = "nvidia,tegra186-pwm", .data = &tegra186_pwm_soc },
312 		.name = "tegra-pwm",
324 MODULE_ALIAS("platform:tegra-pwm");