24  * Note that reading the DSR (DryIce Status Register) automatically clears
64 #define DSR       0x14           /* Status Reg */  macro
112  * @dsr: copy of the DSR register
123 	u32 dsr;  member
193 static void di_report_tamper_info(struct imxdi_dev *imxdi,  u32 dsr)  in di_report_tamper_info()  argument
201 	if (dsr & DSR_VTD)  in di_report_tamper_info()
205 	if (dsr & DSR_CTD)  in di_report_tamper_info()
209 	if (dsr & DSR_TTD)  in di_report_tamper_info()
213 	if (dsr & DSR_SAD)  in di_report_tamper_info()
218 	if (dsr & DSR_EBD)  in di_report_tamper_info()
222 	if (dsr & DSR_ETAD)  in di_report_tamper_info()
226 	if (dsr & DSR_ETBD)  in di_report_tamper_info()
230 	if (dsr & DSR_WTD)  in di_report_tamper_info()
234 	if (dsr & DSR_MCO)  in di_report_tamper_info()
239 	if (dsr & DSR_TCO)  in di_report_tamper_info()
251 static int di_handle_failure_state(struct imxdi_dev *imxdi, u32 dsr)  in di_handle_failure_state()  argument
255 	dev_dbg(&imxdi->pdev->dev, "DSR register reports: %08X\n", dsr);  in di_handle_failure_state()
258 	di_report_tamper_info(imxdi, dsr);  in di_handle_failure_state()
276 static int di_handle_valid_state(struct imxdi_dev *imxdi, u32 dsr)  in di_handle_valid_state()  argument
283 	if (dsr & DSR_CAF)  in di_handle_valid_state()
284 		di_write_busy_wait(imxdi, DSR_CAF, DSR);  in di_handle_valid_state()
289 static int di_handle_invalid_state(struct imxdi_dev *imxdi, u32 dsr)  in di_handle_invalid_state()  argument
324 	 *   - its overflow flag is set (TCO in DSR)  in di_handle_invalid_state()
326 	 *   - NVF is set in DSR  in di_handle_invalid_state()
334 	di_write_busy_wait(imxdi, DSR_NVF, DSR);  in di_handle_invalid_state()
336 	di_write_busy_wait(imxdi, DSR_TCO, DSR);  in di_handle_invalid_state()
343 	return di_handle_valid_state(imxdi, __raw_readl(imxdi->ioaddr + DSR));  in di_handle_invalid_state()
346 static int di_handle_invalid_and_failure_state(struct imxdi_dev *imxdi, u32 dsr)  in di_handle_invalid_and_failure_state()  argument
355 	if (dsr & (DSR_WTD | DSR_ETBD | DSR_ETAD | DSR_EBD | DSR_SAD |  in di_handle_invalid_and_failure_state()
384 	di_write_busy_wait(imxdi, dsr & (DSR_WTD | DSR_ETBD | DSR_ETAD |  in di_handle_invalid_and_failure_state()
386 			DSR_MCO | DSR_TCO), DSR);  in di_handle_invalid_and_failure_state()
388 	dsr = readl(imxdi->ioaddr + DSR);  in di_handle_invalid_and_failure_state()
389 	if ((dsr & ~(DSR_NVF | DSR_SVF | DSR_WBF | DSR_WNF |  in di_handle_invalid_and_failure_state()
392 			 "There are still some sources of pain in DSR: %08x!\n",  in di_handle_invalid_and_failure_state()
393 			 dsr & ~(DSR_NVF | DSR_SVF | DSR_WBF | DSR_WNF |  in di_handle_invalid_and_failure_state()
400 	di_write_busy_wait(imxdi, DSR_SVF, DSR);  in di_handle_invalid_and_failure_state()
403 	dsr = readl(imxdi->ioaddr + DSR);  in di_handle_invalid_and_failure_state()
404 	if (dsr & DSR_SVF) {  in di_handle_invalid_and_failure_state()
416 	return di_handle_invalid_state(imxdi, dsr);  in di_handle_invalid_and_failure_state()
422 	u32 dsr;  in di_handle_state()  local
424 	dsr = readl(imxdi->ioaddr + DSR);  in di_handle_state()
426 	switch (dsr & (DSR_NVF | DSR_SVF)) {  in di_handle_state()
429 		rc = di_handle_invalid_state(imxdi, dsr);  in di_handle_state()
433 		rc = di_handle_failure_state(imxdi, dsr);  in di_handle_state()
438 		rc = di_handle_invalid_and_failure_state(imxdi, dsr);  in di_handle_state()
442 		rc = di_handle_valid_state(imxdi, dsr);  in di_handle_state()
488 	writel(DSR_WEF, imxdi->ioaddr + DSR);  in clear_write_error()
492 		if ((readl(imxdi->ioaddr + DSR) & DSR_WEF) == 0)  in clear_write_error()
517 	imxdi->dsr = 0;  in di_write_wait()
524 			imxdi->dsr & (DSR_WCF | DSR_WEF), msecs_to_jiffies(1));  in di_write_wait()
535 	if (imxdi->dsr & DSR_WEF) {  in di_write_wait()
567 	u32 dcr, dsr;  in dryice_rtc_set_mmss()  local
571 	dsr = readl(imxdi->ioaddr + DSR);  in dryice_rtc_set_mmss()
573 	if (!(dcr & DCR_TCE) || (dsr & DSR_SVF)) {  in dryice_rtc_set_mmss()
579 		if ((dcr & DCR_TCSL) || (dsr & DSR_SVF)) {  in dryice_rtc_set_mmss()
626 	/* don't allow the DSR read to mess up DSR_WCF */  in dryice_rtc_read_alarm()
630 	alarm->pending = (readl(imxdi->ioaddr + DSR) & DSR_CAF) != 0;  in dryice_rtc_read_alarm()
683 	u32 dsr, dier;  in dryice_irq()  local
687 	dsr = readl(imxdi->ioaddr + DSR);  in dryice_irq()
691 		if (dsr & DSR_SVF) {  in dryice_irq()
702 			di_report_tamper_info(imxdi, dsr);  in dryice_irq()
715 		/* DSR_WCF clears itself on DSR read */  in dryice_irq()
716 		if (dsr & (DSR_WCF | DSR_WEF)) {  in dryice_irq()
720 			/* save the dsr value for the wait queue */  in dryice_irq()
721 			imxdi->dsr |= dsr;  in dryice_irq()
730 		/* DSR_WCF clears itself on DSR read */  in dryice_irq()
731 		if (dsr & DSR_CAF) {  in dryice_irq()
753 	di_write_wait(imxdi, DSR_CAF, DSR);  in dryice_work()