Lines Matching +full:reset +full:- +full:assert +full:- +full:ms
2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
79 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
89 } while (!(ctrl & JZ_RTC_CTRL_WRDY) && --timeout); in jz4740_rtc_wait_write_ready()
91 return timeout ? 0 : -EIO; in jz4740_rtc_wait_write_ready()
103 writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write()
106 ctrl = readl(rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write()
107 } while (!(ctrl & JZ_RTC_WENR_WEN) && --timeout); in jz4780_rtc_enable_write()
109 return timeout ? 0 : -EIO; in jz4780_rtc_enable_write()
117 if (rtc->type >= ID_JZ4780) in jz4740_rtc_reg_write()
122 writel(val, rtc->base + reg); in jz4740_rtc_reg_write()
134 spin_lock_irqsave(&rtc->lock, flags); in jz4740_rtc_ctrl_set_bits()
148 spin_unlock_irqrestore(&rtc->lock, flags); in jz4740_rtc_ctrl_set_bits()
166 while (secs != secs2 && --timeout) { in jz4740_rtc_read_time()
172 return -EIO; in jz4740_rtc_read_time()
196 alrm->enabled = !!(ctrl & JZ_RTC_CTRL_AE); in jz4740_rtc_read_alarm()
197 alrm->pending = !!(ctrl & JZ_RTC_CTRL_AF); in jz4740_rtc_read_alarm()
199 rtc_time_to_tm(secs, &alrm->time); in jz4740_rtc_read_alarm()
201 return rtc_valid_tm(&alrm->time); in jz4740_rtc_read_alarm()
210 rtc_tm_to_time(&alrm->time, &secs); in jz4740_rtc_set_alarm()
215 JZ_RTC_CTRL_AE | JZ_RTC_CTRL_AF_IRQ, alrm->enabled); in jz4740_rtc_set_alarm()
248 rtc_update_irq(rtc->rtc, 1, events); in jz4740_rtc_irq()
268 clk_prepare_enable(rtc->clk); in jz4740_rtc_power_off()
270 rtc_rate = clk_get_rate(rtc->clk); in jz4740_rtc_power_off()
273 * Set minimum wakeup pin assertion time: 100 ms. in jz4740_rtc_power_off()
277 (rtc->min_wakeup_pin_assert_time * rtc_rate) / 1000; in jz4740_rtc_power_off()
286 * Set reset pin low-level assertion time after wakeup: 60 ms. in jz4740_rtc_power_off()
287 * Range is 0 to 125 ms if RTC is clocked at 32 kHz. in jz4740_rtc_power_off()
289 reset_counter_ticks = (rtc->reset_pin_assert_time * rtc_rate) / 1000; in jz4740_rtc_power_off()
302 { .compatible = "ingenic,jz4740-rtc", .data = (void *)ID_JZ4740 },
303 { .compatible = "ingenic,jz4780-rtc", .data = (void *)ID_JZ4780 },
316 jz4740_rtc_of_match, &pdev->dev); in jz4740_rtc_probe()
317 struct device_node *np = pdev->dev.of_node; in jz4740_rtc_probe()
319 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL); in jz4740_rtc_probe()
321 return -ENOMEM; in jz4740_rtc_probe()
324 rtc->type = (enum jz4740_rtc_type)of_id->data; in jz4740_rtc_probe()
326 rtc->type = id->driver_data; in jz4740_rtc_probe()
328 rtc->irq = platform_get_irq(pdev, 0); in jz4740_rtc_probe()
329 if (rtc->irq < 0) { in jz4740_rtc_probe()
330 dev_err(&pdev->dev, "Failed to get platform irq\n"); in jz4740_rtc_probe()
331 return -ENOENT; in jz4740_rtc_probe()
335 rtc->base = devm_ioremap_resource(&pdev->dev, mem); in jz4740_rtc_probe()
336 if (IS_ERR(rtc->base)) in jz4740_rtc_probe()
337 return PTR_ERR(rtc->base); in jz4740_rtc_probe()
339 rtc->clk = devm_clk_get(&pdev->dev, "rtc"); in jz4740_rtc_probe()
340 if (IS_ERR(rtc->clk)) { in jz4740_rtc_probe()
341 dev_err(&pdev->dev, "Failed to get RTC clock\n"); in jz4740_rtc_probe()
342 return PTR_ERR(rtc->clk); in jz4740_rtc_probe()
345 spin_lock_init(&rtc->lock); in jz4740_rtc_probe()
349 device_init_wakeup(&pdev->dev, 1); in jz4740_rtc_probe()
351 rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name, in jz4740_rtc_probe()
353 if (IS_ERR(rtc->rtc)) { in jz4740_rtc_probe()
354 ret = PTR_ERR(rtc->rtc); in jz4740_rtc_probe()
355 dev_err(&pdev->dev, "Failed to register rtc device: %d\n", ret); in jz4740_rtc_probe()
359 ret = devm_request_irq(&pdev->dev, rtc->irq, jz4740_rtc_irq, 0, in jz4740_rtc_probe()
360 pdev->name, rtc); in jz4740_rtc_probe()
362 dev_err(&pdev->dev, "Failed to request rtc irq: %d\n", ret); in jz4740_rtc_probe()
371 dev_err(&pdev->dev, "Could not write to RTC registers\n"); in jz4740_rtc_probe()
378 /* Default: 60ms */ in jz4740_rtc_probe()
379 rtc->reset_pin_assert_time = 60; in jz4740_rtc_probe()
380 of_property_read_u32(np, "reset-pin-assert-time-ms", in jz4740_rtc_probe()
381 &rtc->reset_pin_assert_time); in jz4740_rtc_probe()
383 /* Default: 100ms */ in jz4740_rtc_probe()
384 rtc->min_wakeup_pin_assert_time = 100; in jz4740_rtc_probe()
386 "min-wakeup-pin-assert-time-ms", in jz4740_rtc_probe()
387 &rtc->min_wakeup_pin_assert_time); in jz4740_rtc_probe()
389 dev_for_power_off = &pdev->dev; in jz4740_rtc_probe()
392 dev_warn(&pdev->dev, in jz4740_rtc_probe()
406 enable_irq_wake(rtc->irq); in jz4740_rtc_suspend()
415 disable_irq_wake(rtc->irq); in jz4740_rtc_resume()
430 { "jz4740-rtc", ID_JZ4740 },
431 { "jz4780-rtc", ID_JZ4780 },
439 .name = "jz4740-rtc",
448 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
451 MODULE_ALIAS("platform:jz4740-rtc");