Lines Matching +full:sha +full:- +full:1
6 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
33 [chip_6320] = { 1, 2, 0x400, 17, 16, 6, 9, &mvs_64xx_dispatch, },
34 [chip_6440] = { 1, 4, 0x400, 17, 16, 6, 9, &mvs_64xx_dispatch, },
35 [chip_6485] = { 1, 8, 0x800, 33, 32, 6, 10, &mvs_64xx_dispatch, },
38 [chip_9445] = { 1, 4, 0x800, 17, 64, 8, 11, &mvs_94xx_dispatch, },
40 [chip_1300] = { 1, 4, 0x400, 17, 16, 6, 9, &mvs_64xx_dispatch, },
58 .can_queue = 1,
59 .this_id = -1,
68 .track_queue_depth = 1,
93 struct mvs_phy *phy = &mvi->phy[phy_id]; in mvs_phy_init()
94 struct asd_sas_phy *sas_phy = &phy->sas_phy; in mvs_phy_init()
96 phy->mvi = mvi; in mvs_phy_init()
97 phy->port = NULL; in mvs_phy_init()
98 timer_setup(&phy->timer, NULL, 0); in mvs_phy_init()
99 sas_phy->enabled = (phy_id < mvi->chip->n_phy) ? 1 : 0; in mvs_phy_init()
100 sas_phy->class = SAS; in mvs_phy_init()
101 sas_phy->iproto = SAS_PROTOCOL_ALL; in mvs_phy_init()
102 sas_phy->tproto = 0; in mvs_phy_init()
103 sas_phy->type = PHY_TYPE_PHYSICAL; in mvs_phy_init()
104 sas_phy->role = PHY_ROLE_INITIATOR; in mvs_phy_init()
105 sas_phy->oob_mode = OOB_NOT_CONNECTED; in mvs_phy_init()
106 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN; in mvs_phy_init()
108 sas_phy->id = phy_id; in mvs_phy_init()
109 sas_phy->sas_addr = &mvi->sas_addr[0]; in mvs_phy_init()
110 sas_phy->frame_rcvd = &phy->frame_rcvd[0]; in mvs_phy_init()
111 sas_phy->ha = (struct sas_ha_struct *)mvi->shost->hostdata; in mvs_phy_init()
112 sas_phy->lldd_phy = phy; in mvs_phy_init()
123 if (mvi->flags & MVF_FLAG_SOC) in mvs_free()
128 dma_pool_destroy(mvi->dma_pool); in mvs_free()
130 if (mvi->tx) in mvs_free()
131 dma_free_coherent(mvi->dev, in mvs_free()
132 sizeof(*mvi->tx) * MVS_CHIP_SLOT_SZ, in mvs_free()
133 mvi->tx, mvi->tx_dma); in mvs_free()
134 if (mvi->rx_fis) in mvs_free()
135 dma_free_coherent(mvi->dev, MVS_RX_FISL_SZ, in mvs_free()
136 mvi->rx_fis, mvi->rx_fis_dma); in mvs_free()
137 if (mvi->rx) in mvs_free()
138 dma_free_coherent(mvi->dev, in mvs_free()
139 sizeof(*mvi->rx) * (MVS_RX_RING_SZ + 1), in mvs_free()
140 mvi->rx, mvi->rx_dma); in mvs_free()
141 if (mvi->slot) in mvs_free()
142 dma_free_coherent(mvi->dev, in mvs_free()
143 sizeof(*mvi->slot) * slot_nr, in mvs_free()
144 mvi->slot, mvi->slot_dma); in mvs_free()
146 if (mvi->bulk_buffer) in mvs_free()
147 dma_free_coherent(mvi->dev, TRASH_BUCKET_SIZE, in mvs_free()
148 mvi->bulk_buffer, mvi->bulk_buffer_dma); in mvs_free()
149 if (mvi->bulk_buffer1) in mvs_free()
150 dma_free_coherent(mvi->dev, TRASH_BUCKET_SIZE, in mvs_free()
151 mvi->bulk_buffer1, mvi->bulk_buffer_dma1); in mvs_free()
153 MVS_CHIP_DISP->chip_iounmap(mvi); in mvs_free()
154 if (mvi->shost) in mvs_free()
155 scsi_host_put(mvi->shost); in mvs_free()
156 list_for_each_entry(mwq, &mvi->wq_list, entry) in mvs_free()
157 cancel_delayed_work(&mwq->work_q); in mvs_free()
158 kfree(mvi->tags); in mvs_free()
169 struct sas_ha_struct *sha = (struct sas_ha_struct *)opaque; in mvs_tasklet() local
171 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; in mvs_tasklet()
172 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[0]; in mvs_tasklet()
175 BUG_ON(1); in mvs_tasklet()
177 stat = MVS_CHIP_DISP->isr_status(mvi, mvi->pdev->irq); in mvs_tasklet()
182 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[i]; in mvs_tasklet()
183 MVS_CHIP_DISP->isr(mvi, mvi->pdev->irq, stat); in mvs_tasklet()
186 MVS_CHIP_DISP->interrupt_enable(mvi); in mvs_tasklet()
196 struct sas_ha_struct *sha = opaque; in mvs_interrupt() local
201 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; in mvs_interrupt()
202 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[0]; in mvs_interrupt()
207 MVS_CHIP_DISP->interrupt_disable(mvi); in mvs_interrupt()
210 stat = MVS_CHIP_DISP->isr_status(mvi, irq); in mvs_interrupt()
213 MVS_CHIP_DISP->interrupt_enable(mvi); in mvs_interrupt()
219 tasklet_schedule(&((struct mvs_prv_info *)sha->lldd_ha)->mv_tasklet); in mvs_interrupt()
222 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[i]; in mvs_interrupt()
223 MVS_CHIP_DISP->isr(mvi, irq, stat); in mvs_interrupt()
234 if (mvi->flags & MVF_FLAG_SOC) in mvs_alloc()
239 spin_lock_init(&mvi->lock); in mvs_alloc()
240 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_alloc()
242 mvi->port[i].wide_port_phymap = 0; in mvs_alloc()
243 mvi->port[i].port_attached = 0; in mvs_alloc()
244 INIT_LIST_HEAD(&mvi->port[i].list); in mvs_alloc()
247 mvi->devices[i].taskfileset = MVS_ID_NOT_MAPPED; in mvs_alloc()
248 mvi->devices[i].dev_type = SAS_PHY_UNUSED; in mvs_alloc()
249 mvi->devices[i].device_id = i; in mvs_alloc()
250 mvi->devices[i].dev_status = MVS_DEV_NORMAL; in mvs_alloc()
256 mvi->tx = dma_alloc_coherent(mvi->dev, in mvs_alloc()
257 sizeof(*mvi->tx) * MVS_CHIP_SLOT_SZ, in mvs_alloc()
258 &mvi->tx_dma, GFP_KERNEL); in mvs_alloc()
259 if (!mvi->tx) in mvs_alloc()
261 memset(mvi->tx, 0, sizeof(*mvi->tx) * MVS_CHIP_SLOT_SZ); in mvs_alloc()
262 mvi->rx_fis = dma_alloc_coherent(mvi->dev, MVS_RX_FISL_SZ, in mvs_alloc()
263 &mvi->rx_fis_dma, GFP_KERNEL); in mvs_alloc()
264 if (!mvi->rx_fis) in mvs_alloc()
266 memset(mvi->rx_fis, 0, MVS_RX_FISL_SZ); in mvs_alloc()
268 mvi->rx = dma_alloc_coherent(mvi->dev, in mvs_alloc()
269 sizeof(*mvi->rx) * (MVS_RX_RING_SZ + 1), in mvs_alloc()
270 &mvi->rx_dma, GFP_KERNEL); in mvs_alloc()
271 if (!mvi->rx) in mvs_alloc()
273 memset(mvi->rx, 0, sizeof(*mvi->rx) * (MVS_RX_RING_SZ + 1)); in mvs_alloc()
274 mvi->rx[0] = cpu_to_le32(0xfff); in mvs_alloc()
275 mvi->rx_cons = 0xfff; in mvs_alloc()
277 mvi->slot = dma_alloc_coherent(mvi->dev, in mvs_alloc()
278 sizeof(*mvi->slot) * slot_nr, in mvs_alloc()
279 &mvi->slot_dma, GFP_KERNEL); in mvs_alloc()
280 if (!mvi->slot) in mvs_alloc()
282 memset(mvi->slot, 0, sizeof(*mvi->slot) * slot_nr); in mvs_alloc()
284 mvi->bulk_buffer = dma_alloc_coherent(mvi->dev, in mvs_alloc()
286 &mvi->bulk_buffer_dma, GFP_KERNEL); in mvs_alloc()
287 if (!mvi->bulk_buffer) in mvs_alloc()
290 mvi->bulk_buffer1 = dma_alloc_coherent(mvi->dev, in mvs_alloc()
292 &mvi->bulk_buffer_dma1, GFP_KERNEL); in mvs_alloc()
293 if (!mvi->bulk_buffer1) in mvs_alloc()
296 sprintf(pool_name, "%s%d", "mvs_dma_pool", mvi->id); in mvs_alloc()
297 mvi->dma_pool = dma_pool_create(pool_name, &mvi->pdev->dev, in mvs_alloc()
299 if (!mvi->dma_pool) { in mvs_alloc()
303 mvi->tags_num = slot_nr; in mvs_alloc()
309 return 1; in mvs_alloc()
316 struct pci_dev *pdev = mvi->pdev; in mvs_ioremap()
317 if (bar_ex != -1) { in mvs_ioremap()
328 mvi->regs_ex = ioremap(res_start, res_len); in mvs_ioremap()
330 mvi->regs_ex = (void *)res_start; in mvs_ioremap()
331 if (!mvi->regs_ex) in mvs_ioremap()
338 iounmap(mvi->regs_ex); in mvs_ioremap()
339 mvi->regs_ex = NULL; in mvs_ioremap()
344 mvi->regs = ioremap(res_start, res_len); in mvs_ioremap()
346 if (!mvi->regs) { in mvs_ioremap()
347 if (mvi->regs_ex && (res_flag_ex & IORESOURCE_MEM)) in mvs_ioremap()
348 iounmap(mvi->regs_ex); in mvs_ioremap()
349 mvi->regs_ex = NULL; in mvs_ioremap()
355 return -1; in mvs_ioremap()
368 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); in mvs_pci_alloc() local
371 (1L << mvs_chips[ent->driver_data].slot_width) * in mvs_pci_alloc()
376 mvi->pdev = pdev; in mvs_pci_alloc()
377 mvi->dev = &pdev->dev; in mvs_pci_alloc()
378 mvi->chip_id = ent->driver_data; in mvs_pci_alloc()
379 mvi->chip = &mvs_chips[mvi->chip_id]; in mvs_pci_alloc()
380 INIT_LIST_HEAD(&mvi->wq_list); in mvs_pci_alloc()
382 ((struct mvs_prv_info *)sha->lldd_ha)->mvi[id] = mvi; in mvs_pci_alloc()
383 ((struct mvs_prv_info *)sha->lldd_ha)->n_phy = mvi->chip->n_phy; in mvs_pci_alloc()
385 mvi->id = id; in mvs_pci_alloc()
386 mvi->sas = sha; in mvs_pci_alloc()
387 mvi->shost = shost; in mvs_pci_alloc()
389 mvi->tags = kzalloc(MVS_CHIP_SLOT_SZ>>3, GFP_KERNEL); in mvs_pci_alloc()
390 if (!mvi->tags) in mvs_pci_alloc()
393 if (MVS_CHIP_DISP->chip_ioremap(mvi)) in mvs_pci_alloc()
411 dev_printk(KERN_ERR, &pdev->dev, in pci_go_64()
412 "64-bit DMA enable failed\n"); in pci_go_64()
419 dev_printk(KERN_ERR, &pdev->dev, in pci_go_64()
420 "32-bit DMA enable failed\n"); in pci_go_64()
425 dev_printk(KERN_ERR, &pdev->dev, in pci_go_64()
426 "32-bit consistent DMA enable failed\n"); in pci_go_64()
440 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); in mvs_prep_sas_ha_init() local
442 core_nr = chip_info->n_host; in mvs_prep_sas_ha_init()
443 phy_nr = core_nr * chip_info->n_phy; in mvs_prep_sas_ha_init()
446 memset(sha, 0x00, sizeof(struct sas_ha_struct)); in mvs_prep_sas_ha_init()
452 sha->sas_phy = arr_phy; in mvs_prep_sas_ha_init()
453 sha->sas_port = arr_port; in mvs_prep_sas_ha_init()
454 sha->core.shost = shost; in mvs_prep_sas_ha_init()
456 sha->lldd_ha = kzalloc(sizeof(struct mvs_prv_info), GFP_KERNEL); in mvs_prep_sas_ha_init()
457 if (!sha->lldd_ha) in mvs_prep_sas_ha_init()
460 ((struct mvs_prv_info *)sha->lldd_ha)->n_host = core_nr; in mvs_prep_sas_ha_init()
462 shost->transportt = mvs_stt; in mvs_prep_sas_ha_init()
463 shost->max_id = MVS_MAX_DEVICES; in mvs_prep_sas_ha_init()
464 shost->max_lun = ~0; in mvs_prep_sas_ha_init()
465 shost->max_channel = 1; in mvs_prep_sas_ha_init()
466 shost->max_cmd_len = 16; in mvs_prep_sas_ha_init()
472 return -1; in mvs_prep_sas_ha_init()
481 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); in mvs_post_sas_ha_init() local
482 unsigned short nr_core = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; in mvs_post_sas_ha_init()
485 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j]; in mvs_post_sas_ha_init()
486 for (i = 0; i < chip_info->n_phy; i++) { in mvs_post_sas_ha_init()
487 sha->sas_phy[j * chip_info->n_phy + i] = in mvs_post_sas_ha_init()
488 &mvi->phy[i].sas_phy; in mvs_post_sas_ha_init()
489 sha->sas_port[j * chip_info->n_phy + i] = in mvs_post_sas_ha_init()
490 &mvi->port[i].sas_port; in mvs_post_sas_ha_init()
494 sha->sas_ha_name = DRV_NAME; in mvs_post_sas_ha_init()
495 sha->dev = mvi->dev; in mvs_post_sas_ha_init()
496 sha->lldd_module = THIS_MODULE; in mvs_post_sas_ha_init()
497 sha->sas_addr = &mvi->sas_addr[0]; in mvs_post_sas_ha_init()
499 sha->num_phys = nr_core * chip_info->n_phy; in mvs_post_sas_ha_init()
501 if (mvi->flags & MVF_FLAG_SOC) in mvs_post_sas_ha_init()
506 shost->sg_tablesize = min_t(u16, SG_ALL, MVS_MAX_SG); in mvs_post_sas_ha_init()
507 shost->can_queue = can_queue; in mvs_post_sas_ha_init()
508 mvi->shost->cmd_per_lun = MVS_QUEUE_SIZE; in mvs_post_sas_ha_init()
509 sha->core.shost = mvi->shost; in mvs_post_sas_ha_init()
515 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_init_sas_add()
516 mvi->phy[i].dev_sas_addr = 0x5005043011ab0000ULL; in mvs_init_sas_add()
517 mvi->phy[i].dev_sas_addr = in mvs_init_sas_add()
518 cpu_to_be64((u64)(*(u64 *)&mvi->phy[i].dev_sas_addr)); in mvs_init_sas_add()
521 memcpy(mvi->sas_addr, &mvi->phy[0].dev_sas_addr, SAS_ADDR_SIZE); in mvs_init_sas_add()
533 dev_printk(KERN_INFO, &pdev->dev, in mvs_pci_init()
551 rc = -ENOMEM; in mvs_pci_init()
555 chip = &mvs_chips[ent->driver_data]; in mvs_pci_init()
557 kcalloc(1, sizeof(struct sas_ha_struct), GFP_KERNEL); in mvs_pci_init()
560 rc = -ENOMEM; in mvs_pci_init()
567 rc = -ENOMEM; in mvs_pci_init()
576 rc = -ENOMEM; in mvs_pci_init()
580 memset(&mvi->hba_info_param, 0xFF, in mvs_pci_init()
585 mvi->instance = nhost; in mvs_pci_init()
586 rc = MVS_CHIP_DISP->chip_init(mvi); in mvs_pci_init()
592 } while (nhost < chip->n_host); in mvs_pci_init()
593 mpi = (struct mvs_prv_info *)(SHOST_TO_SAS_HA(shost)->lldd_ha); in mvs_pci_init()
595 tasklet_init(&(mpi->mv_tasklet), mvs_tasklet, in mvs_pci_init()
601 rc = scsi_add_host(shost, &pdev->dev); in mvs_pci_init()
608 rc = request_irq(pdev->irq, irq_handler, IRQF_SHARED, in mvs_pci_init()
613 MVS_CHIP_DISP->interrupt_enable(mvi); in mvs_pci_init()
615 scsi_scan_host(mvi->shost); in mvs_pci_init()
622 scsi_remove_host(mvi->shost); in mvs_pci_init()
634 struct sas_ha_struct *sha = pci_get_drvdata(pdev); in mvs_pci_remove() local
637 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; in mvs_pci_remove()
638 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[0]; in mvs_pci_remove()
641 tasklet_kill(&((struct mvs_prv_info *)sha->lldd_ha)->mv_tasklet); in mvs_pci_remove()
644 sas_unregister_ha(sha); in mvs_pci_remove()
645 sas_remove_host(mvi->shost); in mvs_pci_remove()
647 MVS_CHIP_DISP->interrupt_disable(mvi); in mvs_pci_remove()
648 free_irq(mvi->pdev->irq, sha); in mvs_pci_remove()
650 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[i]; in mvs_pci_remove()
653 kfree(sha->sas_phy); in mvs_pci_remove()
654 kfree(sha->sas_port); in mvs_pci_remove()
655 kfree(sha); in mvs_pci_remove()
747 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); in mvs_store_interrupt_coalescing() local
752 if (sscanf(buffer, "%u", &val) != 1) in mvs_store_interrupt_coalescing()
753 return -EINVAL; in mvs_store_interrupt_coalescing()
763 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; in mvs_store_interrupt_coalescing()
764 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[0]; in mvs_store_interrupt_coalescing()
767 return -EINVAL; in mvs_store_interrupt_coalescing()
770 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[i]; in mvs_store_interrupt_coalescing()
771 if (MVS_CHIP_DISP->tune_interrupt) in mvs_store_interrupt_coalescing()
772 MVS_CHIP_DISP->tune_interrupt(mvi, in mvs_store_interrupt_coalescing()
798 return -ENOMEM; in mvs_init()