Lines Matching +full:tx +full:- +full:enable
2 * Driver for the Diolan DLN-2 USB-SPI adapter
101 * Enable/Disable SPI module. The disable command will wait for transfers to
104 static int dln2_spi_enable(struct dln2_spi *dln2, bool enable) in dln2_spi_enable() argument
110 } tx; in dln2_spi_enable() local
111 unsigned len = sizeof(tx); in dln2_spi_enable()
113 tx.port = dln2->port; in dln2_spi_enable()
115 if (enable) { in dln2_spi_enable()
117 len -= sizeof(tx.wait_for_completion); in dln2_spi_enable()
119 tx.wait_for_completion = DLN2_TRANSFERS_WAIT_COMPLETE; in dln2_spi_enable()
123 return dln2_transfer_tx(dln2->pdev, cmd, &tx, len); in dln2_spi_enable()
131 * Ex: cs_mask = 0x03 -> CS0 & CS1 will be selected and the next WR/RD operation
139 } tx; in dln2_spi_cs_set() local
141 tx.port = dln2->port; in dln2_spi_cs_set()
148 tx.cs = ~cs_mask; in dln2_spi_cs_set()
150 return dln2_transfer_tx(dln2->pdev, DLN2_SPI_SET_SS, &tx, sizeof(tx)); in dln2_spi_cs_set()
154 * Select one CS line. The other lines will be un-selected.
162 * Enable/disable CS lines for usage. The module has to be disabled first.
164 static int dln2_spi_cs_enable(struct dln2_spi *dln2, u8 cs_mask, bool enable) in dln2_spi_cs_enable() argument
169 } tx; in dln2_spi_cs_enable() local
172 tx.port = dln2->port; in dln2_spi_cs_enable()
173 tx.cs = cs_mask; in dln2_spi_cs_enable()
174 cmd = enable ? DLN2_SPI_SS_MULTI_ENABLE : DLN2_SPI_SS_MULTI_DISABLE; in dln2_spi_cs_enable()
176 return dln2_transfer_tx(dln2->pdev, cmd, &tx, sizeof(tx)); in dln2_spi_cs_enable()
179 static int dln2_spi_cs_enable_all(struct dln2_spi *dln2, bool enable) in dln2_spi_cs_enable_all() argument
181 u8 cs_mask = GENMASK(dln2->master->num_chipselect - 1, 0); in dln2_spi_cs_enable_all()
183 return dln2_spi_cs_enable(dln2, cs_mask, enable); in dln2_spi_cs_enable_all()
191 } tx; in dln2_spi_get_cs_num() local
197 tx.port = dln2->port; in dln2_spi_get_cs_num()
198 ret = dln2_transfer(dln2->pdev, DLN2_SPI_GET_SS_COUNT, &tx, sizeof(tx), in dln2_spi_get_cs_num()
203 return -EPROTO; in dln2_spi_get_cs_num()
207 dev_dbg(&dln2->pdev->dev, "cs_num = %d\n", *cs_num); in dln2_spi_get_cs_num()
217 } tx; in dln2_spi_get_speed() local
223 tx.port = dln2->port; in dln2_spi_get_speed()
225 ret = dln2_transfer(dln2->pdev, cmd, &tx, sizeof(tx), &rx, &rx_len); in dln2_spi_get_speed()
229 return -EPROTO; in dln2_spi_get_speed()
251 dev_dbg(&dln2->pdev->dev, "freq_min = %d, freq_max = %d\n", in dln2_spi_get_speed_range()
267 } __packed tx; in dln2_spi_set_speed() local
273 tx.port = dln2->port; in dln2_spi_set_speed()
274 tx.speed = cpu_to_le32(speed); in dln2_spi_set_speed()
276 ret = dln2_transfer(dln2->pdev, DLN2_SPI_SET_FREQUENCY, &tx, sizeof(tx), in dln2_spi_set_speed()
281 return -EPROTO; in dln2_spi_set_speed()
294 } tx; in dln2_spi_set_mode() local
296 tx.port = dln2->port; in dln2_spi_set_mode()
297 tx.mode = mode; in dln2_spi_set_mode()
299 return dln2_transfer_tx(dln2->pdev, DLN2_SPI_SET_MODE, &tx, sizeof(tx)); in dln2_spi_set_mode()
310 } tx; in dln2_spi_set_bpw() local
312 tx.port = dln2->port; in dln2_spi_set_bpw()
313 tx.bpw = bpw; in dln2_spi_set_bpw()
315 return dln2_transfer_tx(dln2->pdev, DLN2_SPI_SET_FRAME_SIZE, in dln2_spi_set_bpw()
316 &tx, sizeof(tx)); in dln2_spi_set_bpw()
325 } tx; in dln2_spi_get_supported_frame_sizes() local
329 } *rx = dln2->buf; in dln2_spi_get_supported_frame_sizes()
333 tx.port = dln2->port; in dln2_spi_get_supported_frame_sizes()
335 ret = dln2_transfer(dln2->pdev, DLN2_SPI_GET_SUPPORTED_FRAME_SIZES, in dln2_spi_get_supported_frame_sizes()
336 &tx, sizeof(tx), rx, &rx_len); in dln2_spi_get_supported_frame_sizes()
340 return -EPROTO; in dln2_spi_get_supported_frame_sizes()
341 if (rx->count > ARRAY_SIZE(rx->frame_sizes)) in dln2_spi_get_supported_frame_sizes()
342 return -EPROTO; in dln2_spi_get_supported_frame_sizes()
345 for (i = 0; i < rx->count; i++) in dln2_spi_get_supported_frame_sizes()
346 *bpw_mask |= BIT(rx->frame_sizes[i] - 1); in dln2_spi_get_supported_frame_sizes()
348 dev_dbg(&dln2->pdev->dev, "bpw_mask = 0x%X\n", *bpw_mask); in dln2_spi_get_supported_frame_sizes()
370 while (len--) in dln2_spi_copy_to_buf()
377 while (len--) in dln2_spi_copy_to_buf()
403 while (len--) in dln2_spi_copy_from_buf()
410 while (len--) in dln2_spi_copy_from_buf()
429 } __packed *tx = dln2->buf; in dln2_spi_write_one() local
432 BUILD_BUG_ON(sizeof(*tx) > DLN2_SPI_BUF_SIZE); in dln2_spi_write_one()
435 return -EINVAL; in dln2_spi_write_one()
437 tx->port = dln2->port; in dln2_spi_write_one()
438 tx->size = cpu_to_le16(data_len); in dln2_spi_write_one()
439 tx->attr = attr; in dln2_spi_write_one()
441 dln2_spi_copy_to_buf(tx->buf, data, data_len, dln2->bpw); in dln2_spi_write_one()
443 tx_len = sizeof(*tx) + data_len - DLN2_SPI_MAX_XFER_SIZE; in dln2_spi_write_one()
444 return dln2_transfer_tx(dln2->pdev, DLN2_SPI_WRITE, tx, tx_len); in dln2_spi_write_one()
458 } __packed tx; in dln2_spi_read_one() local
462 } __packed *rx = dln2->buf; in dln2_spi_read_one()
468 return -EINVAL; in dln2_spi_read_one()
470 tx.port = dln2->port; in dln2_spi_read_one()
471 tx.size = cpu_to_le16(data_len); in dln2_spi_read_one()
472 tx.attr = attr; in dln2_spi_read_one()
474 ret = dln2_transfer(dln2->pdev, DLN2_SPI_READ, &tx, sizeof(tx), in dln2_spi_read_one()
478 if (rx_len < sizeof(rx->size) + data_len) in dln2_spi_read_one()
479 return -EPROTO; in dln2_spi_read_one()
480 if (le16_to_cpu(rx->size) != data_len) in dln2_spi_read_one()
481 return -EPROTO; in dln2_spi_read_one()
483 dln2_spi_copy_from_buf(data, rx->buf, data_len, dln2->bpw); in dln2_spi_read_one()
500 } __packed *tx; in dln2_spi_read_write_one() local
507 BUILD_BUG_ON(sizeof(*tx) > DLN2_SPI_BUF_SIZE || in dln2_spi_read_write_one()
511 return -EINVAL; in dln2_spi_read_write_one()
514 * Since this is a pseudo full-duplex communication, we're perfectly in dln2_spi_read_write_one()
515 * safe to use the same buffer for both tx and rx. When DLN2 sends the in dln2_spi_read_write_one()
516 * response back, with the rx data, we don't need the tx buffer anymore. in dln2_spi_read_write_one()
518 tx = dln2->buf; in dln2_spi_read_write_one()
519 rx = dln2->buf; in dln2_spi_read_write_one()
521 tx->port = dln2->port; in dln2_spi_read_write_one()
522 tx->size = cpu_to_le16(data_len); in dln2_spi_read_write_one()
523 tx->attr = attr; in dln2_spi_read_write_one()
525 dln2_spi_copy_to_buf(tx->buf, tx_data, data_len, dln2->bpw); in dln2_spi_read_write_one()
527 tx_len = sizeof(*tx) + data_len - DLN2_SPI_MAX_XFER_SIZE; in dln2_spi_read_write_one()
530 ret = dln2_transfer(dln2->pdev, DLN2_SPI_READ_WRITE, tx, tx_len, in dln2_spi_read_write_one()
534 if (rx_len < sizeof(rx->size) + data_len) in dln2_spi_read_write_one()
535 return -EPROTO; in dln2_spi_read_write_one()
536 if (le16_to_cpu(rx->size) != data_len) in dln2_spi_read_write_one()
537 return -EPROTO; in dln2_spi_read_write_one()
539 dln2_spi_copy_from_buf(rx_data, rx->buf, data_len, dln2->bpw); in dln2_spi_read_write_one()
565 offset = data_len - remaining; in dln2_spi_rdwr()
581 return -EINVAL; in dln2_spi_rdwr()
587 remaining -= len; in dln2_spi_rdwr()
598 struct spi_device *spi = message->spi; in dln2_spi_prepare_message()
600 if (dln2->cs != spi->chip_select) { in dln2_spi_prepare_message()
601 ret = dln2_spi_cs_set_one(dln2, spi->chip_select); in dln2_spi_prepare_message()
605 dln2->cs = spi->chip_select; in dln2_spi_prepare_message()
617 bus_setup_change = dln2->speed != speed || dln2->mode != mode || in dln2_spi_transfer_setup()
618 dln2->bpw != bpw; in dln2_spi_transfer_setup()
627 if (dln2->speed != speed) { in dln2_spi_transfer_setup()
632 dln2->speed = speed; in dln2_spi_transfer_setup()
635 if (dln2->mode != mode) { in dln2_spi_transfer_setup()
640 dln2->mode = mode; in dln2_spi_transfer_setup()
643 if (dln2->bpw != bpw) { in dln2_spi_transfer_setup()
648 dln2->bpw = bpw; in dln2_spi_transfer_setup()
662 status = dln2_spi_transfer_setup(dln2, xfer->speed_hz, in dln2_spi_transfer_one()
663 xfer->bits_per_word, in dln2_spi_transfer_one()
664 spi->mode); in dln2_spi_transfer_one()
666 dev_err(&dln2->pdev->dev, "Cannot setup transfer\n"); in dln2_spi_transfer_one()
670 if (!xfer->cs_change && !spi_transfer_is_last(master, xfer)) in dln2_spi_transfer_one()
673 status = dln2_spi_rdwr(dln2, xfer->tx_buf, xfer->rx_buf, in dln2_spi_transfer_one()
674 xfer->len, attr); in dln2_spi_transfer_one()
676 dev_err(&dln2->pdev->dev, "write/read failed!\n"); in dln2_spi_transfer_one()
685 struct dln2_platform_data *pdata = dev_get_platdata(&pdev->dev); in dln2_spi_probe()
686 struct device *dev = &pdev->dev; in dln2_spi_probe()
689 master = spi_alloc_master(&pdev->dev, sizeof(*dln2)); in dln2_spi_probe()
691 return -ENOMEM; in dln2_spi_probe()
697 dln2->buf = devm_kmalloc(&pdev->dev, DLN2_SPI_BUF_SIZE, GFP_KERNEL); in dln2_spi_probe()
698 if (!dln2->buf) { in dln2_spi_probe()
699 ret = -ENOMEM; in dln2_spi_probe()
703 dln2->master = master; in dln2_spi_probe()
704 dln2->master->dev.of_node = dev->of_node; in dln2_spi_probe()
705 dln2->pdev = pdev; in dln2_spi_probe()
706 dln2->port = pdata->port; in dln2_spi_probe()
708 dln2->cs = 0xff; in dln2_spi_probe()
709 dln2->mode = 0xff; in dln2_spi_probe()
714 dev_err(&pdev->dev, "Failed to disable SPI module\n"); in dln2_spi_probe()
718 ret = dln2_spi_get_cs_num(dln2, &master->num_chipselect); in dln2_spi_probe()
720 dev_err(&pdev->dev, "Failed to get number of CS pins\n"); in dln2_spi_probe()
725 &master->min_speed_hz, in dln2_spi_probe()
726 &master->max_speed_hz); in dln2_spi_probe()
728 dev_err(&pdev->dev, "Failed to read bus min/max freqs\n"); in dln2_spi_probe()
733 &master->bits_per_word_mask); in dln2_spi_probe()
735 dev_err(&pdev->dev, "Failed to read supported frame sizes\n"); in dln2_spi_probe()
741 dev_err(&pdev->dev, "Failed to enable CS pins\n"); in dln2_spi_probe()
745 master->bus_num = -1; in dln2_spi_probe()
746 master->mode_bits = SPI_CPOL | SPI_CPHA; in dln2_spi_probe()
747 master->prepare_message = dln2_spi_prepare_message; in dln2_spi_probe()
748 master->transfer_one = dln2_spi_transfer_one; in dln2_spi_probe()
749 master->auto_runtime_pm = true; in dln2_spi_probe()
751 /* enable SPI module, we're good to go */ in dln2_spi_probe()
754 dev_err(&pdev->dev, "Failed to enable SPI module\n"); in dln2_spi_probe()
758 pm_runtime_set_autosuspend_delay(&pdev->dev, in dln2_spi_probe()
760 pm_runtime_use_autosuspend(&pdev->dev); in dln2_spi_probe()
761 pm_runtime_set_active(&pdev->dev); in dln2_spi_probe()
762 pm_runtime_enable(&pdev->dev); in dln2_spi_probe()
764 ret = devm_spi_register_master(&pdev->dev, master); in dln2_spi_probe()
766 dev_err(&pdev->dev, "Failed to register master\n"); in dln2_spi_probe()
773 pm_runtime_disable(&pdev->dev); in dln2_spi_probe()
774 pm_runtime_set_suspended(&pdev->dev); in dln2_spi_probe()
777 dev_err(&pdev->dev, "Failed to disable SPI module\n"); in dln2_spi_probe()
789 pm_runtime_disable(&pdev->dev); in dln2_spi_remove()
792 dev_err(&pdev->dev, "Failed to disable SPI module\n"); in dln2_spi_remove()
818 dln2->cs = 0xff; in dln2_spi_suspend()
819 dln2->speed = 0; in dln2_spi_suspend()
820 dln2->bpw = 0; in dln2_spi_suspend()
821 dln2->mode = 0xff; in dln2_spi_suspend()
872 .name = "dln2-spi",
883 MODULE_ALIAS("platform:dln2-spi");