Lines Matching refs:spi
193 static u32 lantiq_ssc_readl(const struct lantiq_ssc_spi *spi, u32 reg) in lantiq_ssc_readl() argument
195 return __raw_readl(spi->regbase + reg); in lantiq_ssc_readl()
198 static void lantiq_ssc_writel(const struct lantiq_ssc_spi *spi, u32 val, in lantiq_ssc_writel() argument
201 __raw_writel(val, spi->regbase + reg); in lantiq_ssc_writel()
204 static void lantiq_ssc_maskl(const struct lantiq_ssc_spi *spi, u32 clr, in lantiq_ssc_maskl() argument
207 u32 val = __raw_readl(spi->regbase + reg); in lantiq_ssc_maskl()
211 __raw_writel(val, spi->regbase + reg); in lantiq_ssc_maskl()
214 static unsigned int tx_fifo_level(const struct lantiq_ssc_spi *spi) in tx_fifo_level() argument
216 u32 fstat = lantiq_ssc_readl(spi, LTQ_SPI_FSTAT); in tx_fifo_level()
221 static unsigned int rx_fifo_level(const struct lantiq_ssc_spi *spi) in rx_fifo_level() argument
223 u32 fstat = lantiq_ssc_readl(spi, LTQ_SPI_FSTAT); in rx_fifo_level()
228 static unsigned int tx_fifo_free(const struct lantiq_ssc_spi *spi) in tx_fifo_free() argument
230 return spi->tx_fifo_size - tx_fifo_level(spi); in tx_fifo_free()
233 static void rx_fifo_reset(const struct lantiq_ssc_spi *spi) in rx_fifo_reset() argument
235 u32 val = spi->rx_fifo_size << LTQ_SPI_RXFCON_RXFITL_S; in rx_fifo_reset()
238 lantiq_ssc_writel(spi, val, LTQ_SPI_RXFCON); in rx_fifo_reset()
241 static void tx_fifo_reset(const struct lantiq_ssc_spi *spi) in tx_fifo_reset() argument
246 lantiq_ssc_writel(spi, val, LTQ_SPI_TXFCON); in tx_fifo_reset()
249 static void rx_fifo_flush(const struct lantiq_ssc_spi *spi) in rx_fifo_flush() argument
251 lantiq_ssc_maskl(spi, 0, LTQ_SPI_RXFCON_RXFLU, LTQ_SPI_RXFCON); in rx_fifo_flush()
254 static void tx_fifo_flush(const struct lantiq_ssc_spi *spi) in tx_fifo_flush() argument
256 lantiq_ssc_maskl(spi, 0, LTQ_SPI_TXFCON_TXFLU, LTQ_SPI_TXFCON); in tx_fifo_flush()
259 static void hw_enter_config_mode(const struct lantiq_ssc_spi *spi) in hw_enter_config_mode() argument
261 lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_CLREN, LTQ_SPI_WHBSTATE); in hw_enter_config_mode()
264 static void hw_enter_active_mode(const struct lantiq_ssc_spi *spi) in hw_enter_active_mode() argument
266 lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_SETEN, LTQ_SPI_WHBSTATE); in hw_enter_active_mode()
269 static void hw_setup_speed_hz(const struct lantiq_ssc_spi *spi, in hw_setup_speed_hz() argument
282 spi_clk = clk_get_rate(spi->fpi_clk) / 2; in hw_setup_speed_hz()
292 dev_dbg(spi->dev, "spi_clk %u, max_speed_hz %u, brt %u\n", in hw_setup_speed_hz()
295 lantiq_ssc_writel(spi, brt, LTQ_SPI_BRT); in hw_setup_speed_hz()
298 static void hw_setup_bits_per_word(const struct lantiq_ssc_spi *spi, in hw_setup_bits_per_word() argument
306 lantiq_ssc_maskl(spi, LTQ_SPI_CON_BM_M, bm, LTQ_SPI_CON); in hw_setup_bits_per_word()
309 static void hw_setup_clock_mode(const struct lantiq_ssc_spi *spi, in hw_setup_clock_mode() argument
344 lantiq_ssc_maskl(spi, con_clr, con_set, LTQ_SPI_CON); in hw_setup_clock_mode()
347 static void lantiq_ssc_hw_init(const struct lantiq_ssc_spi *spi) in lantiq_ssc_hw_init() argument
349 const struct lantiq_ssc_hwcfg *hwcfg = spi->hwcfg; in lantiq_ssc_hw_init()
355 lantiq_ssc_writel(spi, 1 << LTQ_SPI_CLC_RMC_S, LTQ_SPI_CLC); in lantiq_ssc_hw_init()
358 hw_enter_config_mode(spi); in lantiq_ssc_hw_init()
361 lantiq_ssc_maskl(spi, 0, LTQ_SPI_WHBSTATE_CLR_ERRORS, LTQ_SPI_WHBSTATE); in lantiq_ssc_hw_init()
364 lantiq_ssc_writel(spi, LTQ_SPI_CON_RUEN | LTQ_SPI_CON_AEN | in lantiq_ssc_hw_init()
369 hw_setup_bits_per_word(spi, spi->bits_per_word); in lantiq_ssc_hw_init()
370 hw_setup_clock_mode(spi, SPI_MODE_0); in lantiq_ssc_hw_init()
373 lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_SETMS | in lantiq_ssc_hw_init()
378 lantiq_ssc_writel(spi, 0, LTQ_SPI_GPOCON); in lantiq_ssc_hw_init()
379 lantiq_ssc_writel(spi, 0xFF00, LTQ_SPI_FPGO); in lantiq_ssc_hw_init()
382 rx_fifo_reset(spi); in lantiq_ssc_hw_init()
383 tx_fifo_reset(spi); in lantiq_ssc_hw_init()
386 lantiq_ssc_writel(spi, hwcfg->irnen_t | hwcfg->irnen_r | in lantiq_ssc_hw_init()
393 struct lantiq_ssc_spi *spi = spi_master_get_devdata(master); in lantiq_ssc_setup() local
401 dev_dbg(spi->dev, "using internal chipselect %u\n", cs); in lantiq_ssc_setup()
403 if (cs < spi->base_cs) { in lantiq_ssc_setup()
404 dev_err(spi->dev, in lantiq_ssc_setup()
405 "chipselect %i too small (min %i)\n", cs, spi->base_cs); in lantiq_ssc_setup()
410 gpocon = 1 << ((cs - spi->base_cs) + LTQ_SPI_GPOCON_ISCSBN_S); in lantiq_ssc_setup()
414 gpocon |= 1 << (cs - spi->base_cs); in lantiq_ssc_setup()
416 lantiq_ssc_maskl(spi, 0, gpocon, LTQ_SPI_GPOCON); in lantiq_ssc_setup()
424 struct lantiq_ssc_spi *spi = spi_master_get_devdata(master); in lantiq_ssc_prepare_message() local
426 hw_enter_config_mode(spi); in lantiq_ssc_prepare_message()
427 hw_setup_clock_mode(spi, message->spi->mode); in lantiq_ssc_prepare_message()
428 hw_enter_active_mode(spi); in lantiq_ssc_prepare_message()
433 static void hw_setup_transfer(struct lantiq_ssc_spi *spi, in hw_setup_transfer() argument
440 if (bits_per_word != spi->bits_per_word || in hw_setup_transfer()
441 speed_hz != spi->speed_hz) { in hw_setup_transfer()
442 hw_enter_config_mode(spi); in hw_setup_transfer()
443 hw_setup_speed_hz(spi, speed_hz); in hw_setup_transfer()
444 hw_setup_bits_per_word(spi, bits_per_word); in hw_setup_transfer()
445 hw_enter_active_mode(spi); in hw_setup_transfer()
447 spi->speed_hz = speed_hz; in hw_setup_transfer()
448 spi->bits_per_word = bits_per_word; in hw_setup_transfer()
452 con = lantiq_ssc_readl(spi, LTQ_SPI_CON); in hw_setup_transfer()
463 lantiq_ssc_writel(spi, con, LTQ_SPI_CON); in hw_setup_transfer()
469 struct lantiq_ssc_spi *spi = spi_master_get_devdata(master); in lantiq_ssc_unprepare_message() local
471 flush_workqueue(spi->wq); in lantiq_ssc_unprepare_message()
474 lantiq_ssc_maskl(spi, 0, LTQ_SPI_CON_TXOFF | LTQ_SPI_CON_RXOFF, in lantiq_ssc_unprepare_message()
480 static void tx_fifo_write(struct lantiq_ssc_spi *spi) in tx_fifo_write() argument
486 unsigned int tx_free = tx_fifo_free(spi); in tx_fifo_write()
488 spi->fdx_tx_level = 0; in tx_fifo_write()
489 while (spi->tx_todo && tx_free) { in tx_fifo_write()
490 switch (spi->bits_per_word) { in tx_fifo_write()
492 tx8 = spi->tx; in tx_fifo_write()
494 spi->tx_todo--; in tx_fifo_write()
495 spi->tx++; in tx_fifo_write()
498 tx16 = (u16 *) spi->tx; in tx_fifo_write()
500 spi->tx_todo -= 2; in tx_fifo_write()
501 spi->tx += 2; in tx_fifo_write()
504 tx32 = (u32 *) spi->tx; in tx_fifo_write()
506 spi->tx_todo -= 4; in tx_fifo_write()
507 spi->tx += 4; in tx_fifo_write()
515 lantiq_ssc_writel(spi, data, LTQ_SPI_TB); in tx_fifo_write()
517 spi->fdx_tx_level++; in tx_fifo_write()
521 static void rx_fifo_read_full_duplex(struct lantiq_ssc_spi *spi) in rx_fifo_read_full_duplex() argument
527 unsigned int rx_fill = rx_fifo_level(spi); in rx_fifo_read_full_duplex()
533 while (rx_fill != spi->fdx_tx_level) in rx_fifo_read_full_duplex()
534 rx_fill = rx_fifo_level(spi); in rx_fifo_read_full_duplex()
537 data = lantiq_ssc_readl(spi, LTQ_SPI_RB); in rx_fifo_read_full_duplex()
539 switch (spi->bits_per_word) { in rx_fifo_read_full_duplex()
541 rx8 = spi->rx; in rx_fifo_read_full_duplex()
543 spi->rx_todo--; in rx_fifo_read_full_duplex()
544 spi->rx++; in rx_fifo_read_full_duplex()
547 rx16 = (u16 *) spi->rx; in rx_fifo_read_full_duplex()
549 spi->rx_todo -= 2; in rx_fifo_read_full_duplex()
550 spi->rx += 2; in rx_fifo_read_full_duplex()
553 rx32 = (u32 *) spi->rx; in rx_fifo_read_full_duplex()
555 spi->rx_todo -= 4; in rx_fifo_read_full_duplex()
556 spi->rx += 4; in rx_fifo_read_full_duplex()
567 static void rx_fifo_read_half_duplex(struct lantiq_ssc_spi *spi) in rx_fifo_read_half_duplex() argument
572 unsigned int rx_fill = rx_fifo_level(spi); in rx_fifo_read_half_duplex()
582 if (spi->rx_todo < 4) { in rx_fifo_read_half_duplex()
583 rxbv = (lantiq_ssc_readl(spi, LTQ_SPI_STAT) & in rx_fifo_read_half_duplex()
585 data = lantiq_ssc_readl(spi, LTQ_SPI_RB); in rx_fifo_read_half_duplex()
588 rx8 = spi->rx; in rx_fifo_read_half_duplex()
594 spi->rx_todo--; in rx_fifo_read_half_duplex()
595 spi->rx++; in rx_fifo_read_half_duplex()
598 data = lantiq_ssc_readl(spi, LTQ_SPI_RB); in rx_fifo_read_half_duplex()
599 rx32 = (u32 *) spi->rx; in rx_fifo_read_half_duplex()
602 spi->rx_todo -= 4; in rx_fifo_read_half_duplex()
603 spi->rx += 4; in rx_fifo_read_half_duplex()
609 static void rx_request(struct lantiq_ssc_spi *spi) in rx_request() argument
618 rxreq = spi->rx_todo; in rx_request()
619 rxreq_max = spi->rx_fifo_size * 4; in rx_request()
623 lantiq_ssc_writel(spi, rxreq, LTQ_SPI_RXREQ); in rx_request()
628 struct lantiq_ssc_spi *spi = data; in lantiq_ssc_xmit_interrupt() local
630 if (spi->tx) { in lantiq_ssc_xmit_interrupt()
631 if (spi->rx && spi->rx_todo) in lantiq_ssc_xmit_interrupt()
632 rx_fifo_read_full_duplex(spi); in lantiq_ssc_xmit_interrupt()
634 if (spi->tx_todo) in lantiq_ssc_xmit_interrupt()
635 tx_fifo_write(spi); in lantiq_ssc_xmit_interrupt()
636 else if (!tx_fifo_level(spi)) in lantiq_ssc_xmit_interrupt()
638 } else if (spi->rx) { in lantiq_ssc_xmit_interrupt()
639 if (spi->rx_todo) { in lantiq_ssc_xmit_interrupt()
640 rx_fifo_read_half_duplex(spi); in lantiq_ssc_xmit_interrupt()
642 if (spi->rx_todo) in lantiq_ssc_xmit_interrupt()
643 rx_request(spi); in lantiq_ssc_xmit_interrupt()
654 queue_work(spi->wq, &spi->work); in lantiq_ssc_xmit_interrupt()
661 struct lantiq_ssc_spi *spi = data; in lantiq_ssc_err_interrupt() local
662 u32 stat = lantiq_ssc_readl(spi, LTQ_SPI_STAT); in lantiq_ssc_err_interrupt()
668 dev_err(spi->dev, "receive underflow error\n"); in lantiq_ssc_err_interrupt()
670 dev_err(spi->dev, "transmit underflow error\n"); in lantiq_ssc_err_interrupt()
672 dev_err(spi->dev, "abort error\n"); in lantiq_ssc_err_interrupt()
674 dev_err(spi->dev, "receive overflow error\n"); in lantiq_ssc_err_interrupt()
676 dev_err(spi->dev, "transmit overflow error\n"); in lantiq_ssc_err_interrupt()
678 dev_err(spi->dev, "mode error\n"); in lantiq_ssc_err_interrupt()
681 lantiq_ssc_maskl(spi, 0, LTQ_SPI_WHBSTATE_CLR_ERRORS, LTQ_SPI_WHBSTATE); in lantiq_ssc_err_interrupt()
684 if (spi->master->cur_msg) in lantiq_ssc_err_interrupt()
685 spi->master->cur_msg->status = -EIO; in lantiq_ssc_err_interrupt()
686 queue_work(spi->wq, &spi->work); in lantiq_ssc_err_interrupt()
691 static int transfer_start(struct lantiq_ssc_spi *spi, struct spi_device *spidev, in transfer_start() argument
696 spin_lock_irqsave(&spi->lock, flags); in transfer_start()
698 spi->tx = t->tx_buf; in transfer_start()
699 spi->rx = t->rx_buf; in transfer_start()
702 spi->tx_todo = t->len; in transfer_start()
705 tx_fifo_write(spi); in transfer_start()
708 if (spi->rx) { in transfer_start()
709 spi->rx_todo = t->len; in transfer_start()
712 if (!spi->tx) in transfer_start()
713 rx_request(spi); in transfer_start()
716 spin_unlock_irqrestore(&spi->lock, flags); in transfer_start()
730 struct lantiq_ssc_spi *spi; in lantiq_ssc_bussy_work() local
734 spi = container_of(work, typeof(*spi), work); in lantiq_ssc_bussy_work()
736 do_div(timeout, spi->speed_hz); in lantiq_ssc_bussy_work()
741 u32 stat = lantiq_ssc_readl(spi, LTQ_SPI_STAT); in lantiq_ssc_bussy_work()
744 spi_finalize_current_transfer(spi->master); in lantiq_ssc_bussy_work()
751 if (spi->master->cur_msg) in lantiq_ssc_bussy_work()
752 spi->master->cur_msg->status = -EIO; in lantiq_ssc_bussy_work()
753 spi_finalize_current_transfer(spi->master); in lantiq_ssc_bussy_work()
759 struct lantiq_ssc_spi *spi = spi_master_get_devdata(master); in lantiq_ssc_handle_err() local
762 rx_fifo_flush(spi); in lantiq_ssc_handle_err()
763 tx_fifo_flush(spi); in lantiq_ssc_handle_err()
768 struct lantiq_ssc_spi *spi = spi_master_get_devdata(spidev->master); in lantiq_ssc_set_cs() local
773 fgpo = (1 << (cs - spi->base_cs)); in lantiq_ssc_set_cs()
775 fgpo = (1 << (cs - spi->base_cs + LTQ_SPI_FGPO_SETOUTN_S)); in lantiq_ssc_set_cs()
777 lantiq_ssc_writel(spi, fgpo, LTQ_SPI_FPGO); in lantiq_ssc_set_cs()
784 struct lantiq_ssc_spi *spi = spi_master_get_devdata(master); in lantiq_ssc_transfer_one() local
786 hw_setup_transfer(spi, spidev, t); in lantiq_ssc_transfer_one()
788 return transfer_start(spi, spidev, t); in lantiq_ssc_transfer_one()
814 struct lantiq_ssc_spi *spi; in lantiq_ssc_probe() local
856 spi = spi_master_get_devdata(master); in lantiq_ssc_probe()
857 spi->master = master; in lantiq_ssc_probe()
858 spi->dev = dev; in lantiq_ssc_probe()
859 spi->hwcfg = hwcfg; in lantiq_ssc_probe()
860 platform_set_drvdata(pdev, spi); in lantiq_ssc_probe()
862 spi->regbase = devm_ioremap_resource(dev, res); in lantiq_ssc_probe()
863 if (IS_ERR(spi->regbase)) { in lantiq_ssc_probe()
864 err = PTR_ERR(spi->regbase); in lantiq_ssc_probe()
869 0, LTQ_SPI_RX_IRQ_NAME, spi); in lantiq_ssc_probe()
874 0, LTQ_SPI_TX_IRQ_NAME, spi); in lantiq_ssc_probe()
879 0, LTQ_SPI_ERR_IRQ_NAME, spi); in lantiq_ssc_probe()
883 spi->spi_clk = devm_clk_get(dev, "gate"); in lantiq_ssc_probe()
884 if (IS_ERR(spi->spi_clk)) { in lantiq_ssc_probe()
885 err = PTR_ERR(spi->spi_clk); in lantiq_ssc_probe()
888 err = clk_prepare_enable(spi->spi_clk); in lantiq_ssc_probe()
897 spi->fpi_clk = clk_get_fpi(); in lantiq_ssc_probe()
899 spi->fpi_clk = clk_get(dev, "freq"); in lantiq_ssc_probe()
901 if (IS_ERR(spi->fpi_clk)) { in lantiq_ssc_probe()
902 err = PTR_ERR(spi->fpi_clk); in lantiq_ssc_probe()
909 spi->base_cs = 1; in lantiq_ssc_probe()
910 of_property_read_u32(pdev->dev.of_node, "base-cs", &spi->base_cs); in lantiq_ssc_probe()
912 spin_lock_init(&spi->lock); in lantiq_ssc_probe()
913 spi->bits_per_word = 8; in lantiq_ssc_probe()
914 spi->speed_hz = 0; in lantiq_ssc_probe()
929 spi->wq = alloc_ordered_workqueue(dev_name(dev), 0); in lantiq_ssc_probe()
930 if (!spi->wq) { in lantiq_ssc_probe()
934 INIT_WORK(&spi->work, lantiq_ssc_bussy_work); in lantiq_ssc_probe()
936 id = lantiq_ssc_readl(spi, LTQ_SPI_ID); in lantiq_ssc_probe()
937 spi->tx_fifo_size = (id & LTQ_SPI_ID_TXFS_M) >> LTQ_SPI_ID_TXFS_S; in lantiq_ssc_probe()
938 spi->rx_fifo_size = (id & LTQ_SPI_ID_RXFS_M) >> LTQ_SPI_ID_RXFS_S; in lantiq_ssc_probe()
942 lantiq_ssc_hw_init(spi); in lantiq_ssc_probe()
946 revision, spi->tx_fifo_size, spi->rx_fifo_size, supports_dma); in lantiq_ssc_probe()
957 destroy_workqueue(spi->wq); in lantiq_ssc_probe()
959 clk_put(spi->fpi_clk); in lantiq_ssc_probe()
961 clk_disable_unprepare(spi->spi_clk); in lantiq_ssc_probe()
970 struct lantiq_ssc_spi *spi = platform_get_drvdata(pdev); in lantiq_ssc_remove() local
972 lantiq_ssc_writel(spi, 0, LTQ_SPI_IRNEN); in lantiq_ssc_remove()
973 lantiq_ssc_writel(spi, 0, LTQ_SPI_CLC); in lantiq_ssc_remove()
974 rx_fifo_flush(spi); in lantiq_ssc_remove()
975 tx_fifo_flush(spi); in lantiq_ssc_remove()
976 hw_enter_config_mode(spi); in lantiq_ssc_remove()
978 destroy_workqueue(spi->wq); in lantiq_ssc_remove()
979 clk_disable_unprepare(spi->spi_clk); in lantiq_ssc_remove()
980 clk_put(spi->fpi_clk); in lantiq_ssc_remove()