Lines Matching full:controller
164 static inline bool spi_qup_is_flag_set(struct spi_qup *controller, u32 flag) in spi_qup_is_flag_set() argument
166 u32 opflag = readl_relaxed(controller->base + QUP_OPERATIONAL); in spi_qup_is_flag_set()
180 static inline unsigned int spi_qup_len(struct spi_qup *controller) in spi_qup_len() argument
182 return controller->n_words * controller->w_size; in spi_qup_len()
185 static inline bool spi_qup_is_valid_state(struct spi_qup *controller) in spi_qup_is_valid_state() argument
187 u32 opstate = readl_relaxed(controller->base + QUP_STATE); in spi_qup_is_valid_state()
192 static int spi_qup_set_state(struct spi_qup *controller, u32 state) in spi_qup_set_state() argument
198 while (!spi_qup_is_valid_state(controller)) { in spi_qup_set_state()
207 dev_dbg(controller->dev, "invalid state for %ld,us %d\n", in spi_qup_set_state()
210 cur_state = readl_relaxed(controller->base + QUP_STATE); in spi_qup_set_state()
217 writel_relaxed(QUP_STATE_CLEAR, controller->base + QUP_STATE); in spi_qup_set_state()
218 writel_relaxed(QUP_STATE_CLEAR, controller->base + QUP_STATE); in spi_qup_set_state()
222 writel_relaxed(cur_state, controller->base + QUP_STATE); in spi_qup_set_state()
226 while (!spi_qup_is_valid_state(controller)) { in spi_qup_set_state()
237 static void spi_qup_read_from_fifo(struct spi_qup *controller, u32 num_words) in spi_qup_read_from_fifo() argument
239 u8 *rx_buf = controller->rx_buf; in spi_qup_read_from_fifo()
245 word = readl_relaxed(controller->base + QUP_INPUT_FIFO); in spi_qup_read_from_fifo()
247 num_bytes = min_t(int, spi_qup_len(controller) - in spi_qup_read_from_fifo()
248 controller->rx_bytes, in spi_qup_read_from_fifo()
249 controller->w_size); in spi_qup_read_from_fifo()
252 controller->rx_bytes += num_bytes; in spi_qup_read_from_fifo()
256 for (i = 0; i < num_bytes; i++, controller->rx_bytes++) { in spi_qup_read_from_fifo()
264 shift *= (controller->w_size - i - 1); in spi_qup_read_from_fifo()
265 rx_buf[controller->rx_bytes] = word >> shift; in spi_qup_read_from_fifo()
270 static void spi_qup_read(struct spi_qup *controller, u32 *opflags) in spi_qup_read() argument
273 bool is_block_mode = controller->mode == QUP_IO_M_MODE_BLOCK; in spi_qup_read()
275 remainder = DIV_ROUND_UP(spi_qup_len(controller) - controller->rx_bytes, in spi_qup_read()
276 controller->w_size); in spi_qup_read()
277 words_per_block = controller->in_blk_sz >> 2; in spi_qup_read()
282 controller->base + QUP_OPERATIONAL); in spi_qup_read()
288 if (!spi_qup_is_flag_set(controller, in spi_qup_read()
296 spi_qup_read_from_fifo(controller, num_words); in spi_qup_read()
301 if (is_block_mode && !spi_qup_is_flag_set(controller, in spi_qup_read()
313 *opflags = readl_relaxed(controller->base + QUP_OPERATIONAL); in spi_qup_read()
316 controller->base + QUP_OPERATIONAL); in spi_qup_read()
320 static void spi_qup_write_to_fifo(struct spi_qup *controller, u32 num_words) in spi_qup_write_to_fifo() argument
322 const u8 *tx_buf = controller->tx_buf; in spi_qup_write_to_fifo()
329 num_bytes = min_t(int, spi_qup_len(controller) - in spi_qup_write_to_fifo()
330 controller->tx_bytes, in spi_qup_write_to_fifo()
331 controller->w_size); in spi_qup_write_to_fifo()
334 data = tx_buf[controller->tx_bytes + i]; in spi_qup_write_to_fifo()
338 controller->tx_bytes += num_bytes; in spi_qup_write_to_fifo()
340 writel_relaxed(word, controller->base + QUP_OUTPUT_FIFO); in spi_qup_write_to_fifo()
351 static void spi_qup_write(struct spi_qup *controller) in spi_qup_write() argument
353 bool is_block_mode = controller->mode == QUP_IO_M_MODE_BLOCK; in spi_qup_write()
356 remainder = DIV_ROUND_UP(spi_qup_len(controller) - controller->tx_bytes, in spi_qup_write()
357 controller->w_size); in spi_qup_write()
358 words_per_block = controller->out_blk_sz >> 2; in spi_qup_write()
363 controller->base + QUP_OPERATIONAL); in spi_qup_write()
369 if (spi_qup_is_flag_set(controller, in spi_qup_write()
376 spi_qup_write_to_fifo(controller, num_words); in spi_qup_write()
381 if (is_block_mode && !spi_qup_is_flag_set(controller, in spi_qup_write()
580 struct spi_qup *controller = dev_id; in spi_qup_qup_irq() local
584 qup_err = readl_relaxed(controller->base + QUP_ERROR_FLAGS); in spi_qup_qup_irq()
585 spi_err = readl_relaxed(controller->base + SPI_ERROR_FLAGS); in spi_qup_qup_irq()
586 opflags = readl_relaxed(controller->base + QUP_OPERATIONAL); in spi_qup_qup_irq()
588 writel_relaxed(qup_err, controller->base + QUP_ERROR_FLAGS); in spi_qup_qup_irq()
589 writel_relaxed(spi_err, controller->base + SPI_ERROR_FLAGS); in spi_qup_qup_irq()
593 dev_warn(controller->dev, "OUTPUT_OVER_RUN\n"); in spi_qup_qup_irq()
595 dev_warn(controller->dev, "INPUT_UNDER_RUN\n"); in spi_qup_qup_irq()
597 dev_warn(controller->dev, "OUTPUT_UNDER_RUN\n"); in spi_qup_qup_irq()
599 dev_warn(controller->dev, "INPUT_OVER_RUN\n"); in spi_qup_qup_irq()
606 dev_warn(controller->dev, "CLK_OVER_RUN\n"); in spi_qup_qup_irq()
608 dev_warn(controller->dev, "CLK_UNDER_RUN\n"); in spi_qup_qup_irq()
613 if (spi_qup_is_dma_xfer(controller->mode)) { in spi_qup_qup_irq()
614 writel_relaxed(opflags, controller->base + QUP_OPERATIONAL); in spi_qup_qup_irq()
617 spi_qup_read(controller, &opflags); in spi_qup_qup_irq()
620 spi_qup_write(controller); in spi_qup_qup_irq()
624 complete(&controller->done); in spi_qup_qup_irq()
632 struct spi_qup *controller = spi_master_get_devdata(spi->master); in spi_qup_io_prep() local
635 if (spi->mode & SPI_LOOP && xfer->len > controller->in_fifo_sz) { in spi_qup_io_prep()
636 dev_err(controller->dev, "too big size for loopback %d > %d\n", in spi_qup_io_prep()
637 xfer->len, controller->in_fifo_sz); in spi_qup_io_prep()
641 ret = clk_set_rate(controller->cclk, xfer->speed_hz); in spi_qup_io_prep()
643 dev_err(controller->dev, "fail to set frequency %d", in spi_qup_io_prep()
648 controller->w_size = DIV_ROUND_UP(xfer->bits_per_word, 8); in spi_qup_io_prep()
649 controller->n_words = xfer->len / controller->w_size; in spi_qup_io_prep()
651 if (controller->n_words <= (controller->in_fifo_sz / sizeof(u32))) in spi_qup_io_prep()
652 controller->mode = QUP_IO_M_MODE_FIFO; in spi_qup_io_prep()
656 controller->mode = QUP_IO_M_MODE_BAM; in spi_qup_io_prep()
658 controller->mode = QUP_IO_M_MODE_BLOCK; in spi_qup_io_prep()
666 struct spi_qup *controller = spi_master_get_devdata(spi->master); in spi_qup_io_config() local
670 spin_lock_irqsave(&controller->lock, flags); in spi_qup_io_config()
671 controller->xfer = xfer; in spi_qup_io_config()
672 controller->error = 0; in spi_qup_io_config()
673 controller->rx_bytes = 0; in spi_qup_io_config()
674 controller->tx_bytes = 0; in spi_qup_io_config()
675 spin_unlock_irqrestore(&controller->lock, flags); in spi_qup_io_config()
678 if (spi_qup_set_state(controller, QUP_STATE_RESET)) { in spi_qup_io_config()
679 dev_err(controller->dev, "cannot set RESET state\n"); in spi_qup_io_config()
683 switch (controller->mode) { in spi_qup_io_config()
685 writel_relaxed(controller->n_words, in spi_qup_io_config()
686 controller->base + QUP_MX_READ_CNT); in spi_qup_io_config()
687 writel_relaxed(controller->n_words, in spi_qup_io_config()
688 controller->base + QUP_MX_WRITE_CNT); in spi_qup_io_config()
690 writel_relaxed(0, controller->base + QUP_MX_INPUT_CNT); in spi_qup_io_config()
691 writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); in spi_qup_io_config()
694 writel_relaxed(controller->n_words, in spi_qup_io_config()
695 controller->base + QUP_MX_INPUT_CNT); in spi_qup_io_config()
696 writel_relaxed(controller->n_words, in spi_qup_io_config()
697 controller->base + QUP_MX_OUTPUT_CNT); in spi_qup_io_config()
699 writel_relaxed(0, controller->base + QUP_MX_READ_CNT); in spi_qup_io_config()
700 writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); in spi_qup_io_config()
702 if (!controller->qup_v1) { in spi_qup_io_config()
705 input_cnt = controller->base + QUP_MX_INPUT_CNT; in spi_qup_io_config()
715 writel_relaxed(controller->n_words, input_cnt); in spi_qup_io_config()
717 writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); in spi_qup_io_config()
721 reinit_completion(&controller->done); in spi_qup_io_config()
722 writel_relaxed(controller->n_words, in spi_qup_io_config()
723 controller->base + QUP_MX_INPUT_CNT); in spi_qup_io_config()
724 writel_relaxed(controller->n_words, in spi_qup_io_config()
725 controller->base + QUP_MX_OUTPUT_CNT); in spi_qup_io_config()
727 writel_relaxed(0, controller->base + QUP_MX_READ_CNT); in spi_qup_io_config()
728 writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); in spi_qup_io_config()
731 dev_err(controller->dev, "unknown mode = %d\n", in spi_qup_io_config()
732 controller->mode); in spi_qup_io_config()
736 iomode = readl_relaxed(controller->base + QUP_IO_M_MODES); in spi_qup_io_config()
740 if (!spi_qup_is_dma_xfer(controller->mode)) in spi_qup_io_config()
745 iomode |= (controller->mode << QUP_IO_M_OUTPUT_MODE_MASK_SHIFT); in spi_qup_io_config()
746 iomode |= (controller->mode << QUP_IO_M_INPUT_MODE_MASK_SHIFT); in spi_qup_io_config()
748 writel_relaxed(iomode, controller->base + QUP_IO_M_MODES); in spi_qup_io_config()
750 control = readl_relaxed(controller->base + SPI_IO_CONTROL); in spi_qup_io_config()
757 writel_relaxed(control, controller->base + SPI_IO_CONTROL); in spi_qup_io_config()
759 config = readl_relaxed(controller->base + SPI_CONFIG); in spi_qup_io_config()
780 writel_relaxed(config, controller->base + SPI_CONFIG); in spi_qup_io_config()
782 config = readl_relaxed(controller->base + QUP_CONFIG); in spi_qup_io_config()
787 if (spi_qup_is_dma_xfer(controller->mode)) { in spi_qup_io_config()
794 writel_relaxed(config, controller->base + QUP_CONFIG); in spi_qup_io_config()
797 if (!controller->qup_v1) { in spi_qup_io_config()
805 if (spi_qup_is_dma_xfer(controller->mode)) in spi_qup_io_config()
808 writel_relaxed(mask, controller->base + QUP_OPERATIONAL_MASK); in spi_qup_io_config()
818 struct spi_qup *controller = spi_master_get_devdata(master); in spi_qup_transfer_one() local
831 reinit_completion(&controller->done); in spi_qup_transfer_one()
833 spin_lock_irqsave(&controller->lock, flags); in spi_qup_transfer_one()
834 controller->xfer = xfer; in spi_qup_transfer_one()
835 controller->error = 0; in spi_qup_transfer_one()
836 controller->rx_bytes = 0; in spi_qup_transfer_one()
837 controller->tx_bytes = 0; in spi_qup_transfer_one()
838 spin_unlock_irqrestore(&controller->lock, flags); in spi_qup_transfer_one()
840 if (spi_qup_is_dma_xfer(controller->mode)) in spi_qup_transfer_one()
849 spi_qup_set_state(controller, QUP_STATE_RESET); in spi_qup_transfer_one()
850 spin_lock_irqsave(&controller->lock, flags); in spi_qup_transfer_one()
852 ret = controller->error; in spi_qup_transfer_one()
853 spin_unlock_irqrestore(&controller->lock, flags); in spi_qup_transfer_one()
855 if (ret && spi_qup_is_dma_xfer(controller->mode)) in spi_qup_transfer_one()
952 struct spi_qup *controller; in spi_qup_set_cs() local
956 controller = spi_master_get_devdata(spi->master); in spi_qup_set_cs()
957 spi_ioc = readl_relaxed(controller->base + SPI_IO_CONTROL); in spi_qup_set_cs()
965 writel_relaxed(spi_ioc, controller->base + SPI_IO_CONTROL); in spi_qup_set_cs()
972 struct spi_qup *controller; in spi_qup_probe() local
1046 controller = spi_master_get_devdata(master); in spi_qup_probe()
1048 controller->dev = dev; in spi_qup_probe()
1049 controller->base = base; in spi_qup_probe()
1050 controller->iclk = iclk; in spi_qup_probe()
1051 controller->cclk = cclk; in spi_qup_probe()
1052 controller->irq = irq; in spi_qup_probe()
1060 controller->qup_v1 = (uintptr_t)of_device_get_match_data(dev); in spi_qup_probe()
1062 if (!controller->qup_v1) in spi_qup_probe()
1065 spin_lock_init(&controller->lock); in spi_qup_probe()
1066 init_completion(&controller->done); in spi_qup_probe()
1072 controller->out_blk_sz = size * 16; in spi_qup_probe()
1074 controller->out_blk_sz = 4; in spi_qup_probe()
1078 controller->in_blk_sz = size * 16; in spi_qup_probe()
1080 controller->in_blk_sz = 4; in spi_qup_probe()
1083 controller->out_fifo_sz = controller->out_blk_sz * (2 << size); in spi_qup_probe()
1086 controller->in_fifo_sz = controller->in_blk_sz * (2 << size); in spi_qup_probe()
1089 controller->in_blk_sz, controller->in_fifo_sz, in spi_qup_probe()
1090 controller->out_blk_sz, controller->out_fifo_sz); in spi_qup_probe()
1094 ret = spi_qup_set_state(controller, QUP_STATE_RESET); in spi_qup_probe()
1103 if (!controller->qup_v1) in spi_qup_probe()
1110 if (controller->qup_v1) in spi_qup_probe()
1119 IRQF_TRIGGER_HIGH, pdev->name, controller); in spi_qup_probe()
1149 struct spi_qup *controller = spi_master_get_devdata(master); in spi_qup_pm_suspend_runtime() local
1153 config = readl(controller->base + QUP_CONFIG); in spi_qup_pm_suspend_runtime()
1155 writel_relaxed(config, controller->base + QUP_CONFIG); in spi_qup_pm_suspend_runtime()
1157 clk_disable_unprepare(controller->cclk); in spi_qup_pm_suspend_runtime()
1158 clk_disable_unprepare(controller->iclk); in spi_qup_pm_suspend_runtime()
1166 struct spi_qup *controller = spi_master_get_devdata(master); in spi_qup_pm_resume_runtime() local
1170 ret = clk_prepare_enable(controller->iclk); in spi_qup_pm_resume_runtime()
1174 ret = clk_prepare_enable(controller->cclk); in spi_qup_pm_resume_runtime()
1179 config = readl_relaxed(controller->base + QUP_CONFIG); in spi_qup_pm_resume_runtime()
1181 writel_relaxed(config, controller->base + QUP_CONFIG); in spi_qup_pm_resume_runtime()
1190 struct spi_qup *controller = spi_master_get_devdata(master); in spi_qup_suspend() local
1202 ret = spi_qup_set_state(controller, QUP_STATE_RESET); in spi_qup_suspend()
1206 clk_disable_unprepare(controller->cclk); in spi_qup_suspend()
1207 clk_disable_unprepare(controller->iclk); in spi_qup_suspend()
1214 struct spi_qup *controller = spi_master_get_devdata(master); in spi_qup_resume() local
1217 ret = clk_prepare_enable(controller->iclk); in spi_qup_resume()
1221 ret = clk_prepare_enable(controller->cclk); in spi_qup_resume()
1225 ret = spi_qup_set_state(controller, QUP_STATE_RESET); in spi_qup_resume()
1236 struct spi_qup *controller = spi_master_get_devdata(master); in spi_qup_remove() local
1243 ret = spi_qup_set_state(controller, QUP_STATE_RESET); in spi_qup_remove()
1249 clk_disable_unprepare(controller->cclk); in spi_qup_remove()
1250 clk_disable_unprepare(controller->iclk); in spi_qup_remove()