Lines Matching +full:port +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0
6 * This is based on the drivers/serial/sunzilog.c code as of 2.6.0-test7 and the
13 * Copyright (C) 2002 Ralf Baechle (ralf@linux-mips.org)
58 #define NUM_CHANNELS (NUM_IP22ZILOG * 2)
64 * We wrap our port structure around the generic uart_port.
67 struct uart_port port; member
91 #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel *)((PORT)->membase)) argument
92 #define UART_ZILOG(PORT) ((struct uart_ip22zilog_port *)(PORT)) argument
93 #define IP22ZILOG_GET_CURR_REG(PORT, REGNUM) \ argument
94 (UART_ZILOG(PORT)->curregs[REGNUM])
95 #define IP22ZILOG_SET_CURR_REG(PORT, REGNUM, REGVAL) \ argument
96 ((UART_ZILOG(PORT)->curregs[REGNUM]) = (REGVAL))
97 #define ZS_IS_CONS(UP) ((UP)->flags & IP22ZILOG_FLAG_IS_CONS)
98 #define ZS_IS_KGDB(UP) ((UP)->flags & IP22ZILOG_FLAG_IS_KGDB)
99 #define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & IP22ZILOG_FLAG_MODEM_STATUS)
100 #define ZS_IS_CHANNEL_A(UP) ((UP)->flags & IP22ZILOG_FLAG_IS_CHANNEL_A)
101 #define ZS_REGS_HELD(UP) ((UP)->flags & IP22ZILOG_FLAG_REGS_HELD)
102 #define ZS_TX_STOPPED(UP) ((UP)->flags & IP22ZILOG_FLAG_TX_STOPPED)
103 #define ZS_TX_ACTIVE(UP) ((UP)->flags & IP22ZILOG_FLAG_TX_ACTIVE)
108 * flip-flops which implement the settle time we do in software.
110 * The port lock must be held and local IRQs must be disabled
118 writeb(reg, &channel->control); in read_zsreg()
120 retval = readb(&channel->control); in read_zsreg()
129 writeb(reg, &channel->control); in write_zsreg()
131 writeb(value, &channel->control); in write_zsreg()
142 regval = readb(&channel->control); in ip22zilog_clear_fifo()
148 readb(&channel->data); in ip22zilog_clear_fifo()
152 writeb(ERR_RES, &channel->control); in ip22zilog_clear_fifo()
160 * port lock must be held and local interrupts disabled.
174 writeb(ERR_RES, &channel->control); in __load_zsregs()
235 * The UART port lock must be held and local interrupts disabled.
242 up->flags |= IP22ZILOG_FLAG_REGS_HELD; in ip22zilog_maybe_update_regs()
244 __load_zsregs(channel, up->curregs); in ip22zilog_maybe_update_regs()
257 bool push = up->port.state != NULL; in ip22zilog_receive_chars()
260 ch = readb(&channel->control); in ip22zilog_receive_chars()
267 writeb(ERR_RES, &channel->control); in ip22zilog_receive_chars()
272 ch = readb(&channel->data); in ip22zilog_receive_chars()
275 ch &= up->parity_mask; in ip22zilog_receive_chars()
279 r1 |= up->tty_break; in ip22zilog_receive_chars()
283 up->port.icount.rx++; in ip22zilog_receive_chars()
285 up->tty_break = 0; in ip22zilog_receive_chars()
288 up->port.icount.brk++; in ip22zilog_receive_chars()
294 up->port.icount.parity++; in ip22zilog_receive_chars()
296 up->port.icount.frame++; in ip22zilog_receive_chars()
298 up->port.icount.overrun++; in ip22zilog_receive_chars()
299 r1 &= up->port.read_status_mask; in ip22zilog_receive_chars()
308 if (uart_handle_sysrq_char(&up->port, ch)) in ip22zilog_receive_chars()
312 uart_insert_char(&up->port, r1, Rx_OVR, ch, flag); in ip22zilog_receive_chars()
322 status = readb(&channel->control); in ip22zilog_status_handle()
325 writeb(RES_EXT_INT, &channel->control); in ip22zilog_status_handle()
329 if (up->curregs[R15] & BRKIE) { in ip22zilog_status_handle()
330 if ((status & BRK_ABRT) && !(up->prev_status & BRK_ABRT)) { in ip22zilog_status_handle()
331 if (uart_handle_break(&up->port)) in ip22zilog_status_handle()
332 up->tty_break = Rx_SYS; in ip22zilog_status_handle()
334 up->tty_break = Rx_BRK; in ip22zilog_status_handle()
340 up->port.icount.dsr++; in ip22zilog_status_handle()
346 if ((status ^ up->prev_status) ^ DCD) in ip22zilog_status_handle()
347 uart_handle_dcd_change(&up->port, in ip22zilog_status_handle()
349 if ((status ^ up->prev_status) ^ CTS) in ip22zilog_status_handle()
350 uart_handle_cts_change(&up->port, in ip22zilog_status_handle()
353 wake_up_interruptible(&up->port.state->port.delta_msr_wait); in ip22zilog_status_handle()
356 up->prev_status = status; in ip22zilog_status_handle()
365 unsigned char status = readb(&channel->control); in ip22zilog_transmit_chars()
374 * to poll on enough port->xmit space becoming free. -DaveM in ip22zilog_transmit_chars()
380 up->flags &= ~IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_transmit_chars()
383 __load_zsregs(channel, up->curregs); in ip22zilog_transmit_chars()
384 up->flags &= ~IP22ZILOG_FLAG_REGS_HELD; in ip22zilog_transmit_chars()
388 up->flags &= ~IP22ZILOG_FLAG_TX_STOPPED; in ip22zilog_transmit_chars()
392 if (up->port.x_char) { in ip22zilog_transmit_chars()
393 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_transmit_chars()
394 writeb(up->port.x_char, &channel->data); in ip22zilog_transmit_chars()
398 up->port.icount.tx++; in ip22zilog_transmit_chars()
399 up->port.x_char = 0; in ip22zilog_transmit_chars()
403 if (up->port.state == NULL) in ip22zilog_transmit_chars()
405 xmit = &up->port.state->xmit; in ip22zilog_transmit_chars()
408 if (uart_tx_stopped(&up->port)) in ip22zilog_transmit_chars()
411 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_transmit_chars()
412 writeb(xmit->buf[xmit->tail], &channel->data); in ip22zilog_transmit_chars()
416 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); in ip22zilog_transmit_chars()
417 up->port.icount.tx++; in ip22zilog_transmit_chars()
420 uart_write_wakeup(&up->port); in ip22zilog_transmit_chars()
425 writeb(RES_Tx_P, &channel->control); in ip22zilog_transmit_chars()
436 = ZILOG_CHANNEL_FROM_PORT(&up->port); in ip22zilog_interrupt()
440 spin_lock(&up->port.lock); in ip22zilog_interrupt()
445 writeb(RES_H_IUS, &channel->control); in ip22zilog_interrupt()
456 spin_unlock(&up->port.lock); in ip22zilog_interrupt()
459 tty_flip_buffer_push(&up->port.state->port); in ip22zilog_interrupt()
462 up = up->next; in ip22zilog_interrupt()
463 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in ip22zilog_interrupt()
466 spin_lock(&up->port.lock); in ip22zilog_interrupt()
468 writeb(RES_H_IUS, &channel->control); in ip22zilog_interrupt()
479 spin_unlock(&up->port.lock); in ip22zilog_interrupt()
482 tty_flip_buffer_push(&up->port.state->port); in ip22zilog_interrupt()
484 up = up->next; in ip22zilog_interrupt()
491 * port lock, it is acquired here.
493 static __inline__ unsigned char ip22zilog_read_channel_status(struct uart_port *port) in ip22zilog_read_channel_status() argument
498 channel = ZILOG_CHANNEL_FROM_PORT(port); in ip22zilog_read_channel_status()
499 status = readb(&channel->control); in ip22zilog_read_channel_status()
505 /* The port lock is not held. */
506 static unsigned int ip22zilog_tx_empty(struct uart_port *port) in ip22zilog_tx_empty() argument
512 spin_lock_irqsave(&port->lock, flags); in ip22zilog_tx_empty()
514 status = ip22zilog_read_channel_status(port); in ip22zilog_tx_empty()
516 spin_unlock_irqrestore(&port->lock, flags); in ip22zilog_tx_empty()
526 /* The port lock is held and interrupts are disabled. */
527 static unsigned int ip22zilog_get_mctrl(struct uart_port *port) in ip22zilog_get_mctrl() argument
532 status = ip22zilog_read_channel_status(port); in ip22zilog_get_mctrl()
545 /* The port lock is held and interrupts are disabled. */
546 static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl) in ip22zilog_set_mctrl() argument
549 container_of(port, struct uart_ip22zilog_port, port); in ip22zilog_set_mctrl()
550 struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); in ip22zilog_set_mctrl()
565 up->curregs[R5] |= set_bits; in ip22zilog_set_mctrl()
566 up->curregs[R5] &= ~clear_bits; in ip22zilog_set_mctrl()
567 write_zsreg(channel, R5, up->curregs[R5]); in ip22zilog_set_mctrl()
570 /* The port lock is held and interrupts are disabled. */
571 static void ip22zilog_stop_tx(struct uart_port *port) in ip22zilog_stop_tx() argument
574 container_of(port, struct uart_ip22zilog_port, port); in ip22zilog_stop_tx()
576 up->flags |= IP22ZILOG_FLAG_TX_STOPPED; in ip22zilog_stop_tx()
579 /* The port lock is held and interrupts are disabled. */
580 static void ip22zilog_start_tx(struct uart_port *port) in ip22zilog_start_tx() argument
583 container_of(port, struct uart_ip22zilog_port, port); in ip22zilog_start_tx()
584 struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); in ip22zilog_start_tx()
587 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_start_tx()
588 up->flags &= ~IP22ZILOG_FLAG_TX_STOPPED; in ip22zilog_start_tx()
590 status = readb(&channel->control); in ip22zilog_start_tx()
597 /* Send the first character to jump-start the TX done in ip22zilog_start_tx()
600 if (port->x_char) { in ip22zilog_start_tx()
601 writeb(port->x_char, &channel->data); in ip22zilog_start_tx()
605 port->icount.tx++; in ip22zilog_start_tx()
606 port->x_char = 0; in ip22zilog_start_tx()
608 struct circ_buf *xmit = &port->state->xmit; in ip22zilog_start_tx()
612 writeb(xmit->buf[xmit->tail], &channel->data); in ip22zilog_start_tx()
616 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); in ip22zilog_start_tx()
617 port->icount.tx++; in ip22zilog_start_tx()
620 uart_write_wakeup(&up->port); in ip22zilog_start_tx()
624 /* The port lock is held and interrupts are disabled. */
625 static void ip22zilog_stop_rx(struct uart_port *port) in ip22zilog_stop_rx() argument
627 struct uart_ip22zilog_port *up = UART_ZILOG(port); in ip22zilog_stop_rx()
633 channel = ZILOG_CHANNEL_FROM_PORT(port); in ip22zilog_stop_rx()
636 up->curregs[R1] &= ~RxINT_MASK; in ip22zilog_stop_rx()
640 /* The port lock is held. */
641 static void ip22zilog_enable_ms(struct uart_port *port) in ip22zilog_enable_ms() argument
644 container_of(port, struct uart_ip22zilog_port, port); in ip22zilog_enable_ms()
645 struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); in ip22zilog_enable_ms()
648 new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); in ip22zilog_enable_ms()
649 if (new_reg != up->curregs[R15]) { in ip22zilog_enable_ms()
650 up->curregs[R15] = new_reg; in ip22zilog_enable_ms()
653 write_zsreg(channel, R15, up->curregs[R15]); in ip22zilog_enable_ms()
657 /* The port lock is not held. */
658 static void ip22zilog_break_ctl(struct uart_port *port, int break_state) in ip22zilog_break_ctl() argument
661 container_of(port, struct uart_ip22zilog_port, port); in ip22zilog_break_ctl()
662 struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); in ip22zilog_break_ctl()
673 spin_lock_irqsave(&port->lock, flags); in ip22zilog_break_ctl()
675 new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; in ip22zilog_break_ctl()
676 if (new_reg != up->curregs[R5]) { in ip22zilog_break_ctl()
677 up->curregs[R5] = new_reg; in ip22zilog_break_ctl()
680 write_zsreg(channel, R5, up->curregs[R5]); in ip22zilog_break_ctl()
683 spin_unlock_irqrestore(&port->lock, flags); in ip22zilog_break_ctl()
691 if (up->flags & IP22ZILOG_FLAG_RESET_DONE) in __ip22zilog_reset()
695 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __ip22zilog_reset()
705 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __ip22zilog_reset()
711 up->flags |= IP22ZILOG_FLAG_RESET_DONE; in __ip22zilog_reset()
712 up->next->flags |= IP22ZILOG_FLAG_RESET_DONE; in __ip22zilog_reset()
719 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __ip22zilog_startup()
723 __load_zsregs(channel, up->curregs); in __ip22zilog_startup()
725 write_zsreg(channel, R9, up->curregs[R9]); in __ip22zilog_startup()
726 up->prev_status = readb(&channel->control); in __ip22zilog_startup()
729 up->curregs[R3] |= RxENAB; in __ip22zilog_startup()
730 up->curregs[R5] |= TxENAB; in __ip22zilog_startup()
732 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in __ip22zilog_startup()
736 static int ip22zilog_startup(struct uart_port *port) in ip22zilog_startup() argument
738 struct uart_ip22zilog_port *up = UART_ZILOG(port); in ip22zilog_startup()
744 spin_lock_irqsave(&port->lock, flags); in ip22zilog_startup()
746 spin_unlock_irqrestore(&port->lock, flags); in ip22zilog_startup()
751 * The test for ZS_IS_CONS is explained by the following e-mail:
756 * On Sun, Dec 08, 2002 at 02:43:36AM -0500, Pete Zaitcev wrote:
768 * 1. initialise the port into a state where it can send characters in the
771 * 2. don't do the actual hardware shutdown in your shutdown() method (but
772 * do the normal software shutdown - ie, free irqs etc)
775 static void ip22zilog_shutdown(struct uart_port *port) in ip22zilog_shutdown() argument
777 struct uart_ip22zilog_port *up = UART_ZILOG(port); in ip22zilog_shutdown()
784 spin_lock_irqsave(&port->lock, flags); in ip22zilog_shutdown()
786 channel = ZILOG_CHANNEL_FROM_PORT(port); in ip22zilog_shutdown()
789 up->curregs[R3] &= ~RxENAB; in ip22zilog_shutdown()
790 up->curregs[R5] &= ~TxENAB; in ip22zilog_shutdown()
793 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in ip22zilog_shutdown()
794 up->curregs[R5] &= ~SND_BRK; in ip22zilog_shutdown()
797 spin_unlock_irqrestore(&port->lock, flags); in ip22zilog_shutdown()
800 /* Shared by TTY driver and serial console setup. The port lock is held
808 up->curregs[R10] = NRZ; in ip22zilog_convert_to_zs()
809 up->curregs[R11] = TCBR | RCBR; in ip22zilog_convert_to_zs()
812 up->curregs[R4] &= ~XCLK_MASK; in ip22zilog_convert_to_zs()
813 up->curregs[R4] |= X16CLK; in ip22zilog_convert_to_zs()
814 up->curregs[R12] = brg & 0xff; in ip22zilog_convert_to_zs()
815 up->curregs[R13] = (brg >> 8) & 0xff; in ip22zilog_convert_to_zs()
816 up->curregs[R14] = BRENAB; in ip22zilog_convert_to_zs()
819 up->curregs[3] &= ~RxN_MASK; in ip22zilog_convert_to_zs()
820 up->curregs[5] &= ~TxN_MASK; in ip22zilog_convert_to_zs()
823 up->curregs[3] |= Rx5; in ip22zilog_convert_to_zs()
824 up->curregs[5] |= Tx5; in ip22zilog_convert_to_zs()
825 up->parity_mask = 0x1f; in ip22zilog_convert_to_zs()
828 up->curregs[3] |= Rx6; in ip22zilog_convert_to_zs()
829 up->curregs[5] |= Tx6; in ip22zilog_convert_to_zs()
830 up->parity_mask = 0x3f; in ip22zilog_convert_to_zs()
833 up->curregs[3] |= Rx7; in ip22zilog_convert_to_zs()
834 up->curregs[5] |= Tx7; in ip22zilog_convert_to_zs()
835 up->parity_mask = 0x7f; in ip22zilog_convert_to_zs()
839 up->curregs[3] |= Rx8; in ip22zilog_convert_to_zs()
840 up->curregs[5] |= Tx8; in ip22zilog_convert_to_zs()
841 up->parity_mask = 0xff; in ip22zilog_convert_to_zs()
844 up->curregs[4] &= ~0x0c; in ip22zilog_convert_to_zs()
846 up->curregs[4] |= SB2; in ip22zilog_convert_to_zs()
848 up->curregs[4] |= SB1; in ip22zilog_convert_to_zs()
850 up->curregs[4] |= PAR_ENAB; in ip22zilog_convert_to_zs()
852 up->curregs[4] &= ~PAR_ENAB; in ip22zilog_convert_to_zs()
854 up->curregs[4] |= PAR_EVEN; in ip22zilog_convert_to_zs()
856 up->curregs[4] &= ~PAR_EVEN; in ip22zilog_convert_to_zs()
858 up->port.read_status_mask = Rx_OVR; in ip22zilog_convert_to_zs()
860 up->port.read_status_mask |= CRC_ERR | PAR_ERR; in ip22zilog_convert_to_zs()
862 up->port.read_status_mask |= BRK_ABRT; in ip22zilog_convert_to_zs()
864 up->port.ignore_status_mask = 0; in ip22zilog_convert_to_zs()
866 up->port.ignore_status_mask |= CRC_ERR | PAR_ERR; in ip22zilog_convert_to_zs()
868 up->port.ignore_status_mask |= BRK_ABRT; in ip22zilog_convert_to_zs()
870 up->port.ignore_status_mask |= Rx_OVR; in ip22zilog_convert_to_zs()
874 up->port.ignore_status_mask = 0xff; in ip22zilog_convert_to_zs()
877 /* The port lock is not held. */
879 ip22zilog_set_termios(struct uart_port *port, struct ktermios *termios, in ip22zilog_set_termios() argument
883 container_of(port, struct uart_ip22zilog_port, port); in ip22zilog_set_termios()
887 baud = uart_get_baud_rate(port, termios, old, 1200, 76800); in ip22zilog_set_termios()
889 spin_lock_irqsave(&up->port.lock, flags); in ip22zilog_set_termios()
893 ip22zilog_convert_to_zs(up, termios->c_cflag, termios->c_iflag, brg); in ip22zilog_set_termios()
895 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) in ip22zilog_set_termios()
896 up->flags |= IP22ZILOG_FLAG_MODEM_STATUS; in ip22zilog_set_termios()
898 up->flags &= ~IP22ZILOG_FLAG_MODEM_STATUS; in ip22zilog_set_termios()
900 ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port)); in ip22zilog_set_termios()
901 uart_update_timeout(port, termios->c_cflag, baud); in ip22zilog_set_termios()
903 spin_unlock_irqrestore(&up->port.lock, flags); in ip22zilog_set_termios()
906 static const char *ip22zilog_type(struct uart_port *port) in ip22zilog_type() argument
908 return "IP22-Zilog"; in ip22zilog_type()
914 static void ip22zilog_release_port(struct uart_port *port) in ip22zilog_release_port() argument
918 static int ip22zilog_request_port(struct uart_port *port) in ip22zilog_request_port() argument
924 static void ip22zilog_config_port(struct uart_port *port, int flags) in ip22zilog_config_port() argument
929 static int ip22zilog_verify_port(struct uart_port *port, struct serial_struct *ser) in ip22zilog_verify_port() argument
931 return -EINVAL; in ip22zilog_verify_port()
957 static int zilog_irq = -1;
972 panic("IP22-Zilog: Cannot allocate IP22-Zilog tables."); in ip22zilog_alloc_tables()
976 /* Get the address of the registers for IP22-Zilog instance CHIP. */
982 panic("IP22-Zilog: Illegal chip number %d in get_zs.", chip); in get_zs()
985 /* Not probe-able, hard code it. */ in get_zs()
986 base = (unsigned long) &sgioc->uart; in get_zs()
989 request_mem_region(base, 8, "IP22-Zilog"); in get_zs()
997 static void ip22zilog_put_char(struct uart_port *port, int ch) in ip22zilog_put_char() argument
999 struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); in ip22zilog_put_char()
1003 * udelay with ZSDELAY as that is a NOP on some platforms. -DaveM in ip22zilog_put_char()
1006 unsigned char val = readb(&channel->control); in ip22zilog_put_char()
1012 } while (--loops); in ip22zilog_put_char()
1014 writeb(ch, &channel->data); in ip22zilog_put_char()
1022 struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index]; in ip22zilog_console_write()
1025 spin_lock_irqsave(&up->port.lock, flags); in ip22zilog_console_write()
1026 uart_console_write(&up->port, s, count, ip22zilog_put_char); in ip22zilog_console_write()
1027 udelay(2); in ip22zilog_console_write()
1028 spin_unlock_irqrestore(&up->port.lock, flags); in ip22zilog_console_write()
1033 struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index]; in ip22zilog_console_setup()
1039 up->flags |= IP22ZILOG_FLAG_IS_CONS; in ip22zilog_console_setup()
1041 printk(KERN_INFO "Console: ttyS%d (IP22-Zilog)\n", con->index); in ip22zilog_console_setup()
1043 spin_lock_irqsave(&up->port.lock, flags); in ip22zilog_console_setup()
1045 up->curregs[R15] |= BRKIE; in ip22zilog_console_setup()
1049 spin_unlock_irqrestore(&up->port.lock, flags); in ip22zilog_console_setup()
1053 return uart_set_options(&up->port, con, baud, parity, bits, flow); in ip22zilog_console_setup()
1064 .index = -1,
1091 spin_lock_init(&ip22zilog_port_table[channel].port.lock); in ip22zilog_prepare()
1093 ip22zilog_irq_chain = &ip22zilog_port_table[NUM_CHANNELS - 1]; in ip22zilog_prepare()
1095 for (channel = NUM_CHANNELS - 1 ; channel > 0; channel--) in ip22zilog_prepare()
1096 up[channel].next = &up[channel - 1]; in ip22zilog_prepare()
1103 up[(chip * 2) + 0].port.membase = (char *) &rp->channelB; in ip22zilog_prepare()
1104 up[(chip * 2) + 1].port.membase = (char *) &rp->channelA; in ip22zilog_prepare()
1107 up[(chip * 2) + 0].port.mapbase = in ip22zilog_prepare()
1108 (unsigned long) ioremap((unsigned long) &rp->channelB, 8); in ip22zilog_prepare()
1109 up[(chip * 2) + 1].port.mapbase = in ip22zilog_prepare()
1110 (unsigned long) ioremap((unsigned long) &rp->channelA, 8); in ip22zilog_prepare()
1114 up[(chip * 2) + 0].port.iotype = UPIO_MEM; in ip22zilog_prepare()
1115 up[(chip * 2) + 0].port.irq = zilog_irq; in ip22zilog_prepare()
1116 up[(chip * 2) + 0].port.uartclk = ZS_CLOCK; in ip22zilog_prepare()
1117 up[(chip * 2) + 0].port.fifosize = 1; in ip22zilog_prepare()
1118 up[(chip * 2) + 0].port.ops = &ip22zilog_pops; in ip22zilog_prepare()
1119 up[(chip * 2) + 0].port.type = PORT_IP22ZILOG; in ip22zilog_prepare()
1120 up[(chip * 2) + 0].port.flags = 0; in ip22zilog_prepare()
1121 up[(chip * 2) + 0].port.line = (chip * 2) + 0; in ip22zilog_prepare()
1122 up[(chip * 2) + 0].flags = 0; in ip22zilog_prepare()
1125 up[(chip * 2) + 1].port.iotype = UPIO_MEM; in ip22zilog_prepare()
1126 up[(chip * 2) + 1].port.irq = zilog_irq; in ip22zilog_prepare()
1127 up[(chip * 2) + 1].port.uartclk = ZS_CLOCK; in ip22zilog_prepare()
1128 up[(chip * 2) + 1].port.fifosize = 1; in ip22zilog_prepare()
1129 up[(chip * 2) + 1].port.ops = &ip22zilog_pops; in ip22zilog_prepare()
1130 up[(chip * 2) + 1].port.type = PORT_IP22ZILOG; in ip22zilog_prepare()
1131 up[(chip * 2) + 1].port.line = (chip * 2) + 1; in ip22zilog_prepare()
1132 up[(chip * 2) + 1].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A; in ip22zilog_prepare()
1140 up->parity_mask = 0xff; in ip22zilog_prepare()
1141 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in ip22zilog_prepare()
1142 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in ip22zilog_prepare()
1143 up->curregs[R3] = RxENAB | Rx8; in ip22zilog_prepare()
1144 up->curregs[R5] = TxENAB | Tx8; in ip22zilog_prepare()
1145 up->curregs[R9] = NV | MIE; in ip22zilog_prepare()
1146 up->curregs[R10] = NRZ; in ip22zilog_prepare()
1147 up->curregs[R11] = TCBR | RCBR; in ip22zilog_prepare()
1149 up->curregs[R12] = (brg & 0xff); in ip22zilog_prepare()
1150 up->curregs[R13] = (brg >> 8) & 0xff; in ip22zilog_prepare()
1151 up->curregs[R14] = BRENAB; in ip22zilog_prepare()
1164 "IP22-Zilog", ip22zilog_irq_chain)) { in ip22zilog_ports_init()
1165 panic("IP22-Zilog: Unable to register zs interrupt handler.\n"); in ip22zilog_ports_init()
1175 uart_add_one_port(&ip22zilog_reg, &up->port); in ip22zilog_ports_init()
1199 uart_remove_one_port(&ip22zilog_reg, &up->port); in ip22zilog_exit()
1205 if (up[(i * 2) + 0].port.mapbase) { in ip22zilog_exit()
1206 iounmap((void*)up[(i * 2) + 0].port.mapbase); in ip22zilog_exit()
1207 up[(i * 2) + 0].port.mapbase = 0; in ip22zilog_exit()
1209 if (up[(i * 2) + 1].port.mapbase) { in ip22zilog_exit()
1210 iounmap((void*)up[(i * 2) + 1].port.mapbase); in ip22zilog_exit()
1211 up[(i * 2) + 1].port.mapbase = 0; in ip22zilog_exit()
1222 MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
1223 MODULE_DESCRIPTION("SGI Zilog serial port driver");