Lines Matching +full:port +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0+
40 #define LPC32XX_HSU_BREAK_DATA (1 << 10)
41 #define LPC32XX_HSU_ERROR_DATA (1 << 9)
42 #define LPC32XX_HSU_RX_EMPTY (1 << 8)
47 #define LPC32XX_HSU_TX_INT_SET (1 << 6)
48 #define LPC32XX_HSU_RX_OE_INT (1 << 5)
49 #define LPC32XX_HSU_BRK_INT (1 << 4)
50 #define LPC32XX_HSU_FE_INT (1 << 3)
51 #define LPC32XX_HSU_RX_TIMEOUT_INT (1 << 2)
52 #define LPC32XX_HSU_RX_TRIG_INT (1 << 1)
53 #define LPC32XX_HSU_TX_INT (1 << 0)
55 #define LPC32XX_HSU_HRTS_INV (1 << 21)
60 #define LPC32XX_HSU_HRTS_EN (1 << 18)
65 #define LPC32XX_HSU_HCTS_INV (1 << 15)
66 #define LPC32XX_HSU_HCTS_EN (1 << 14)
68 #define LPC32XX_HSU_BREAK (1 << 8)
69 #define LPC32XX_HSU_ERR_INT_EN (1 << 7)
70 #define LPC32XX_HSU_RX_INT_EN (1 << 6)
71 #define LPC32XX_HSU_TX_INT_EN (1 << 5)
87 struct uart_port port; member
96 static void wait_for_xmit_empty(struct uart_port *port) in wait_for_xmit_empty() argument
102 port->membase))) == 0) in wait_for_xmit_empty()
104 if (--timeout == 0) in wait_for_xmit_empty()
106 udelay(1); in wait_for_xmit_empty()
107 } while (1); in wait_for_xmit_empty()
110 static void wait_for_xmit_ready(struct uart_port *port) in wait_for_xmit_ready() argument
114 while (1) { in wait_for_xmit_ready()
116 port->membase))) < 32) in wait_for_xmit_ready()
118 if (--timeout == 0) in wait_for_xmit_ready()
120 udelay(1); in wait_for_xmit_ready()
124 static void lpc32xx_hsuart_console_putchar(struct uart_port *port, int ch) in lpc32xx_hsuart_console_putchar() argument
126 wait_for_xmit_ready(port); in lpc32xx_hsuart_console_putchar()
127 writel((u32)ch, LPC32XX_HSUART_FIFO(port->membase)); in lpc32xx_hsuart_console_putchar()
133 struct lpc32xx_hsuart_port *up = &lpc32xx_hs_ports[co->index]; in lpc32xx_hsuart_console_write()
135 int locked = 1; in lpc32xx_hsuart_console_write()
139 if (up->port.sysrq) in lpc32xx_hsuart_console_write()
142 locked = spin_trylock(&up->port.lock); in lpc32xx_hsuart_console_write()
144 spin_lock(&up->port.lock); in lpc32xx_hsuart_console_write()
146 uart_console_write(&up->port, s, count, lpc32xx_hsuart_console_putchar); in lpc32xx_hsuart_console_write()
147 wait_for_xmit_empty(&up->port); in lpc32xx_hsuart_console_write()
150 spin_unlock(&up->port.lock); in lpc32xx_hsuart_console_write()
157 struct uart_port *port; in lpc32xx_hsuart_console_setup() local
163 if (co->index >= MAX_PORTS) in lpc32xx_hsuart_console_setup()
164 co->index = 0; in lpc32xx_hsuart_console_setup()
166 port = &lpc32xx_hs_ports[co->index].port; in lpc32xx_hsuart_console_setup()
167 if (!port->membase) in lpc32xx_hsuart_console_setup()
168 return -ENODEV; in lpc32xx_hsuart_console_setup()
173 return uart_set_options(port, co, baud, parity, bits, flow); in lpc32xx_hsuart_console_setup()
183 .index = -1,
216 goodrate = hsu_rate = (div / 14) - 1; in __serial_get_clock_div()
218 hsu_rate--; in __serial_get_clock_div()
225 comprate = uartclk / ((hsu_rate + 1) * 14); in __serial_get_clock_div()
226 if (abs(comprate - rate) < rate_diff) { in __serial_get_clock_div()
228 rate_diff = abs(comprate - rate); in __serial_get_clock_div()
239 static void __serial_uart_flush(struct uart_port *port) in __serial_uart_flush() argument
244 while ((readl(LPC32XX_HSUART_LEVEL(port->membase)) > 0) && in __serial_uart_flush()
246 tmp = readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_uart_flush()
249 static void __serial_lpc32xx_rx(struct uart_port *port) in __serial_lpc32xx_rx() argument
251 struct tty_port *tport = &port->state->port; in __serial_lpc32xx_rx()
255 tmp = readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_rx()
258 port->icount.rx++; in __serial_lpc32xx_rx()
263 LPC32XX_HSUART_IIR(port->membase)); in __serial_lpc32xx_rx()
264 port->icount.frame++; in __serial_lpc32xx_rx()
271 tmp = readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_rx()
274 spin_unlock(&port->lock); in __serial_lpc32xx_rx()
276 spin_lock(&port->lock); in __serial_lpc32xx_rx()
279 static void __serial_lpc32xx_tx(struct uart_port *port) in __serial_lpc32xx_tx() argument
281 struct circ_buf *xmit = &port->state->xmit; in __serial_lpc32xx_tx()
284 if (port->x_char) { in __serial_lpc32xx_tx()
285 writel((u32)port->x_char, LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_tx()
286 port->icount.tx++; in __serial_lpc32xx_tx()
287 port->x_char = 0; in __serial_lpc32xx_tx()
291 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) in __serial_lpc32xx_tx()
296 LPC32XX_HSUART_LEVEL(port->membase))) < 64) { in __serial_lpc32xx_tx()
297 writel((u32) xmit->buf[xmit->tail], in __serial_lpc32xx_tx()
298 LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_tx()
299 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); in __serial_lpc32xx_tx()
300 port->icount.tx++; in __serial_lpc32xx_tx()
306 uart_write_wakeup(port); in __serial_lpc32xx_tx()
310 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in __serial_lpc32xx_tx()
312 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in __serial_lpc32xx_tx()
318 struct uart_port *port = dev_id; in serial_lpc32xx_interrupt() local
319 struct tty_port *tport = &port->state->port; in serial_lpc32xx_interrupt()
322 spin_lock(&port->lock); in serial_lpc32xx_interrupt()
325 status = readl(LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
329 writel(LPC32XX_HSU_BRK_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
330 port->icount.brk++; in serial_lpc32xx_interrupt()
331 uart_handle_break(port); in serial_lpc32xx_interrupt()
336 writel(LPC32XX_HSU_FE_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
341 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
342 port->icount.overrun++; in serial_lpc32xx_interrupt()
349 __serial_lpc32xx_rx(port); in serial_lpc32xx_interrupt()
352 if ((status & LPC32XX_HSU_TX_INT) && (!uart_tx_stopped(port))) { in serial_lpc32xx_interrupt()
353 writel(LPC32XX_HSU_TX_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
354 __serial_lpc32xx_tx(port); in serial_lpc32xx_interrupt()
357 spin_unlock(&port->lock); in serial_lpc32xx_interrupt()
362 /* port->lock is not held. */
363 static unsigned int serial_lpc32xx_tx_empty(struct uart_port *port) in serial_lpc32xx_tx_empty() argument
367 if (LPC32XX_HSU_TX_LEV(readl(LPC32XX_HSUART_LEVEL(port->membase))) == 0) in serial_lpc32xx_tx_empty()
373 /* port->lock held by caller. */
374 static void serial_lpc32xx_set_mctrl(struct uart_port *port, in serial_lpc32xx_set_mctrl() argument
380 /* port->lock is held by caller and interrupts are disabled. */
381 static unsigned int serial_lpc32xx_get_mctrl(struct uart_port *port) in serial_lpc32xx_get_mctrl() argument
387 /* port->lock held by caller. */
388 static void serial_lpc32xx_stop_tx(struct uart_port *port) in serial_lpc32xx_stop_tx() argument
392 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_tx()
394 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_tx()
397 /* port->lock held by caller. */
398 static void serial_lpc32xx_start_tx(struct uart_port *port) in serial_lpc32xx_start_tx() argument
402 __serial_lpc32xx_tx(port); in serial_lpc32xx_start_tx()
403 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_start_tx()
405 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_start_tx()
408 /* port->lock held by caller. */
409 static void serial_lpc32xx_stop_rx(struct uart_port *port) in serial_lpc32xx_stop_rx() argument
413 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_rx()
415 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_rx()
418 LPC32XX_HSU_FE_INT), LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_stop_rx()
421 /* port->lock is not held. */
422 static void serial_lpc32xx_break_ctl(struct uart_port *port, in serial_lpc32xx_break_ctl() argument
428 spin_lock_irqsave(&port->lock, flags); in serial_lpc32xx_break_ctl()
429 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_break_ctl()
434 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_break_ctl()
435 spin_unlock_irqrestore(&port->lock, flags); in serial_lpc32xx_break_ctl()
438 /* LPC3250 Errata HSUART.1: Hang workaround via loopback mode on inactivity */
449 bit = 1; in lpc32xx_loopback_set()
455 WARN(1, "lpc32xx_hs: Warning: Unknown port at %08x\n", mapbase); in lpc32xx_loopback_set()
461 tmp |= (1 << bit); in lpc32xx_loopback_set()
463 tmp &= ~(1 << bit); in lpc32xx_loopback_set()
467 /* port->lock is not held. */
468 static int serial_lpc32xx_startup(struct uart_port *port) in serial_lpc32xx_startup() argument
474 spin_lock_irqsave(&port->lock, flags); in serial_lpc32xx_startup()
476 __serial_uart_flush(port); in serial_lpc32xx_startup()
480 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_startup()
482 writel(0xFF, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_startup()
490 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_startup()
492 lpc32xx_loopback_set(port->mapbase, 0); /* get out of loopback mode */ in serial_lpc32xx_startup()
494 spin_unlock_irqrestore(&port->lock, flags); in serial_lpc32xx_startup()
496 retval = request_irq(port->irq, serial_lpc32xx_interrupt, in serial_lpc32xx_startup()
497 0, MODNAME, port); in serial_lpc32xx_startup()
500 LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_startup()
505 /* port->lock is not held. */
506 static void serial_lpc32xx_shutdown(struct uart_port *port) in serial_lpc32xx_shutdown() argument
511 spin_lock_irqsave(&port->lock, flags); in serial_lpc32xx_shutdown()
515 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_shutdown()
517 lpc32xx_loopback_set(port->mapbase, 1); /* go to loopback mode */ in serial_lpc32xx_shutdown()
519 spin_unlock_irqrestore(&port->lock, flags); in serial_lpc32xx_shutdown()
521 free_irq(port->irq, port); in serial_lpc32xx_shutdown()
524 /* port->lock is not held. */
525 static void serial_lpc32xx_set_termios(struct uart_port *port, in serial_lpc32xx_set_termios() argument
533 /* Always 8-bit, no parity, 1 stop bit */ in serial_lpc32xx_set_termios()
534 termios->c_cflag &= ~(CSIZE | CSTOPB | PARENB | PARODD); in serial_lpc32xx_set_termios()
535 termios->c_cflag |= CS8; in serial_lpc32xx_set_termios()
537 termios->c_cflag &= ~(HUPCL | CMSPAR | CLOCAL | CRTSCTS); in serial_lpc32xx_set_termios()
539 baud = uart_get_baud_rate(port, termios, old, 0, in serial_lpc32xx_set_termios()
540 port->uartclk / 14); in serial_lpc32xx_set_termios()
542 quot = __serial_get_clock_div(port->uartclk, baud); in serial_lpc32xx_set_termios()
544 spin_lock_irqsave(&port->lock, flags); in serial_lpc32xx_set_termios()
547 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_set_termios()
548 if ((termios->c_cflag & CREAD) == 0) in serial_lpc32xx_set_termios()
552 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_set_termios()
554 writel(quot, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_set_termios()
556 uart_update_timeout(port, termios->c_cflag, baud); in serial_lpc32xx_set_termios()
558 spin_unlock_irqrestore(&port->lock, flags); in serial_lpc32xx_set_termios()
565 static const char *serial_lpc32xx_type(struct uart_port *port) in serial_lpc32xx_type() argument
570 static void serial_lpc32xx_release_port(struct uart_port *port) in serial_lpc32xx_release_port() argument
572 if ((port->iotype == UPIO_MEM32) && (port->mapbase)) { in serial_lpc32xx_release_port()
573 if (port->flags & UPF_IOREMAP) { in serial_lpc32xx_release_port()
574 iounmap(port->membase); in serial_lpc32xx_release_port()
575 port->membase = NULL; in serial_lpc32xx_release_port()
578 release_mem_region(port->mapbase, SZ_4K); in serial_lpc32xx_release_port()
582 static int serial_lpc32xx_request_port(struct uart_port *port) in serial_lpc32xx_request_port() argument
584 int ret = -ENODEV; in serial_lpc32xx_request_port()
586 if ((port->iotype == UPIO_MEM32) && (port->mapbase)) { in serial_lpc32xx_request_port()
589 if (!request_mem_region(port->mapbase, SZ_4K, MODNAME)) in serial_lpc32xx_request_port()
590 ret = -EBUSY; in serial_lpc32xx_request_port()
591 else if (port->flags & UPF_IOREMAP) { in serial_lpc32xx_request_port()
592 port->membase = ioremap(port->mapbase, SZ_4K); in serial_lpc32xx_request_port()
593 if (!port->membase) { in serial_lpc32xx_request_port()
594 release_mem_region(port->mapbase, SZ_4K); in serial_lpc32xx_request_port()
595 ret = -ENOMEM; in serial_lpc32xx_request_port()
603 static void serial_lpc32xx_config_port(struct uart_port *port, int uflags) in serial_lpc32xx_config_port() argument
607 ret = serial_lpc32xx_request_port(port); in serial_lpc32xx_config_port()
610 port->type = PORT_UART00; in serial_lpc32xx_config_port()
611 port->fifosize = 64; in serial_lpc32xx_config_port()
613 __serial_uart_flush(port); in serial_lpc32xx_config_port()
617 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_config_port()
619 writel(0xFF, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_config_port()
625 LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_config_port()
628 static int serial_lpc32xx_verify_port(struct uart_port *port, in serial_lpc32xx_verify_port() argument
633 if (ser->type != PORT_UART00) in serial_lpc32xx_verify_port()
634 ret = -EINVAL; in serial_lpc32xx_verify_port()
667 dev_err(&pdev->dev, in serial_hs_lpc32xx_probe()
669 uarts_registered + 1); in serial_hs_lpc32xx_probe()
670 return -ENXIO; in serial_hs_lpc32xx_probe()
677 dev_err(&pdev->dev, in serial_hs_lpc32xx_probe()
678 "Error getting mem resource for HS UART port %d\n", in serial_hs_lpc32xx_probe()
680 return -ENXIO; in serial_hs_lpc32xx_probe()
682 p->port.mapbase = res->start; in serial_hs_lpc32xx_probe()
683 p->port.membase = NULL; in serial_hs_lpc32xx_probe()
687 dev_err(&pdev->dev, "Error getting irq for HS UART port %d\n", in serial_hs_lpc32xx_probe()
691 p->port.irq = ret; in serial_hs_lpc32xx_probe()
693 p->port.iotype = UPIO_MEM32; in serial_hs_lpc32xx_probe()
694 p->port.uartclk = LPC32XX_MAIN_OSC_FREQ; in serial_hs_lpc32xx_probe()
695 p->port.regshift = 2; in serial_hs_lpc32xx_probe()
696 p->port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_IOREMAP; in serial_hs_lpc32xx_probe()
697 p->port.dev = &pdev->dev; in serial_hs_lpc32xx_probe()
698 p->port.ops = &serial_lpc32xx_pops; in serial_hs_lpc32xx_probe()
699 p->port.line = uarts_registered++; in serial_hs_lpc32xx_probe()
700 spin_lock_init(&p->port.lock); in serial_hs_lpc32xx_probe()
702 /* send port to loopback mode by default */ in serial_hs_lpc32xx_probe()
703 lpc32xx_loopback_set(p->port.mapbase, 1); in serial_hs_lpc32xx_probe()
705 ret = uart_add_one_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_probe()
719 uart_remove_one_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_remove()
731 uart_suspend_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_suspend()
740 uart_resume_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_resume()
750 { .compatible = "nxp,lpc3220-hsuart" },