Lines Matching +full:te +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
5 * Copyright (C) 2002 - 2011 Paul Mundt
9 * based off of the old drivers/char/sh-sci.c by:
30 #include <linux/dma-mapping.h>
60 #include "sh-sci.h"
62 /* Offsets into the sci_port->irqs array */
76 ((port)->irqs[SCIx_ERI_IRQ] == \
77 (port)->irqs[SCIx_RXI_IRQ]) || \
78 ((port)->irqs[SCIx_ERI_IRQ] && \
79 ((port)->irqs[SCIx_RXI_IRQ] < 0))
90 #define SCI_SR(x) BIT((x) - 1)
91 #define SCI_SR_RANGE(x, y) GENMASK((y) - 1, (x) - 1)
97 #define min_sr(_port) ffs((_port)->sampling_rate_mask)
98 #define max_sr(_port) fls((_port)->sampling_rate_mask)
102 for ((_sr) = max_sr(_port); (_sr) >= min_sr(_port); (_sr)--) \
103 if ((_port)->sampling_rate_mask & SCI_SR((_sr)))
127 struct mctrl_gpios *gpios; member
270 * Common SH-2(A) SCIF definitions for ports with FIFO data
322 * Common SH-3 SCIF definitions.
344 * Common SH-4(A) SCIF(B) definitions.
424 * Common SH-4(A) SCIF(B) definitions for ports without an SCSPTR
448 * Common SH-4(A) SCIF(B) definitions for ports with FIFO data
475 * SH7705-style SCIF(B) ports, lacking both SCSPTR and SCLSR
498 #define sci_getreg(up, offset) (&to_sci_port(up)->params->regs[offset])
510 if (reg->size == 8) in sci_serial_in()
511 return ioread8(p->membase + (reg->offset << p->regshift)); in sci_serial_in()
512 else if (reg->size == 16) in sci_serial_in()
513 return ioread16(p->membase + (reg->offset << p->regshift)); in sci_serial_in()
524 if (reg->size == 8) in sci_serial_out()
525 iowrite8(value, p->membase + (reg->offset << p->regshift)); in sci_serial_out()
526 else if (reg->size == 16) in sci_serial_out()
527 iowrite16(value, p->membase + (reg->offset << p->regshift)); in sci_serial_out()
536 if (!sci_port->port.dev) in sci_port_enable()
539 pm_runtime_get_sync(sci_port->port.dev); in sci_port_enable()
542 clk_prepare_enable(sci_port->clks[i]); in sci_port_enable()
543 sci_port->clk_rates[i] = clk_get_rate(sci_port->clks[i]); in sci_port_enable()
545 sci_port->port.uartclk = sci_port->clk_rates[SCI_FCK]; in sci_port_enable()
552 if (!sci_port->port.dev) in sci_port_disable()
555 for (i = SCI_NUM_CLKS; i-- > 0; ) in sci_port_disable()
556 clk_disable_unprepare(sci_port->clks[i]); in sci_port_disable()
558 pm_runtime_put_sync(sci_port->port.dev); in sci_port_disable()
565 * special-casing the port type, we check the port initialization in port_rx_irq_mask()
570 return SCSCR_RIE | (to_sci_port(port)->cfg->scscr & SCSCR_REIE); in port_rx_irq_mask()
579 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_start_tx()
581 if (s->chan_tx) in sci_start_tx()
589 if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) && in sci_start_tx()
590 dma_submit_error(s->cookie_tx)) { in sci_start_tx()
591 s->cookie_tx = 0; in sci_start_tx()
592 schedule_work(&s->work_tx); in sci_start_tx()
596 if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_start_tx()
610 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_stop_tx()
624 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_start_rx()
636 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_stop_rx()
646 if (port->type == PORT_SCI) { in sci_clear_SCxSR()
649 } else if (to_sci_port(port)->params->overrun_mask == SCIFA_ORER) { in sci_clear_SCxSR()
710 * Use port-specific handler if provided. in sci_init_pins()
712 if (s->cfg->ops && s->cfg->ops->init_pins) { in sci_init_pins()
713 s->cfg->ops->init_pins(port, cflag); in sci_init_pins()
717 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_init_pins()
723 if (to_sci_port(port)->has_rtscts) { in sci_init_pins()
725 if (!(port->mctrl & TIOCM_RTS)) { in sci_init_pins()
728 } else if (!s->autorts) { in sci_init_pins()
740 } else if (sci_getreg(port, SCSPTR)->size) { in sci_init_pins()
745 if (!(port->mctrl & TIOCM_RTS)) in sci_init_pins()
747 else if (!s->autorts) in sci_init_pins()
758 unsigned int fifo_mask = (s->params->fifosize << 1) - 1; in sci_txfill()
762 if (reg->size) in sci_txfill()
766 if (reg->size) in sci_txfill()
774 return port->fifosize - sci_txfill(port); in sci_txroom()
780 unsigned int fifo_mask = (s->params->fifosize << 1) - 1; in sci_rxfill()
784 if (reg->size) in sci_rxfill()
788 if (reg->size) in sci_rxfill()
800 struct circ_buf *xmit = &port->state->xmit; in sci_transmit_chars()
822 if (port->x_char) { in sci_transmit_chars()
823 c = port->x_char; in sci_transmit_chars()
824 port->x_char = 0; in sci_transmit_chars()
826 c = xmit->buf[xmit->tail]; in sci_transmit_chars()
827 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); in sci_transmit_chars()
834 port->icount.tx++; in sci_transmit_chars()
835 } while (--count > 0); in sci_transmit_chars()
846 /* On SH3, SCIF may read end-of-break as a space->mark char */
847 #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
851 struct tty_port *tport = &port->state->port; in sci_receive_chars()
868 if (port->type == PORT_SCI) { in sci_receive_chars()
878 if (port->type == PORT_SCIF || in sci_receive_chars()
879 port->type == PORT_HSCIF) { in sci_receive_chars()
887 count--; i--; in sci_receive_chars()
894 port->icount.frame++; in sci_receive_chars()
895 dev_notice(port->dev, "frame error\n"); in sci_receive_chars()
898 port->icount.parity++; in sci_receive_chars()
899 dev_notice(port->dev, "parity error\n"); in sci_receive_chars()
911 port->icount.rx += count; in sci_receive_chars()
929 struct tty_port *tport = &port->state->port; in sci_handle_errors()
933 if (status & s->params->overrun_mask) { in sci_handle_errors()
934 port->icount.overrun++; in sci_handle_errors()
940 dev_notice(port->dev, "overrun error\n"); in sci_handle_errors()
945 port->icount.frame++; in sci_handle_errors()
950 dev_notice(port->dev, "frame error\n"); in sci_handle_errors()
955 port->icount.parity++; in sci_handle_errors()
960 dev_notice(port->dev, "parity error\n"); in sci_handle_errors()
971 struct tty_port *tport = &port->state->port; in sci_handle_fifo_overrun()
977 reg = sci_getreg(port, s->params->overrun_reg); in sci_handle_fifo_overrun()
978 if (!reg->size) in sci_handle_fifo_overrun()
981 status = serial_port_in(port, s->params->overrun_reg); in sci_handle_fifo_overrun()
982 if (status & s->params->overrun_mask) { in sci_handle_fifo_overrun()
983 status &= ~s->params->overrun_mask; in sci_handle_fifo_overrun()
984 serial_port_out(port, s->params->overrun_reg, status); in sci_handle_fifo_overrun()
986 port->icount.overrun++; in sci_handle_fifo_overrun()
991 dev_dbg(port->dev, "overrun error\n"); in sci_handle_fifo_overrun()
1002 struct tty_port *tport = &port->state->port; in sci_handle_breaks()
1008 port->icount.brk++; in sci_handle_breaks()
1014 dev_dbg(port->dev, "BREAK detected\n"); in sci_handle_breaks()
1031 if (rx_trig >= port->fifosize) in scif_set_rtrg()
1032 rx_trig = port->fifosize; in scif_set_rtrg()
1035 if (sci_getreg(port, HSRTRGR)->size) { in scif_set_rtrg()
1040 switch (port->type) { in scif_set_rtrg()
1086 if (sci_getreg(port, HSRTRGR)->size) in scif_rtrg_enabled()
1096 struct uart_port *port = &s->port; in rx_fifo_timer_fn()
1098 dev_dbg(port->dev, "Rx timed out\n"); in rx_fifo_timer_fn()
1109 return sprintf(buf, "%d\n", sci->rx_trigger); in rx_trigger_show()
1126 sci->rx_trigger = scif_set_rtrg(port, r); in rx_trigger_store()
1127 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in rx_trigger_store()
1143 if (port->type == PORT_HSCIF) in rx_fifo_timeout_show()
1144 v = sci->hscif_tot >> HSSCR_TOT_SHIFT; in rx_fifo_timeout_show()
1146 v = sci->rx_fifo_timeout; in rx_fifo_timeout_show()
1165 if (port->type == PORT_HSCIF) { in rx_fifo_timeout_store()
1167 return -EINVAL; in rx_fifo_timeout_store()
1168 sci->hscif_tot = r << HSSCR_TOT_SHIFT; in rx_fifo_timeout_store()
1170 sci->rx_fifo_timeout = r; in rx_fifo_timeout_store()
1173 timer_setup(&sci->rx_fifo_timer, rx_fifo_timer_fn, 0); in rx_fifo_timeout_store()
1186 struct uart_port *port = &s->port; in sci_dma_tx_complete()
1187 struct circ_buf *xmit = &port->state->xmit; in sci_dma_tx_complete()
1190 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); in sci_dma_tx_complete()
1192 spin_lock_irqsave(&port->lock, flags); in sci_dma_tx_complete()
1194 xmit->tail += s->tx_dma_len; in sci_dma_tx_complete()
1195 xmit->tail &= UART_XMIT_SIZE - 1; in sci_dma_tx_complete()
1197 port->icount.tx += s->tx_dma_len; in sci_dma_tx_complete()
1203 s->cookie_tx = 0; in sci_dma_tx_complete()
1204 schedule_work(&s->work_tx); in sci_dma_tx_complete()
1206 s->cookie_tx = -EINVAL; in sci_dma_tx_complete()
1207 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_dma_tx_complete()
1213 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_tx_complete()
1219 struct uart_port *port = &s->port; in sci_dma_rx_push()
1220 struct tty_port *tport = &port->state->port; in sci_dma_rx_push()
1225 port->icount.buf_overrun++; in sci_dma_rx_push()
1227 port->icount.rx += copied; in sci_dma_rx_push()
1236 for (i = 0; i < ARRAY_SIZE(s->cookie_rx); i++) in sci_dma_rx_find_active()
1237 if (s->active_rx == s->cookie_rx[i]) in sci_dma_rx_find_active()
1240 return -1; in sci_dma_rx_find_active()
1245 struct dma_chan *chan = s->chan_rx_saved; in sci_rx_dma_release()
1247 s->chan_rx_saved = s->chan_rx = NULL; in sci_rx_dma_release()
1248 s->cookie_rx[0] = s->cookie_rx[1] = -EINVAL; in sci_rx_dma_release()
1250 dma_free_coherent(chan->device->dev, s->buf_len_rx * 2, s->rx_buf[0], in sci_rx_dma_release()
1251 sg_dma_address(&s->sg_rx[0])); in sci_rx_dma_release()
1267 struct dma_chan *chan = s->chan_rx; in sci_dma_rx_complete()
1268 struct uart_port *port = &s->port; in sci_dma_rx_complete()
1273 dev_dbg(port->dev, "%s(%d) active cookie %d\n", __func__, port->line, in sci_dma_rx_complete()
1274 s->active_rx); in sci_dma_rx_complete()
1276 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_complete()
1280 count = sci_dma_rx_push(s, s->rx_buf[active], s->buf_len_rx); in sci_dma_rx_complete()
1282 start_hrtimer_us(&s->rx_timer, s->rx_timeout); in sci_dma_rx_complete()
1285 tty_flip_buffer_push(&port->state->port); in sci_dma_rx_complete()
1287 desc = dmaengine_prep_slave_sg(s->chan_rx, &s->sg_rx[active], 1, in sci_dma_rx_complete()
1293 desc->callback = sci_dma_rx_complete; in sci_dma_rx_complete()
1294 desc->callback_param = s; in sci_dma_rx_complete()
1295 s->cookie_rx[active] = dmaengine_submit(desc); in sci_dma_rx_complete()
1296 if (dma_submit_error(s->cookie_rx[active])) in sci_dma_rx_complete()
1299 s->active_rx = s->cookie_rx[!active]; in sci_dma_rx_complete()
1303 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_complete()
1304 dev_dbg(port->dev, "%s: cookie %d #%d, new active cookie %d\n", in sci_dma_rx_complete()
1305 __func__, s->cookie_rx[active], active, s->active_rx); in sci_dma_rx_complete()
1309 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_complete()
1310 dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n"); in sci_dma_rx_complete()
1312 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_complete()
1313 s->chan_rx = NULL; in sci_dma_rx_complete()
1315 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_complete()
1320 struct dma_chan *chan = s->chan_tx_saved; in sci_tx_dma_release()
1322 cancel_work_sync(&s->work_tx); in sci_tx_dma_release()
1323 s->chan_tx_saved = s->chan_tx = NULL; in sci_tx_dma_release()
1324 s->cookie_tx = -EINVAL; in sci_tx_dma_release()
1326 dma_unmap_single(chan->device->dev, s->tx_dma_addr, UART_XMIT_SIZE, in sci_tx_dma_release()
1333 struct dma_chan *chan = s->chan_rx; in sci_submit_rx()
1334 struct uart_port *port = &s->port; in sci_submit_rx()
1339 struct scatterlist *sg = &s->sg_rx[i]; in sci_submit_rx()
1348 desc->callback = sci_dma_rx_complete; in sci_submit_rx()
1349 desc->callback_param = s; in sci_submit_rx()
1350 s->cookie_rx[i] = dmaengine_submit(desc); in sci_submit_rx()
1351 if (dma_submit_error(s->cookie_rx[i])) in sci_submit_rx()
1356 s->active_rx = s->cookie_rx[0]; in sci_submit_rx()
1364 spin_lock_irqsave(&port->lock, flags); in sci_submit_rx()
1368 s->cookie_rx[i] = -EINVAL; in sci_submit_rx()
1369 s->active_rx = 0; in sci_submit_rx()
1370 s->chan_rx = NULL; in sci_submit_rx()
1373 spin_unlock_irqrestore(&port->lock, flags); in sci_submit_rx()
1374 return -EAGAIN; in sci_submit_rx()
1381 struct dma_chan *chan = s->chan_tx; in work_fn_tx()
1382 struct uart_port *port = &s->port; in work_fn_tx()
1383 struct circ_buf *xmit = &port->state->xmit; in work_fn_tx()
1395 spin_lock_irq(&port->lock); in work_fn_tx()
1396 head = xmit->head; in work_fn_tx()
1397 tail = xmit->tail; in work_fn_tx()
1398 buf = s->tx_dma_addr + (tail & (UART_XMIT_SIZE - 1)); in work_fn_tx()
1399 s->tx_dma_len = min_t(unsigned int, in work_fn_tx()
1402 if (!s->tx_dma_len) { in work_fn_tx()
1404 spin_unlock_irq(&port->lock); in work_fn_tx()
1408 desc = dmaengine_prep_slave_single(chan, buf, s->tx_dma_len, in work_fn_tx()
1412 spin_unlock_irq(&port->lock); in work_fn_tx()
1413 dev_warn(port->dev, "Failed preparing Tx DMA descriptor\n"); in work_fn_tx()
1417 dma_sync_single_for_device(chan->device->dev, buf, s->tx_dma_len, in work_fn_tx()
1420 desc->callback = sci_dma_tx_complete; in work_fn_tx()
1421 desc->callback_param = s; in work_fn_tx()
1422 s->cookie_tx = dmaengine_submit(desc); in work_fn_tx()
1423 if (dma_submit_error(s->cookie_tx)) { in work_fn_tx()
1424 spin_unlock_irq(&port->lock); in work_fn_tx()
1425 dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n"); in work_fn_tx()
1429 spin_unlock_irq(&port->lock); in work_fn_tx()
1430 dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n", in work_fn_tx()
1431 __func__, xmit->buf, tail, head, s->cookie_tx); in work_fn_tx()
1437 spin_lock_irqsave(&port->lock, flags); in work_fn_tx()
1438 s->chan_tx = NULL; in work_fn_tx()
1440 spin_unlock_irqrestore(&port->lock, flags); in work_fn_tx()
1447 struct dma_chan *chan = s->chan_rx; in rx_timer_fn()
1448 struct uart_port *port = &s->port; in rx_timer_fn()
1456 dev_dbg(port->dev, "DMA Rx timed out\n"); in rx_timer_fn()
1458 spin_lock_irqsave(&port->lock, flags); in rx_timer_fn()
1462 spin_unlock_irqrestore(&port->lock, flags); in rx_timer_fn()
1466 status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); in rx_timer_fn()
1468 spin_unlock_irqrestore(&port->lock, flags); in rx_timer_fn()
1469 dev_dbg(port->dev, "Cookie %d #%d has already completed\n", in rx_timer_fn()
1470 s->active_rx, active); in rx_timer_fn()
1484 status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); in rx_timer_fn()
1486 spin_unlock_irqrestore(&port->lock, flags); in rx_timer_fn()
1487 dev_dbg(port->dev, "Transaction complete after DMA engine was stopped"); in rx_timer_fn()
1492 dmaengine_terminate_async(s->chan_rx); in rx_timer_fn()
1493 read = sg_dma_len(&s->sg_rx[active]) - state.residue; in rx_timer_fn()
1496 count = sci_dma_rx_push(s, s->rx_buf[active], read); in rx_timer_fn()
1498 tty_flip_buffer_push(&port->state->port); in rx_timer_fn()
1501 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in rx_timer_fn()
1506 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in rx_timer_fn()
1508 enable_irq(s->irqs[SCIx_RXI_IRQ]); in rx_timer_fn()
1512 spin_unlock_irqrestore(&port->lock, flags); in rx_timer_fn()
1524 chan = dma_request_slave_channel(port->dev, in sci_request_dma_chan()
1527 dev_warn(port->dev, "dma_request_slave_channel failed\n"); in sci_request_dma_chan()
1534 cfg.dst_addr = port->mapbase + in sci_request_dma_chan()
1535 (sci_getreg(port, SCxTDR)->offset << port->regshift); in sci_request_dma_chan()
1538 cfg.src_addr = port->mapbase + in sci_request_dma_chan()
1539 (sci_getreg(port, SCxRDR)->offset << port->regshift); in sci_request_dma_chan()
1545 dev_warn(port->dev, "dmaengine_slave_config failed %d\n", ret); in sci_request_dma_chan()
1558 dev_dbg(port->dev, "%s: port %d\n", __func__, port->line); in sci_request_dma()
1567 if (!port->dev->of_node) in sci_request_dma()
1570 s->cookie_tx = -EINVAL; in sci_request_dma()
1576 if (!of_find_property(port->dev->of_node, "dmas", NULL)) in sci_request_dma()
1580 dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan); in sci_request_dma()
1583 s->tx_dma_addr = dma_map_single(chan->device->dev, in sci_request_dma()
1584 port->state->xmit.buf, in sci_request_dma()
1587 if (dma_mapping_error(chan->device->dev, s->tx_dma_addr)) { in sci_request_dma()
1588 dev_warn(port->dev, "Failed mapping Tx DMA descriptor\n"); in sci_request_dma()
1591 dev_dbg(port->dev, "%s: mapped %lu@%p to %pad\n", in sci_request_dma()
1593 port->state->xmit.buf, &s->tx_dma_addr); in sci_request_dma()
1595 INIT_WORK(&s->work_tx, work_fn_tx); in sci_request_dma()
1596 s->chan_tx_saved = s->chan_tx = chan; in sci_request_dma()
1601 dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan); in sci_request_dma()
1607 s->buf_len_rx = 2 * max_t(size_t, 16, port->fifosize); in sci_request_dma()
1608 buf = dma_alloc_coherent(chan->device->dev, s->buf_len_rx * 2, in sci_request_dma()
1611 dev_warn(port->dev, in sci_request_dma()
1618 struct scatterlist *sg = &s->sg_rx[i]; in sci_request_dma()
1621 s->rx_buf[i] = buf; in sci_request_dma()
1623 sg_dma_len(sg) = s->buf_len_rx; in sci_request_dma()
1625 buf += s->buf_len_rx; in sci_request_dma()
1626 dma += s->buf_len_rx; in sci_request_dma()
1629 hrtimer_init(&s->rx_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); in sci_request_dma()
1630 s->rx_timer.function = rx_timer_fn; in sci_request_dma()
1632 s->chan_rx_saved = s->chan_rx = chan; in sci_request_dma()
1634 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_request_dma()
1643 if (s->chan_tx_saved) in sci_free_dma()
1645 if (s->chan_rx_saved) in sci_free_dma()
1658 s->tx_dma_len = 0; in sci_flush_buffer()
1659 if (s->chan_tx) { in sci_flush_buffer()
1660 dmaengine_terminate_async(s->chan_tx); in sci_flush_buffer()
1661 s->cookie_tx = -EINVAL; in sci_flush_buffer()
1682 if (s->chan_rx) { in sci_rx_interrupt()
1687 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_rx_interrupt()
1700 dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u us\n", in sci_rx_interrupt()
1701 jiffies, s->rx_timeout); in sci_rx_interrupt()
1702 start_hrtimer_us(&s->rx_timer, s->rx_timeout); in sci_rx_interrupt()
1710 if (s->rx_trigger > 1 && s->rx_fifo_timeout > 0) { in sci_rx_interrupt()
1712 scif_set_rtrg(port, s->rx_trigger); in sci_rx_interrupt()
1714 mod_timer(&s->rx_fifo_timer, jiffies + DIV_ROUND_UP( in sci_rx_interrupt()
1715 s->rx_frame * HZ * s->rx_fifo_timeout, 1000000)); in sci_rx_interrupt()
1732 spin_lock_irqsave(&port->lock, flags); in sci_tx_interrupt()
1734 spin_unlock_irqrestore(&port->lock, flags); in sci_tx_interrupt()
1755 if (s->irqs[SCIx_ERI_IRQ] == s->irqs[SCIx_BRI_IRQ]) { in sci_er_interrupt()
1769 if (port->type == PORT_SCI) { in sci_er_interrupt()
1777 if (!s->chan_rx) in sci_er_interrupt()
1784 if (!s->chan_tx) in sci_er_interrupt()
1799 if (s->params->overrun_reg == SCxSR) in sci_mpxed_interrupt()
1801 else if (sci_getreg(port, s->params->overrun_reg)->size) in sci_mpxed_interrupt()
1802 orer_status = serial_port_in(port, s->params->overrun_reg); in sci_mpxed_interrupt()
1808 !s->chan_tx) in sci_mpxed_interrupt()
1815 if (((ssr_status & SCxSR_RDxF(port)) || s->chan_rx) && in sci_mpxed_interrupt()
1828 if (orer_status & s->params->overrun_mask) { in sci_mpxed_interrupt()
1884 struct uart_port *up = &port->port; in sci_request_irq()
1893 if (port->irqs[w] == port->irqs[i]) in sci_request_irq()
1900 irq = up->irq; in sci_request_irq()
1902 irq = port->irqs[i]; in sci_request_irq()
1913 port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s", in sci_request_irq()
1914 dev_name(up->dev), desc->desc); in sci_request_irq()
1915 if (!port->irqstr[j]) { in sci_request_irq()
1916 ret = -ENOMEM; in sci_request_irq()
1920 ret = request_irq(irq, desc->handler, up->irqflags, in sci_request_irq()
1921 port->irqstr[j], port); in sci_request_irq()
1923 dev_err(up->dev, "Can't allocate %s IRQ\n", desc->desc); in sci_request_irq()
1931 while (--i >= 0) in sci_request_irq()
1932 free_irq(port->irqs[i], port); in sci_request_irq()
1935 while (--j >= 0) in sci_request_irq()
1936 kfree(port->irqstr[j]); in sci_request_irq()
1950 int irq = port->irqs[i]; in sci_free_irq()
1961 if (port->irqs[j] == irq) in sci_free_irq()
1966 free_irq(port->irqs[i], port); in sci_free_irq()
1967 kfree(port->irqstr[i]); in sci_free_irq()
1986 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_set_rts()
1999 } else if (sci_getreg(port, SCSPTR)->size) { in sci_set_rts()
2013 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_get_cts()
2016 } else if (sci_getreg(port, SCSPTR)->size) { in sci_get_cts()
2028 * handled via the ->init_pins() op, which is a bit of a one-way street,
2029 * lacking any ability to defer pin control -- this will later be
2047 if (reg->size) in sci_set_mctrl()
2053 mctrl_gpio_set(s->gpios, mctrl); in sci_set_mctrl()
2055 if (!s->has_rtscts) in sci_set_mctrl()
2065 } else if (s->autorts) { in sci_set_mctrl()
2066 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_set_mctrl()
2084 struct mctrl_gpios *gpios = s->gpios; in sci_get_mctrl() local
2087 mctrl_gpio_get(gpios, &mctrl); in sci_get_mctrl()
2093 if (s->autorts) { in sci_get_mctrl()
2096 } else if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_CTS))) { in sci_get_mctrl()
2099 if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_DSR))) in sci_get_mctrl()
2101 if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_DCD))) in sci_get_mctrl()
2109 mctrl_gpio_enable_ms(to_sci_port(port)->gpios); in sci_enable_ms()
2118 if (!sci_getreg(port, SCSPTR)->size) { in sci_break_ctl()
2126 spin_lock_irqsave(&port->lock, flags); in sci_break_ctl()
2130 if (break_state == -1) { in sci_break_ctl()
2140 spin_unlock_irqrestore(&port->lock, flags); in sci_break_ctl()
2148 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); in sci_startup()
2167 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); in sci_shutdown()
2169 s->autorts = false; in sci_shutdown()
2170 mctrl_gpio_disable_ms(to_sci_port(port)->gpios); in sci_shutdown()
2172 spin_lock_irqsave(&port->lock, flags); in sci_shutdown()
2181 (SCSCR_CKE1 | SCSCR_CKE0 | s->hscif_tot)); in sci_shutdown()
2182 spin_unlock_irqrestore(&port->lock, flags); in sci_shutdown()
2185 if (s->chan_rx_saved) { in sci_shutdown()
2186 dev_dbg(port->dev, "%s(%d) deleting rx_timer\n", __func__, in sci_shutdown()
2187 port->line); in sci_shutdown()
2188 hrtimer_cancel(&s->rx_timer); in sci_shutdown()
2192 if (s->rx_trigger > 1 && s->rx_fifo_timeout > 0) in sci_shutdown()
2193 del_timer_sync(&s->rx_fifo_timer); in sci_shutdown()
2201 unsigned long freq = s->clk_rates[SCI_SCK]; in sci_sck_calc()
2205 if (s->port.type != PORT_HSCIF) in sci_sck_calc()
2209 err = DIV_ROUND_CLOSEST(freq, sr) - bps; in sci_sck_calc()
2214 *srr = sr - 1; in sci_sck_calc()
2220 dev_dbg(s->port.dev, "SCK: %u%+d bps using SR %u\n", bps, min_err, in sci_sck_calc()
2232 if (s->port.type != PORT_HSCIF) in sci_brg_calc()
2239 err = DIV_ROUND_CLOSEST(freq, sr * dl) - bps; in sci_brg_calc()
2245 *srr = sr - 1; in sci_brg_calc()
2251 dev_dbg(s->port.dev, "BRG: %u%+d bps using DL %u SR %u\n", bps, in sci_brg_calc()
2261 unsigned long freq = s->clk_rates[SCI_FCK]; in sci_scbrr_calc()
2265 if (s->port.type != PORT_HSCIF) in sci_scbrr_calc()
2279 * M = |(0.5 - 1 / 2 * N) - ((L - 0.5) * F) - in sci_scbrr_calc()
2280 * (|D - 0.5| / N * (1 + F))| in sci_scbrr_calc()
2292 * err = freq / (br * prediv) - bps in sci_scbrr_calc()
2304 err = DIV_ROUND_CLOSEST(freq, br * prediv) - bps; in sci_scbrr_calc()
2309 *brr = br - 1; in sci_scbrr_calc()
2310 *srr = sr - 1; in sci_scbrr_calc()
2319 dev_dbg(s->port.dev, "BRR: %u%+d bps using N %u SR %u cks %u\n", bps, in sci_scbrr_calc()
2330 serial_port_out(port, SCSCR, s->hscif_tot); /* TE=0, RE=0, CKE1=0 */ in sci_reset()
2333 if (reg->size) in sci_reset()
2339 if (sci_getreg(port, SCLSR)->size) { in sci_reset()
2345 if (s->rx_trigger > 1) { in sci_reset()
2346 if (s->rx_fifo_timeout) { in sci_reset()
2348 timer_setup(&s->rx_fifo_timer, rx_fifo_timer_fn, 0); in sci_reset()
2350 if (port->type == PORT_SCIFA || in sci_reset()
2351 port->type == PORT_SCIFB) in sci_reset()
2354 scif_set_rtrg(port, s->rx_trigger); in sci_reset()
2369 int best_clk = -1; in sci_set_termios()
2372 if ((termios->c_cflag & CSIZE) == CS7) in sci_set_termios()
2374 if (termios->c_cflag & PARENB) in sci_set_termios()
2376 if (termios->c_cflag & PARODD) in sci_set_termios()
2378 if (termios->c_cflag & CSTOPB) in sci_set_termios()
2382 * earlyprintk comes here early on with port->uartclk set to zero. in sci_set_termios()
2385 * the baud rate is not programmed during earlyprintk - it is assumed in sci_set_termios()
2389 if (!port->uartclk) { in sci_set_termios()
2395 max_freq = max(max_freq, s->clk_rates[i]); in sci_set_termios()
2407 if (s->clk_rates[SCI_SCK] && port->type != PORT_SCIFA && in sci_set_termios()
2408 port->type != PORT_SCIFB) { in sci_set_termios()
2422 if (s->clk_rates[SCI_SCIF_CLK] && sci_getreg(port, SCDL)->size) { in sci_set_termios()
2423 err = sci_brg_calc(s, baud, s->clk_rates[SCI_SCIF_CLK], &dl1, in sci_set_termios()
2438 if (s->clk_rates[SCI_BRG_INT] && sci_getreg(port, SCDL)->size) { in sci_set_termios()
2439 err = sci_brg_calc(s, baud, s->clk_rates[SCI_BRG_INT], &dl1, in sci_set_termios()
2466 dev_dbg(port->dev, "Using clk %pC for %u%+d bps\n", in sci_set_termios()
2467 s->clks[best_clk], baud, min_err); in sci_set_termios()
2475 if (best_clk >= 0 && sci_getreg(port, SCCKS)->size) { in sci_set_termios()
2480 spin_lock_irqsave(&port->lock, flags); in sci_set_termios()
2484 uart_update_timeout(port, termios->c_cflag, baud); in sci_set_termios()
2487 switch (termios->c_cflag & CSIZE) { in sci_set_termios()
2502 if (termios->c_cflag & CSTOPB) in sci_set_termios()
2504 if (termios->c_cflag & PARENB) in sci_set_termios()
2508 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_set_termios()
2520 serial_port_out(port, SCSCR, scr_val | s->hscif_tot); in sci_set_termios()
2523 if (sci_getreg(port, HSSRR)->size) { in sci_set_termios()
2528 int last_stop = bits * 2 - 1; in sci_set_termios()
2538 int shift = clamp(deviation / 2, -8, 7); in sci_set_termios()
2548 udelay((1000000 + (baud - 1)) / baud); in sci_set_termios()
2551 scr_val = s->cfg->scscr & (SCSCR_CKE1 | SCSCR_CKE0); in sci_set_termios()
2554 serial_port_out(port, SCSCR, scr_val | s->hscif_tot); in sci_set_termios()
2558 sci_init_pins(port, termios->c_cflag); in sci_set_termios()
2560 port->status &= ~UPSTAT_AUTOCTS; in sci_set_termios()
2561 s->autorts = false; in sci_set_termios()
2563 if (reg->size) { in sci_set_termios()
2566 if ((port->flags & UPF_HARD_FLOW) && in sci_set_termios()
2567 (termios->c_cflag & CRTSCTS)) { in sci_set_termios()
2569 port->status |= UPSTAT_AUTOCTS; in sci_set_termios()
2571 s->autorts = true; in sci_set_termios()
2583 if (port->flags & UPF_HARD_FLOW) { in sci_set_termios()
2585 sci_set_mctrl(port, port->mctrl); in sci_set_termios()
2589 (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)); in sci_set_termios()
2590 serial_port_out(port, SCSCR, scr_val | s->hscif_tot); in sci_set_termios()
2592 (port->type == PORT_SCIFA || port->type == PORT_SCIFB)) { in sci_set_termios()
2612 s->rx_frame = (10000 * bits) / (baud / 100); in sci_set_termios()
2614 s->rx_timeout = s->buf_len_rx * 2 * s->rx_frame; in sci_set_termios()
2615 if (s->rx_timeout < 20) in sci_set_termios()
2616 s->rx_timeout = 20; in sci_set_termios()
2619 if ((termios->c_cflag & CREAD) != 0) in sci_set_termios()
2622 spin_unlock_irqrestore(&port->lock, flags); in sci_set_termios()
2626 if (UART_ENABLE_MS(port, termios->c_cflag)) in sci_set_termios()
2647 switch (port->type) { in sci_type()
2672 if (port->membase) in sci_remap_port()
2675 if (port->dev->of_node || (port->flags & UPF_IOREMAP)) { in sci_remap_port()
2676 port->membase = ioremap_nocache(port->mapbase, sport->reg_size); in sci_remap_port()
2677 if (unlikely(!port->membase)) { in sci_remap_port()
2678 dev_err(port->dev, "can't remap port#%d\n", port->line); in sci_remap_port()
2679 return -ENXIO; in sci_remap_port()
2687 port->membase = (void __iomem *)(uintptr_t)port->mapbase; in sci_remap_port()
2697 if (port->dev->of_node || (port->flags & UPF_IOREMAP)) { in sci_release_port()
2698 iounmap(port->membase); in sci_release_port()
2699 port->membase = NULL; in sci_release_port()
2702 release_mem_region(port->mapbase, sport->reg_size); in sci_release_port()
2711 res = request_mem_region(port->mapbase, sport->reg_size, in sci_request_port()
2712 dev_name(port->dev)); in sci_request_port()
2714 dev_err(port->dev, "request_mem_region failed."); in sci_request_port()
2715 return -EBUSY; in sci_request_port()
2732 port->type = sport->cfg->type; in sci_config_port()
2739 if (ser->baud_base < 2400) in sci_verify_port()
2741 return -EINVAL; in sci_verify_port()
2782 if (sci_port->cfg->type == PORT_HSCIF) in sci_init_clocks()
2787 if (PTR_ERR(clk) == -EPROBE_DEFER) in sci_init_clocks()
2788 return -EPROBE_DEFER; in sci_init_clocks()
2796 if (PTR_ERR(clk) == -EPROBE_DEFER) in sci_init_clocks()
2797 return -EPROBE_DEFER; in sci_init_clocks()
2823 sci_port->clks[i] = IS_ERR(clk) ? NULL : clk; in sci_init_clocks()
2833 if (cfg->regtype != SCIx_PROBE_REGTYPE) in sci_probe_regmap()
2834 return &sci_port_params[cfg->regtype]; in sci_probe_regmap()
2836 switch (cfg->type) { in sci_probe_regmap()
2851 * The SH-4 is a bit of a misnomer here, although that's in sci_probe_regmap()
2873 struct uart_port *port = &sci_port->port; in sci_init_single()
2878 sci_port->cfg = p; in sci_init_single()
2880 port->ops = &sci_uart_ops; in sci_init_single()
2881 port->iotype = UPIO_MEM; in sci_init_single()
2882 port->line = index; in sci_init_single()
2886 return -ENOMEM; in sci_init_single()
2888 port->mapbase = res->start; in sci_init_single()
2889 sci_port->reg_size = resource_size(res); in sci_init_single()
2891 for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i) in sci_init_single()
2892 sci_port->irqs[i] = platform_get_irq(dev, i); in sci_init_single()
2897 * In the non-muxed case, up to 6 interrupt signals might be generated in sci_init_single()
2901 if (sci_port->irqs[0] < 0) in sci_init_single()
2902 return -ENXIO; in sci_init_single()
2904 if (sci_port->irqs[1] < 0) in sci_init_single()
2905 for (i = 1; i < ARRAY_SIZE(sci_port->irqs); i++) in sci_init_single()
2906 sci_port->irqs[i] = sci_port->irqs[0]; in sci_init_single()
2908 sci_port->params = sci_probe_regmap(p); in sci_init_single()
2909 if (unlikely(sci_port->params == NULL)) in sci_init_single()
2910 return -EINVAL; in sci_init_single()
2912 switch (p->type) { in sci_init_single()
2914 sci_port->rx_trigger = 48; in sci_init_single()
2917 sci_port->rx_trigger = 64; in sci_init_single()
2920 sci_port->rx_trigger = 32; in sci_init_single()
2923 if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) in sci_init_single()
2925 sci_port->rx_trigger = 1; in sci_init_single()
2927 sci_port->rx_trigger = 8; in sci_init_single()
2930 sci_port->rx_trigger = 1; in sci_init_single()
2934 sci_port->rx_fifo_timeout = 0; in sci_init_single()
2935 sci_port->hscif_tot = 0; in sci_init_single()
2941 sci_port->sampling_rate_mask = p->sampling_rate in sci_init_single()
2942 ? SCI_SR(p->sampling_rate) in sci_init_single()
2943 : sci_port->params->sampling_rate_mask; in sci_init_single()
2946 ret = sci_init_clocks(sci_port, &dev->dev); in sci_init_single()
2950 port->dev = &dev->dev; in sci_init_single()
2952 pm_runtime_enable(&dev->dev); in sci_init_single()
2955 port->type = p->type; in sci_init_single()
2956 port->flags = UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags; in sci_init_single()
2957 port->fifosize = sci_port->params->fifosize; in sci_init_single()
2959 if (port->type == PORT_SCI) { in sci_init_single()
2960 if (sci_port->reg_size >= 0x20) in sci_init_single()
2961 port->regshift = 2; in sci_init_single()
2963 port->regshift = 1; in sci_init_single()
2968 * for the multi-IRQ ports, which is where we are primarily in sci_init_single()
2973 port->irq = sci_port->irqs[SCIx_RXI_IRQ]; in sci_init_single()
2974 port->irqflags = 0; in sci_init_single()
2976 port->serial_in = sci_serial_in; in sci_init_single()
2977 port->serial_out = sci_serial_out; in sci_init_single()
2984 pm_runtime_disable(port->port.dev); in sci_cleanup_single()
3001 struct sci_port *sci_port = &sci_ports[co->index]; in serial_console_write()
3002 struct uart_port *port = &sci_port->port; in serial_console_write()
3008 if (port->sysrq) in serial_console_write()
3013 locked = spin_trylock_irqsave(&port->lock, flags); in serial_console_write()
3015 spin_lock_irqsave(&port->lock, flags); in serial_console_write()
3020 (sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) | in serial_console_write()
3022 serial_port_out(port, SCSCR, ctrl_temp | sci_port->hscif_tot); in serial_console_write()
3035 spin_unlock_irqrestore(&port->lock, flags); in serial_console_write()
3051 if (co->index < 0 || co->index >= SCI_NPORTS) in serial_console_setup()
3052 return -ENODEV; in serial_console_setup()
3054 sci_port = &sci_ports[co->index]; in serial_console_setup()
3055 port = &sci_port->port; in serial_console_setup()
3060 if (!port->ops) in serial_console_setup()
3061 return -ENODEV; in serial_console_setup()
3079 .index = -1,
3087 .index = -1,
3094 const struct plat_sci_port *cfg = dev_get_platdata(&pdev->dev); in sci_probe_earlyprintk()
3097 return -EEXIST; in sci_probe_earlyprintk()
3099 early_serial_console.index = pdev->id; in sci_probe_earlyprintk()
3101 sci_init_single(pdev, &sci_ports[pdev->id], pdev->id, cfg, true); in sci_probe_earlyprintk()
3117 return -EINVAL; in sci_probe_earlyprintk()
3140 unsigned int type = port->port.type; /* uart_remove_... clears it */ in sci_remove()
3142 sci_ports_in_use &= ~BIT(port->port.line); in sci_remove()
3143 uart_remove_one_port(&sci_uart_driver, &port->port); in sci_remove()
3147 if (port->port.fifosize > 1) { in sci_remove()
3148 sysfs_remove_file(&dev->dev.kobj, in sci_remove()
3152 sysfs_remove_file(&dev->dev.kobj, in sci_remove()
3165 /* SoC-specific types */
3167 .compatible = "renesas,scif-r7s72100",
3171 .compatible = "renesas,scif-r7s9210",
3174 /* Family-specific types */
3176 .compatible = "renesas,rcar-gen1-scif",
3179 .compatible = "renesas,rcar-gen2-scif",
3182 .compatible = "renesas,rcar-gen3-scif",
3210 struct device_node *np = pdev->dev.of_node; in sci_parse_dt()
3219 data = of_device_get_match_data(&pdev->dev); in sci_parse_dt()
3221 p = devm_kzalloc(&pdev->dev, sizeof(struct plat_sci_port), GFP_KERNEL); in sci_parse_dt()
3230 dev_err(&pdev->dev, "failed to get alias id (%d)\n", id); in sci_parse_dt()
3234 dev_err(&pdev->dev, "serial%d out of range\n", id); in sci_parse_dt()
3241 p->type = SCI_OF_TYPE(data); in sci_parse_dt()
3242 p->regtype = SCI_OF_REGTYPE(data); in sci_parse_dt()
3244 sp->has_rtscts = of_property_read_bool(np, "uart-has-rtscts"); in sci_parse_dt()
3258 dev_notice(&dev->dev, "Attempting to register port %d when only %d are available\n", in sci_probe_single()
3260 dev_notice(&dev->dev, "Consider bumping CONFIG_SERIAL_SH_SCI_NR_UARTS!\n"); in sci_probe_single()
3261 return -EINVAL; in sci_probe_single()
3265 return -EBUSY; in sci_probe_single()
3281 sciport->gpios = mctrl_gpio_init(&sciport->port, 0); in sci_probe_single()
3282 if (IS_ERR(sciport->gpios) && PTR_ERR(sciport->gpios) != -ENOSYS) in sci_probe_single()
3283 return PTR_ERR(sciport->gpios); in sci_probe_single()
3285 if (sciport->has_rtscts) { in sci_probe_single()
3286 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios, in sci_probe_single()
3288 !IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios, in sci_probe_single()
3290 dev_err(&dev->dev, "Conflicting RTS/CTS config\n"); in sci_probe_single()
3291 return -EINVAL; in sci_probe_single()
3293 sciport->port.flags |= UPF_HARD_FLOW; in sci_probe_single()
3296 ret = uart_add_one_port(&sci_uart_driver, &sciport->port); in sci_probe_single()
3320 if (dev->dev.of_node) { in sci_probe()
3323 return -EINVAL; in sci_probe()
3325 p = dev->dev.platform_data; in sci_probe()
3327 dev_err(&dev->dev, "no platform data supplied\n"); in sci_probe()
3328 return -EINVAL; in sci_probe()
3331 dev_id = dev->id; in sci_probe()
3341 if (sp->port.fifosize > 1) { in sci_probe()
3342 ret = sysfs_create_file(&dev->dev.kobj, in sci_probe()
3347 if (sp->port.type == PORT_SCIFA || sp->port.type == PORT_SCIFB || in sci_probe()
3348 sp->port.type == PORT_HSCIF) { in sci_probe()
3349 ret = sysfs_create_file(&dev->dev.kobj, in sci_probe()
3352 if (sp->port.fifosize > 1) { in sci_probe()
3353 sysfs_remove_file(&dev->dev.kobj, in sci_probe()
3373 uart_suspend_port(&sci_uart_driver, &sport->port); in sci_suspend()
3383 uart_resume_port(&sci_uart_driver, &sport->port); in sci_resume()
3394 .name = "sh-sci",
3425 if (!device->port.membase) in early_console_setup()
3426 return -ENODEV; in early_console_setup()
3428 device->port.serial_in = sci_serial_in; in early_console_setup()
3429 device->port.serial_out = sci_serial_out; in early_console_setup()
3430 device->port.type = type; in early_console_setup()
3431 memcpy(&sci_ports[0].port, &device->port, sizeof(struct uart_port)); in early_console_setup()
3439 device->con->write = serial_console_write; in early_console_setup()
3479 MODULE_ALIAS("platform:sh-sci");