Lines Matching +full:0 +full:xf0ffffff
118 } while (0)
125 } while (0)
144 0, /* EXT_VERT_STRETCH */
271 640, 480, 640, 480, 0, 0, 8, 0,
272 {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
273 0, 0, -1, -1, 0, 39722, 48, 16, 33, 10, 96, 2,
274 0, FB_VMODE_NONINTERLACED
280 0, FB_VMODE_NONINTERLACED
314 static int backlight = 0;
321 module_param_named(vmode, default_vmode, int, 0);
323 module_param_named(cmode, default_cmode, int, 0);
328 static unsigned int mach64_count = 0;
329 static unsigned long phys_vmembase[FB_MAX] = { 0, };
330 static unsigned long phys_size[FB_MAX] = { 0, };
331 static unsigned long phys_guiregbase[FB_MAX] = { 0, };
373 { PCI_CHIP_MACH64GX, "ATI888GX00 (Mach64 GX)", 135, 50, 50, 0, ATI_CHIP_88800GX },
374 { PCI_CHIP_MACH64CX, "ATI888CX00 (Mach64 CX)", 135, 50, 50, 0, ATI_CHIP_88800CX },
378 { PCI_CHIP_MACH64CT, "ATI264CT (Mach64 CT)", 135, 60, 60, 0, ATI_CHIP_264CT },
379 { PCI_CHIP_MACH64ET, "ATI264ET (Mach64 ET)", 135, 60, 60, 0, ATI_CHIP_264ET },
382 { PCI_CHIP_MACH64LT, "ATI264LT (Mach64 LT)", 135, 63, 63, 0, ATI_CHIP_264LT },
434 (info->fix.smem_len == 0x800000 || in aty_fudge_framebuffer_len()
435 (par->bus_type == ISA && info->fix.smem_len == 0x400000))) in aty_fudge_framebuffer_len()
447 for (i = (int)ARRAY_SIZE(aty_chips) - 1; i >= 0; i--) in correct_chipset()
451 if (i < 0) in correct_chipset()
468 if (type != 0x00d7) in correct_chipset()
472 if (type != 0x0057) in correct_chipset()
478 switch (rev & 0x07) { in correct_chipset()
479 case 0x00: in correct_chipset()
480 switch (rev & 0xc0) { in correct_chipset()
481 case 0x00: in correct_chipset()
489 case 0x40: in correct_chipset()
499 case 0x01: in correct_chipset()
507 case 0x02: in correct_chipset()
518 switch (rev & 0x07) { in correct_chipset()
519 case 0x01: in correct_chipset()
527 case 0x02: in correct_chipset()
540 PRINTKI("%s [0x%04x rev 0x%02x]\n", name, type, rev); in correct_chipset()
541 return 0; in correct_chipset()
583 par->pll.ct.xres = 0; in atyfb_get_pixclock()
584 if (par->lcd_table != 0) { in atyfb_get_pixclock()
605 aty_st_le32(GP_IO, 0x31003100, par); /* drive outputs high */ in read_aty_sense()
607 aty_st_le32(GP_IO, 0, par); /* turn off outputs */ in read_aty_sense()
610 sense = ((i & 0x3000) >> 3) | (i & 0x100); in read_aty_sense()
613 aty_st_le32(GP_IO, 0x20000000, par); /* drive A low */ in read_aty_sense()
616 sense |= ((i & 0x1000) >> 7) | ((i & 0x100) >> 4); in read_aty_sense()
617 aty_st_le32(GP_IO, 0x20002000, par); /* drive A high again */ in read_aty_sense()
620 aty_st_le32(GP_IO, 0x10000000, par); /* drive B low */ in read_aty_sense()
623 sense |= ((i & 0x2000) >> 10) | ((i & 0x100) >> 6); in read_aty_sense()
624 aty_st_le32(GP_IO, 0x10001000, par); /* drive B high again */ in read_aty_sense()
627 aty_st_le32(GP_IO, 0x01000000, par); /* drive C low */ in read_aty_sense()
629 sense |= (aty_ld_le32(GP_IO, par) & 0x3000) >> 12; in read_aty_sense()
630 aty_st_le32(GP_IO, 0, par); /* turn off outputs */ in read_aty_sense()
645 if (par->lcd_table != 0) { in aty_get_crtc()
674 if (par->lcd_table != 0) { in aty_get_crtc()
692 if (par->lcd_table != 0) { in aty_set_crtc()
715 ((((crtc->h_tot_disp >> 16) & 0xff) + 1) << 3), in aty_set_crtc()
716 (((crtc->v_tot_disp >> 16) & 0x7ff) + 1), in aty_set_crtc()
717 (crtc->h_sync_strt_wid & 0x200000) ? 'N' : 'P', in aty_set_crtc()
718 (crtc->v_sync_strt_wid & 0x200000) ? 'N' : 'P', in aty_set_crtc()
737 #if 0 in aty_set_crtc()
744 if (par->lcd_table != 0) { in aty_set_crtc()
750 ((((crtc->shadow_h_tot_disp >> 16) & 0xff) + 1) << 3), in aty_set_crtc()
751 (((crtc->shadow_v_tot_disp >> 16) & 0x7ff) + 1), in aty_set_crtc()
752 (crtc->shadow_h_sync_strt_wid & 0x200000) ? 'N' : 'P', in aty_set_crtc()
753 (crtc->shadow_v_sync_strt_wid & 0x200000) ? 'N' : 'P'); in aty_set_crtc()
871 h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1; in aty_var_to_crtc()
872 v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1; in aty_var_to_crtc()
888 if (par->lcd_table != 0) { in aty_var_to_crtc()
900 crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par) | 0x4000; in aty_var_to_crtc()
931 if ((par->lcd_table != 0) && (crtc->lcd_gen_cntl & LCD_ON)) { in aty_var_to_crtc()
933 /* bpp -> bytespp, 1,4 -> 0; 8 -> 2; 15,16 -> 1; 24 -> 6; 32 -> 5 in aty_var_to_crtc()
934 const u8 DFP_h_sync_dly_LT[] = { 0, 2, 1, 6, 5 }; in aty_var_to_crtc()
935 const u8 ADD_to_strt_wid_and_dly_LT_DAC[] = { 0, 5, 6, 9, 9, 12, 12 }; */ in aty_var_to_crtc()
973 FAIL_MAX("h_disp too large", h_disp, 0xff); in aty_var_to_crtc()
974 FAIL_MAX("h_sync_strt too large", h_sync_strt, 0x1ff); in aty_var_to_crtc()
975 /*FAIL_MAX("h_sync_wid too large", h_sync_wid, 0x1f);*/ in aty_var_to_crtc()
976 if (h_sync_wid > 0x1f) in aty_var_to_crtc()
977 h_sync_wid = 0x1f; in aty_var_to_crtc()
978 FAIL_MAX("h_total too large", h_total, 0x1ff); in aty_var_to_crtc()
993 FAIL_MAX("v_disp too large", v_disp, 0x7ff); in aty_var_to_crtc()
994 FAIL_MAX("v_sync_stsrt too large", v_sync_strt, 0x7ff); in aty_var_to_crtc()
995 /*FAIL_MAX("v_sync_wid too large", v_sync_wid, 0x1f);*/ in aty_var_to_crtc()
996 if (v_sync_wid > 0x1f) in aty_var_to_crtc()
997 v_sync_wid = 0x1f; in aty_var_to_crtc()
998 FAIL_MAX("v_total too large", v_total, 0x7ff); in aty_var_to_crtc()
1000 c_sync = sync & FB_SYNC_COMP_HIGH_ACT ? CRTC_CSYNC_EN : 0; in aty_var_to_crtc()
1011 crtc->vline_crnt_vline = 0; in aty_var_to_crtc()
1014 crtc->h_sync_strt_wid = (h_sync_strt & 0xff) | (h_sync_dly << 8) | in aty_var_to_crtc()
1015 ((h_sync_strt & 0x100) << 4) | (h_sync_wid << 16) | in aty_var_to_crtc()
1032 if (par->lcd_table != 0) { in aty_var_to_crtc()
1082 while (--Index >= 0) { in aty_var_to_crtc()
1092 if ((horz_stretch_loop >= 0) && !BestRemainder) { in aty_var_to_crtc()
1093 int horz_stretch_ratio = 0, Accumulator = 0; in aty_var_to_crtc()
1098 while (--Index >= 0) { in aty_var_to_crtc()
1099 if (Accumulator > 0) in aty_var_to_crtc()
1110 break; /* Out of the do { ... } while (0) */ in aty_var_to_crtc()
1116 } while (0); in aty_var_to_crtc()
1131 crtc->vert_stretching = 0; in aty_var_to_crtc()
1148 return 0; in aty_var_to_crtc()
1161 h_total = crtc->h_tot_disp & 0x1ff; in aty_crtc_to_var()
1162 h_disp = (crtc->h_tot_disp >> 16) & 0xff; in aty_crtc_to_var()
1163 h_sync_strt = (crtc->h_sync_strt_wid & 0xff) | ((crtc->h_sync_strt_wid >> 4) & 0x100); in aty_crtc_to_var()
1164 h_sync_dly = (crtc->h_sync_strt_wid >> 8) & 0x7; in aty_crtc_to_var()
1165 h_sync_wid = (crtc->h_sync_strt_wid >> 16) & 0x1f; in aty_crtc_to_var()
1166 h_sync_pol = (crtc->h_sync_strt_wid >> 21) & 0x1; in aty_crtc_to_var()
1167 v_total = crtc->v_tot_disp & 0x7ff; in aty_crtc_to_var()
1168 v_disp = (crtc->v_tot_disp >> 16) & 0x7ff; in aty_crtc_to_var()
1169 v_sync_strt = crtc->v_sync_strt_wid & 0x7ff; in aty_crtc_to_var()
1170 v_sync_wid = (crtc->v_sync_strt_wid >> 16) & 0x1f; in aty_crtc_to_var()
1171 v_sync_pol = (crtc->v_sync_strt_wid >> 21) & 0x1; in aty_crtc_to_var()
1172 c_sync = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0; in aty_crtc_to_var()
1186 sync = (h_sync_pol ? 0 : FB_SYNC_HOR_HIGH_ACT) | in aty_crtc_to_var()
1187 (v_sync_pol ? 0 : FB_SYNC_VERT_HIGH_ACT) | in aty_crtc_to_var()
1188 (c_sync ? FB_SYNC_COMP_HIGH_ACT : 0); in aty_crtc_to_var()
1191 #if 0 in aty_crtc_to_var()
1194 var->red.offset = 0; in aty_crtc_to_var()
1196 var->green.offset = 0; in aty_crtc_to_var()
1198 var->blue.offset = 0; in aty_crtc_to_var()
1200 var->transp.offset = 0; in aty_crtc_to_var()
1201 var->transp.length = 0; in aty_crtc_to_var()
1206 var->red.offset = 0; in aty_crtc_to_var()
1208 var->green.offset = 0; in aty_crtc_to_var()
1210 var->blue.offset = 0; in aty_crtc_to_var()
1212 var->transp.offset = 0; in aty_crtc_to_var()
1213 var->transp.length = 0; in aty_crtc_to_var()
1221 var->blue.offset = 0; in aty_crtc_to_var()
1223 var->transp.offset = 0; in aty_crtc_to_var()
1224 var->transp.length = 0; in aty_crtc_to_var()
1232 var->blue.offset = 0; in aty_crtc_to_var()
1234 var->transp.offset = 0; in aty_crtc_to_var()
1235 var->transp.length = 0; in aty_crtc_to_var()
1243 var->blue.offset = 0; in aty_crtc_to_var()
1245 var->transp.offset = 0; in aty_crtc_to_var()
1246 var->transp.length = 0; in aty_crtc_to_var()
1254 var->blue.offset = 0; in aty_crtc_to_var()
1295 return 0; in aty_crtc_to_var()
1311 return 0; in atyfb_set_par()
1319 if (pixclock == 0) { in atyfb_set_par()
1351 pixclock_in_ps = 0; in atyfb_set_par()
1353 if (0 == pixclock_in_ps) { in atyfb_set_par()
1354 PRINTKE("ALERT ops->pll_to_var get 0\n"); in atyfb_set_par()
1358 memset(&debug, 0, sizeof(debug)); in atyfb_set_par()
1404 tmp = aty_ld_le32(MEM_CNTL, par) & 0xf0ffffff; in atyfb_set_par()
1407 tmp |= 0x02000000; in atyfb_set_par()
1410 tmp |= 0x03000000; in atyfb_set_par()
1413 tmp |= 0x06000000; in atyfb_set_par()
1418 tmp = aty_ld_le32(MEM_CNTL, par) & 0xf00fffff; in atyfb_set_par()
1424 tmp |= 0x00000000; in atyfb_set_par()
1427 tmp |= 0x04000000; in atyfb_set_par()
1430 tmp |= 0x08000000; in atyfb_set_par()
1434 aty_st_le32(DAC_CNTL, 0x87010184, par); in atyfb_set_par()
1435 aty_st_le32(BUS_CNTL, 0x680000f9, par); in atyfb_set_par()
1437 aty_st_le32(DAC_CNTL, 0x87010184, par); in atyfb_set_par()
1438 aty_st_le32(BUS_CNTL, 0x680000f9, par); in atyfb_set_par()
1440 aty_st_le32(DAC_CNTL, 0x80010102, par); in atyfb_set_par()
1441 aty_st_le32(BUS_CNTL, 0x7b33a040 | (par->aux_start ? BUS_APER_REG_DIS : 0), par); in atyfb_set_par()
1444 aty_st_le32(DAC_CNTL, 0x86010102, par); in atyfb_set_par()
1445 aty_st_le32(BUS_CNTL, 0x7b23a040 | (par->aux_start ? BUS_APER_REG_DIS : 0), par); in atyfb_set_par()
1446 aty_st_le32(EXT_MEM_CNTL, aty_ld_le32(EXT_MEM_CNTL, par) | 0x5000001, par); in atyfb_set_par()
1450 aty_st_8(DAC_MASK, 0xff, par); in atyfb_set_par()
1464 (((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8, in atyfb_set_par()
1465 ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1, in atyfb_set_par()
1469 #if 0 in atyfb_set_par()
1480 base = 0x2000; in atyfb_set_par()
1482 for (i = 0; i < 256; i = i+4) { in atyfb_set_par()
1483 if (i % 16 == 0) in atyfb_set_par()
1484 printk("\ndebug atyfb: 0x%04X: ", base + i); in atyfb_set_par()
1491 base = 0x00; in atyfb_set_par()
1493 for (i = 0; i < 64; i++) { in atyfb_set_par()
1494 if (i % 16 == 0) in atyfb_set_par()
1495 printk("\ndebug atyfb: 0x%02X: ", base + i); in atyfb_set_par()
1496 if (i % 4 == 0) in atyfb_set_par()
1504 if (par->lcd_table != 0) { in atyfb_set_par()
1506 base = 0x00; in atyfb_set_par()
1509 for (i = 0; i <= POWER_MANAGEMENT; i++) { in atyfb_set_par()
1512 printk("\ndebug atyfb: 0x%04X: ", in atyfb_set_par()
1517 for (i = 0; i < 64; i++) { in atyfb_set_par()
1518 if (i % 4 == 0) in atyfb_set_par()
1519 printk("\ndebug atyfb: 0x%02X: ", in atyfb_set_par()
1529 return 0; in atyfb_set_par()
1548 if (pixclock == 0) { in atyfb_check_var()
1562 info->var.accel_flags = 0; in atyfb_check_var()
1566 return 0; in atyfb_check_var()
1593 par->mmaped = 0; in atyfb_open()
1596 return 0; in atyfb_open()
1602 int handled = 0; in aty_irq()
1615 par->vblank.pan_display = 0; in aty_irq()
1631 if (!test_and_set_bit(0, &par->irq_flags)) { in aty_enable_irq()
1633 clear_bit(0, &par->irq_flags); in aty_enable_irq()
1656 return 0; in aty_enable_irq()
1663 if (test_and_clear_bit(0, &par->irq_flags)) { in aty_disable_irq()
1665 par->vblank.pan_display = 0; in aty_disable_irq()
1676 return 0; in aty_disable_irq()
1687 return 0; in atyfb_release()
1694 return 0; in atyfb_release()
1699 par->mmaped = 0; in atyfb_release()
1727 return 0; in atyfb_release()
1742 xres = (((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8; in atyfb_pan_display()
1743 yres = ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1; in atyfb_pan_display()
1754 return 0; in atyfb_pan_display()
1757 if ((var->activate & FB_ACTIVATE_VBL) && !aty_enable_irq(par, 0)) { in atyfb_pan_display()
1760 par->vblank.pan_display = 0; in atyfb_pan_display()
1764 return 0; in atyfb_pan_display()
1774 case 0: in aty_waitforvblank()
1781 ret = aty_enable_irq(par, 0); in aty_waitforvblank()
1788 if (ret < 0) in aty_waitforvblank()
1790 if (ret == 0) { in aty_waitforvblank()
1795 return 0; in aty_waitforvblank()
1800 #define ATYIO_CLKR 0x41545900 /* ATY\00 */
1801 #define ATYIO_CLKW 0x41545901 /* ATY\01 */
1812 u32 dsp_xclks_per_row; /* 0-16383 */
1813 u32 dsp_loop_latency; /* 0-15 */
1814 u32 dsp_precision; /* 0-7 */
1815 u32 dsp_on; /* 0-2047 */
1816 u32 dsp_off; /* 0-2047 */
1819 #define ATYIO_FEATR 0x41545902 /* ATY\02 */
1820 #define ATYIO_FEATW 0x41545903 /* ATY\03 */
1858 struct atyclk clk = { 0 }; in atyfb_ioctl()
1870 clk.dsp_xclks_per_row = dsp_config & 0x3fff; in atyfb_ioctl()
1871 clk.dsp_loop_latency = (dsp_config >> 16) & 0xf; in atyfb_ioctl()
1873 clk.dsp_off = dsp_on_off & 0x7ff; in atyfb_ioctl()
1874 clk.dsp_on = (dsp_on_off >> 16) & 0x7ff; in atyfb_ioctl()
1896 pll->ct.dsp_config = (clk.dsp_xclks_per_row & 0x3fff) | in atyfb_ioctl()
1897 ((clk.dsp_loop_latency & 0xf) << 16) | in atyfb_ioctl()
1899 pll->ct.dsp_on_off = (clk.dsp_off & 0x7ff) | in atyfb_ioctl()
1900 ((clk.dsp_on & 0x7ff) << 16); in atyfb_ioctl()
1918 return 0; in atyfb_ioctl()
1927 return 0; in atyfb_sync()
1934 unsigned int size, page, map_size = 0; in atyfb_mmap()
1935 unsigned long map_offset = 0; in atyfb_mmap()
1942 if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) in atyfb_mmap()
1950 if (((vma->vm_pgoff == 0) && (size == info->fix.smem_len)) || in atyfb_mmap()
1952 off += 0x8000000000000000UL; in atyfb_mmap()
1957 for (page = 0; page < size;) { in atyfb_mmap()
1958 map_size = 0; in atyfb_mmap()
1959 for (i = 0; par->mmap_map[i].size; i++) { in atyfb_mmap()
1995 return 0; in atyfb_mmap()
2033 if ((--timeout) == 0) in aty_power_mgmt()
2052 if ((--timeout) == 0) in aty_power_mgmt()
2054 } while ((pm & PWR_MGT_STATUS_MASK) != 0); in aty_power_mgmt()
2058 return timeout ? 0 : -EIO; in aty_power_mgmt()
2068 return 0; in atyfb_pci_suspend()
2094 par->asleep = 0; in atyfb_pci_suspend()
2095 par->lock_blank = 0; in atyfb_pci_suspend()
2097 fb_set_suspend(info, 0); in atyfb_pci_suspend()
2109 return 0; in atyfb_pci_suspend()
2132 return 0; in atyfb_pci_resume()
2145 aty_power_mgmt(0, par); in atyfb_pci_resume()
2150 par->asleep = 0; in atyfb_pci_resume()
2156 fb_set_suspend(info, 0); in atyfb_pci_resume()
2159 par->lock_blank = 0; in atyfb_pci_resume()
2166 return 0; in atyfb_pci_resume()
2173 #define MAX_LEVEL 0xFF
2184 if (atylevel < 0) in aty_bl_get_level_brightness()
2185 atylevel = 0; in aty_bl_get_level_brightness()
2200 level = 0; in aty_bl_update_status()
2205 if (level > 0) { in aty_bl_update_status()
2210 reg |= (aty_bl_get_level_brightness(par, 0) << BIAS_MOD_LEVEL_SHIFT); in aty_bl_update_status()
2214 return 0; in aty_bl_update_status()
2235 memset(&props, 0, sizeof(struct backlight_properties)); in aty_bl_init()
2247 fb_bl_default_curve(info, 0, in aty_bl_init()
2248 0x3F * FB_BACKLIGHT_MAX / MAX_LEVEL, in aty_bl_init()
2249 0xFF * FB_BACKLIGHT_MAX / MAX_LEVEL); in aty_bl_init()
2293 for (i = 0; i < size; i++) { in aty_calc_mem_refresh()
2312 if (par->lcd_table != 0 && (aty_ld_lcd(LCD_GEN_CNTL, par) & LCD_ON)) { in atyfb_get_timings_from_lcd()
2326 ret = 0; in atyfb_get_timings_from_lcd()
2337 int gtb_memsize, has_var = 0; in aty_init()
2349 par->bus_type = (stat0 >> 0) & 0x07; in aty_init()
2350 par->ram_type = (stat0 >> 3) & 0x07; in aty_init()
2353 dac_type = (aty_ld_le32(DAC_CNTL, par) >> 16) & 0x07; in aty_init()
2356 dac_type = (stat0 >> 9) & 0x07; in aty_init()
2357 if (dac_type == 0x07) in aty_init()
2360 dac_subtype = (aty_ld_8(SCRATCH_REG1 + 1, par) & 0xF0) | dac_type; in aty_init()
2395 #if 0 /* dead code */ in aty_init()
2418 par->ram_type = (aty_ld_le32(CNFG_STAT0, par) & 0x07); in aty_init()
2466 if (diff1 < 0) in aty_init()
2468 if (diff2 < 0) in aty_init()
2486 /* 0xF used instead of MEM_SIZE_ALIAS */ in aty_init()
2487 switch (par->mem_cntl & 0xF) { in aty_init()
2489 info->fix.smem_len = 0x80000; in aty_init()
2492 info->fix.smem_len = 0x100000; in aty_init()
2495 info->fix.smem_len = 0x200000; in aty_init()
2498 info->fix.smem_len = 0x400000; in aty_init()
2501 info->fix.smem_len = 0x600000; in aty_init()
2504 info->fix.smem_len = 0x800000; in aty_init()
2507 info->fix.smem_len = 0x80000; in aty_init()
2511 info->fix.smem_len = 0x80000; in aty_init()
2514 info->fix.smem_len = 0x100000; in aty_init()
2517 info->fix.smem_len = 0x200000; in aty_init()
2520 info->fix.smem_len = 0x400000; in aty_init()
2523 info->fix.smem_len = 0x600000; in aty_init()
2526 info->fix.smem_len = 0x800000; in aty_init()
2529 info->fix.smem_len = 0x80000; in aty_init()
2533 if (aty_ld_le32(CNFG_STAT1, par) & 0x40000000) in aty_init()
2534 info->fix.smem_len += 0x400000; in aty_init()
2539 par->mem_cntl &= ~(gtb_memsize ? 0xF : MEM_SIZE_ALIAS); in aty_init()
2540 if (info->fix.smem_len <= 0x80000) in aty_init()
2542 else if (info->fix.smem_len <= 0x100000) in aty_init()
2544 else if (info->fix.smem_len <= 0x200000) in aty_init()
2546 else if (info->fix.smem_len <= 0x400000) in aty_init()
2548 else if (info->fix.smem_len <= 0x600000) in aty_init()
2556 * Reg Block 0 (CT-compatible block) is at mmio_start in aty_init()
2557 * Reg Block 1 (multimedia extensions) is at mmio_start - 0x400 in aty_init()
2560 info->fix.mmio_len = 0x400; in aty_init()
2563 info->fix.mmio_len = 0x400; in aty_init()
2566 info->fix.mmio_start -= 0x400; in aty_init()
2567 info->fix.mmio_len = 0x800; in aty_init()
2570 info->fix.mmio_start -= 0x400; in aty_init()
2571 info->fix.mmio_len = 0x800; in aty_init()
2576 info->fix.smem_len == 0x80000 ? 512 : (info->fix.smem_len>>20), in aty_init()
2577 info->fix.smem_len == 0x80000 ? 'K' : 'M', ramname, xtal, in aty_init()
2599 for (i = 0; i < 40; i++) in aty_init()
2653 memset(&var, 0, sizeof(var)); in aty_init()
2680 if (default_vmode <= 0 || default_vmode > VMODE_MAX) in aty_init()
2697 if (mode && fb_find_mode(&var, info, mode, NULL, 0, &defmode, 8)) in aty_init()
2734 ret = fb_alloc_cmap(&info->cmap, 256, 0); in aty_init()
2735 if (ret < 0) in aty_init()
2739 if (ret < 0) { in aty_init()
2748 return 0; in aty_init()
2769 vmembase = simple_strtoul(p, NULL, 0); in store_video_par()
2772 size = simple_strtoul(p, NULL, 0); in store_video_par()
2775 guiregbase = simple_strtoul(p, NULL, 0); in store_video_par()
2782 return 0; in store_video_par()
2785 phys_vmembase[m64_num] = 0; in store_video_par()
2800 return 0; in atyfb_blank()
2812 gen_cntl &= ~0x400004c; in atyfb_blank()
2817 gen_cntl |= 0x4000040; in atyfb_blank()
2820 gen_cntl |= 0x4000048; in atyfb_blank()
2823 gen_cntl |= 0x4000044; in atyfb_blank()
2826 gen_cntl |= 0x400004c; in atyfb_blank()
2840 return 0; in atyfb_blank()
2855 * entries in the var structure). Return != 0 for invalid regno.
2871 return 0; in atyfb_setcolreg()
2904 i = aty_ld_8(DAC_CNTL, par) & 0xfc; in atyfb_setcolreg()
2906 i |= 0x2; /* DAC_CNTL | 0x2 turns off the extra brightness for gt */ in atyfb_setcolreg()
2908 aty_st_8(DAC_MASK, 0xff, par); in atyfb_setcolreg()
2921 for (i = 0; i < 8; i++) in atyfb_setcolreg()
2927 return 0; in atyfb_setcolreg()
2945 par->ati_regbase = (void *)addr + 0x7ffc00UL; in atyfb_setup_sparc()
2946 info->fix.mmio_start = addr + 0x7ffc00UL; in atyfb_setup_sparc()
2951 info->screen_base = (char *) (addr + 0x800000UL); in atyfb_setup_sparc()
2952 info->fix.smem_start = addr + 0x800000UL; in atyfb_setup_sparc()
2958 for (i = 0; i < 6 && pdev->resource[i].start; i++) in atyfb_setup_sparc()
2968 for (i = 0, j = 2; i < 6 && pdev->resource[i].start; i++) { in atyfb_setup_sparc()
2992 par->mmap_map[j].voff = (pbase + 0x10000000) & PAGE_MASK; in atyfb_setup_sparc()
3005 par->mmap_map[j].voff = (pbase + 0x800000) & PAGE_MASK; in atyfb_setup_sparc()
3006 par->mmap_map[j].poff = (base + 0x800000) & PAGE_MASK; in atyfb_setup_sparc()
3007 par->mmap_map[j].size = 0x800000; in atyfb_setup_sparc()
3010 size -= 0x800000; in atyfb_setup_sparc()
3033 switch (mem & 0x0f) { in atyfb_setup_sparc()
3035 mem = (mem & ~(0x0f)) | 2; in atyfb_setup_sparc()
3038 mem = (mem & ~(0x0f)) | 3; in atyfb_setup_sparc()
3041 mem = (mem & ~(0x0f)) | 4; in atyfb_setup_sparc()
3044 mem = (mem & ~(0x0f)) | 5; in atyfb_setup_sparc()
3050 mem &= ~(0x00700000); in atyfb_setup_sparc()
3052 mem &= ~(0xcf80e000); /* Turn off all undocumented bits. */ in atyfb_setup_sparc()
3068 var->xoffset = var->yoffset = 0; in atyfb_setup_sparc()
3084 for (i = 0; i < 16; i++) in atyfb_setup_sparc()
3127 return 0; in atyfb_setup_sparc()
3147 /* Address of driver information table is at offset 0x78. */ in aty_init_lcd()
3148 driv_inf_tab = bios_base + *((u16 *)(bios_base+0x78)); in aty_init_lcd()
3152 if ((sig == 0x54504c24) || /* Rage LT pro */ in aty_init_lcd()
3153 (sig == 0x544d5224) || /* Rage mobility */ in aty_init_lcd()
3154 (sig == 0x54435824) || /* Rage XC */ in aty_init_lcd()
3155 (sig == 0x544c5824)) { /* Rage XL */ in aty_init_lcd()
3158 par->lcd_table = 0; in aty_init_lcd()
3159 if (lcd_ofs != 0) in aty_init_lcd()
3163 if (par->lcd_table != 0) { in aty_init_lcd()
3184 model[23] = 0; in aty_init_lcd()
3199 case 0: in aty_init_lcd()
3218 if (tech == 0 || tech == 2) { in aty_init_lcd()
3220 case 0: in aty_init_lcd()
3234 case 0: in aty_init_lcd()
3260 refresh_rates_buf[0] = 0; in aty_init_lcd()
3263 f = 0; in aty_init_lcd()
3264 for (i = 0; i < 16; i++) { in aty_init_lcd()
3266 if (f == 0) { in aty_init_lcd()
3278 default_refresh_rate = (*(u8 *)(par->lcd_table+61) & 0xf0) >> 4; in aty_init_lcd()
3295 while (*lcdmodeptr != 0) { in aty_init_lcd()
3300 mwidth = *((u16 *)(modeptr+0)); in aty_init_lcd()
3334 if (*lcdmodeptr == 0) { in aty_init_lcd()
3370 rom_addr = 0xc0000 + ((aty_ld_le32(SCRATCH_REG1, par) & 0x7f) << 11); in init_from_bios()
3371 bios_base = (unsigned long)ioremap(rom_addr, 0x10000); in init_from_bios()
3373 /* The BIOS starts with 0xaa55. */ in init_from_bios()
3374 if (*((u16 *)bios_base) == 0xaa55) { in init_from_bios()
3384 rom_table_offset = (u16)(bios_ptr[0x48] | (bios_ptr[0x49] << 8)); in init_from_bios()
3407 ret = 0; in init_from_bios()
3425 int ret = 0; in atyfb_setup_generic()
3427 raddr = addr + 0x7ff000UL; in atyfb_setup_generic()
3442 par->ati_regbase = ioremap_uc(info->fix.mmio_start, 0x1000); in atyfb_setup_generic()
3446 info->fix.mmio_start += par->aux_start ? 0x400 : 0xc00; in atyfb_setup_generic()
3447 par->ati_regbase += par->aux_start ? 0x400 : 0xc00; in atyfb_setup_generic()
3460 addr += 0x800000; in atyfb_setup_generic()
3477 info->fix.smem_len = 0x800000; in atyfb_setup_generic()
3497 par->clk_wr_offset = (inb(R_GENMO) & 0x0CU) >> 2; in atyfb_setup_generic()
3499 par->clk_wr_offset = aty_ld_8(CLOCK_CNTL, par) & 0x03U; in atyfb_setup_generic()
3504 return 0; in atyfb_setup_generic()
3534 rp = &pdev->resource[0]; in atyfb_pci_probe()
3583 par->mmap_map[0].voff = 0x8000000000000000UL; in atyfb_pci_probe()
3584 par->mmap_map[0].poff = (unsigned long) info->screen_base & PAGE_MASK; in atyfb_pci_probe()
3585 par->mmap_map[0].size = info->fix.smem_len; in atyfb_pci_probe()
3586 par->mmap_map[0].prot_mask = _PAGE_CACHE; in atyfb_pci_probe()
3587 par->mmap_map[0].prot_flag = _PAGE_E; in atyfb_pci_probe()
3588 par->mmap_map[1].voff = par->mmap_map[0].voff + info->fix.smem_len; in atyfb_pci_probe()
3600 return 0; in atyfb_pci_probe()
3631 int num_found = 0; in atyfb_atari_probe()
3633 for (m64_num = 0; m64_num < mach64_count; m64_num++) { in atyfb_atari_probe()
3659 par->ati_regbase = ioremap(phys_guiregbase[m64_num], 0x10000) + in atyfb_atari_probe()
3660 0xFC00ul; in atyfb_atari_probe()
3663 aty_st_le32(CLOCK_CNTL, 0x12345678, par); in atyfb_atari_probe()
3666 switch (clock_r & 0x003F) { in atyfb_atari_probe()
3667 case 0x12: in atyfb_atari_probe()
3670 case 0x34: in atyfb_atari_probe()
3673 case 0x16: in atyfb_atari_probe()
3676 case 0x38: in atyfb_atari_probe()
3677 par->clk_wr_offset = 0; /* Panther 1 ISA Adapter (Gerald) */ in atyfb_atari_probe()
3683 case 0x00d7: in atyfb_atari_probe()
3686 case 0x0057: in atyfb_atari_probe()
3702 return num_found ? 0 : -ENXIO; in atyfb_atari_probe()
3835 return 0; in atyfb_setup()
3843 vram = simple_strtoul(this_opt + 5, NULL, 0); in atyfb_setup()
3845 pll = simple_strtoul(this_opt + 4, NULL, 0); in atyfb_setup()
3847 mclk = simple_strtoul(this_opt + 5, NULL, 0); in atyfb_setup()
3849 xclk = simple_strtoul(this_opt+5, NULL, 0); in atyfb_setup()
3851 comp_sync = simple_strtoul(this_opt+10, NULL, 0); in atyfb_setup()
3853 backlight = simple_strtoul(this_opt+10, NULL, 0); in atyfb_setup()
3857 simple_strtoul(this_opt + 6, NULL, 0); in atyfb_setup()
3858 if (vmode > 0 && vmode <= VMODE_MAX) in atyfb_setup()
3862 simple_strtoul(this_opt + 6, NULL, 0); in atyfb_setup()
3864 case 0: in atyfb_setup()
3898 return 0; in atyfb_setup()
3979 return 0; in atyfb_init()
3997 module_param(noaccel, bool, 0);
3999 module_param(vram, int, 0);
4001 module_param(pll, int, 0);
4003 module_param(mclk, int, 0);
4005 module_param(xclk, int, 0);
4007 module_param(comp_sync, int, 0);
4008 MODULE_PARM_DESC(comp_sync, "Set composite sync signal to low (0) or high (1)");
4009 module_param(mode, charp, 0);
4011 module_param(nomtrr, bool, 0);