33 	gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc;  in viafb_set_bpp()
49 	return 0;  in viafb_set_bpp()
58 	u32 ge_cmd = 0, tmp, i;  in hw_bitblt_1()
68 			ge_cmd |= 0x00008000;  in hw_bitblt_1()
73 			ge_cmd |= 0x00004000;  in hw_bitblt_1()
81 		case 0x00: /* blackness */  in hw_bitblt_1()
82 		case 0x5A: /* pattern inversion */  in hw_bitblt_1()
83 		case 0xF0: /* pattern copy */  in hw_bitblt_1()
84 		case 0xFF: /* whiteness */  in hw_bitblt_1()
98 		if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000)  in hw_bitblt_1()
99 			|| src_y & 0xFFFFF000) {  in hw_bitblt_1()
105 		writel(tmp, engine + 0x08);  in hw_bitblt_1()
108 	if (dst_x & 0xFFFFF000 || dst_y & 0xFFFFF000) {  in hw_bitblt_1()
114 	writel(tmp, engine + 0x0C);  in hw_bitblt_1()
116 	if ((width - 1) & 0xFFFFF000 || (height - 1) & 0xFFFFF000) {  in hw_bitblt_1()
122 	writel(tmp, engine + 0x10);  in hw_bitblt_1()
125 		writel(fg_color, engine + 0x18);  in hw_bitblt_1()
128 		writel(bg_color, engine + 0x1C);  in hw_bitblt_1()
131 		tmp = src_mem ? 0 : src_addr;  in hw_bitblt_1()
132 		if (dst_addr & 0xE0000007) {  in hw_bitblt_1()
138 		writel(tmp, engine + 0x30);  in hw_bitblt_1()
141 	if (dst_addr & 0xE0000007) {  in hw_bitblt_1()
147 	writel(tmp, engine + 0x34);  in hw_bitblt_1()
150 		tmp = 0;  in hw_bitblt_1()
153 	if (tmp & 0xFFFFC007 || dst_pitch & 0xFFFFC007) {  in hw_bitblt_1()
159 	writel(tmp, engine + 0x38);  in hw_bitblt_1()
162 		ge_cmd |= fill_rop << 24 | 0x00002000 | 0x00000001;  in hw_bitblt_1()
164 		ge_cmd |= 0xCC000000; /* ROP=SRCCOPY */  in hw_bitblt_1()
166 			ge_cmd |= 0x00000040;  in hw_bitblt_1()
168 			ge_cmd |= 0x00000002 | 0x00000100 | 0x00020000;  in hw_bitblt_1()
170 			ge_cmd |= 0x00000001;  in hw_bitblt_1()
175 		return 0;  in hw_bitblt_1()
180 	for (i = 0; i < tmp; i++)  in hw_bitblt_1()
183 	return 0;  in hw_bitblt_1()
191 	u32 ge_cmd = 0, tmp, i;  in hw_bitblt_2()
201 			ge_cmd |= 0x00008000;  in hw_bitblt_2()
206 			ge_cmd |= 0x00004000;  in hw_bitblt_2()
214 		case 0x00: /* blackness */  in hw_bitblt_2()
215 		case 0x5A: /* pattern inversion */  in hw_bitblt_2()
216 		case 0xF0: /* pattern copy */  in hw_bitblt_2()
217 		case 0xFF: /* whiteness */  in hw_bitblt_2()
231 		tmp = 0;  in hw_bitblt_2()
234 	if (tmp & 0xFFFFC007 || dst_pitch & 0xFFFFC007) {  in hw_bitblt_2()
240 	writel(tmp, engine + 0x08);  in hw_bitblt_2()
242 	if ((width - 1) & 0xFFFFF000 || (height - 1) & 0xFFFFF000) {  in hw_bitblt_2()
248 	writel(tmp, engine + 0x0C);  in hw_bitblt_2()
250 	if (dst_x & 0xFFFFF000 || dst_y & 0xFFFFF000) {  in hw_bitblt_2()
256 	writel(tmp, engine + 0x10);  in hw_bitblt_2()
258 	if (dst_addr & 0xE0000007) {  in hw_bitblt_2()
264 	writel(tmp, engine + 0x14);  in hw_bitblt_2()
267 		if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000)  in hw_bitblt_2()
268 			|| src_y & 0xFFFFF000) {  in hw_bitblt_2()
274 		writel(tmp, engine + 0x18);  in hw_bitblt_2()
276 		tmp = src_mem ? 0 : src_addr;  in hw_bitblt_2()
277 		if (dst_addr & 0xE0000007) {  in hw_bitblt_2()
283 		writel(tmp, engine + 0x1C);  in hw_bitblt_2()
287 		writel(fg_color, engine + 0x58);  in hw_bitblt_2()
289 		writel(fg_color, engine + 0x4C);  in hw_bitblt_2()
290 		writel(bg_color, engine + 0x50);  in hw_bitblt_2()
294 		ge_cmd |= fill_rop << 24 | 0x00002000 | 0x00000001;  in hw_bitblt_2()
296 		ge_cmd |= 0xCC000000; /* ROP=SRCCOPY */  in hw_bitblt_2()
298 			ge_cmd |= 0x00000040;  in hw_bitblt_2()
300 			ge_cmd |= 0x00000002 | 0x00000100 | 0x00020000;  in hw_bitblt_2()
302 			ge_cmd |= 0x00000001;  in hw_bitblt_2()
307 		return 0;  in hw_bitblt_2()
312 	for (i = 0; i < tmp; i++)  in hw_bitblt_2()
315 	return 0;  in hw_bitblt_2()
378 	return 0;  in viafb_setup_engine()
391 		highest_reg = 0x5c;  in viafb_reset_engine()
394 		highest_reg = 0x40;  in viafb_reset_engine()
397 	for (i = 0; i <= highest_reg; i += 4)  in viafb_reset_engine()
398 		writel(0x0, engine + i);  in viafb_reset_engine()
407 		writel(0x00100000, engine + VIA_REG_CR_TRANSET);  in viafb_reset_engine()
408 		writel(0x680A0000, engine + VIA_REG_CR_TRANSPACE);  in viafb_reset_engine()
409 		writel(0x02000000, engine + VIA_REG_CR_TRANSPACE);  in viafb_reset_engine()
413 		writel(0x00100000, engine + VIA_REG_TRANSET);  in viafb_reset_engine()
414 		writel(0x00000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
415 		writel(0x00333004, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
416 		writel(0x60000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
417 		writel(0x61000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
418 		writel(0x62000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
419 		writel(0x63000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
420 		writel(0x64000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
421 		writel(0x7D000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
423 		writel(0xFE020000, engine + VIA_REG_TRANSET);  in viafb_reset_engine()
424 		writel(0x00000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
432 	vq_start_low = 0x50000000 | (vq_start_addr & 0xFFFFFF);  in viafb_reset_engine()
433 	vq_end_low = 0x51000000 | (vq_end_addr & 0xFFFFFF);  in viafb_reset_engine()
434 	vq_high = 0x52000000 | ((vq_start_addr & 0xFF000000) >> 24) |  in viafb_reset_engine()
435 		((vq_end_addr & 0xFF000000) >> 16);  in viafb_reset_engine()
436 	vq_len = 0x53000000 | (VQ_SIZE >> 3);  in viafb_reset_engine()
444 		vq_start_low |= 0x20000000;  in viafb_reset_engine()
445 		vq_end_low |= 0x20000000;  in viafb_reset_engine()
446 		vq_high |= 0x20000000;  in viafb_reset_engine()
447 		vq_len |= 0x20000000;  in viafb_reset_engine()
449 		writel(0x00100000, engine + VIA_REG_CR_TRANSET);  in viafb_reset_engine()
454 		writel(0x74301001, engine + VIA_REG_CR_TRANSPACE);  in viafb_reset_engine()
455 		writel(0x00000000, engine + VIA_REG_CR_TRANSPACE);  in viafb_reset_engine()
458 		writel(0x00FE0000, engine + VIA_REG_TRANSET);  in viafb_reset_engine()
459 		writel(0x080003FE, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
460 		writel(0x0A00027C, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
461 		writel(0x0B000260, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
462 		writel(0x0C000274, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
463 		writel(0x0D000264, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
464 		writel(0x0E000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
465 		writel(0x0F000020, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
466 		writel(0x1000027E, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
467 		writel(0x110002FE, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
468 		writel(0x200F0060, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
470 		writel(0x00000006, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
471 		writel(0x40008C0F, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
472 		writel(0x44000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
473 		writel(0x45080C04, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
474 		writel(0x46800408, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
485 	writel(0x0, engine + VIA_REG_CURSOR_POS);  in viafb_reset_engine()
486 	writel(0x0, engine + VIA_REG_CURSOR_ORG);  in viafb_reset_engine()
487 	writel(0x0, engine + VIA_REG_CURSOR_BG);  in viafb_reset_engine()
488 	writel(0x0, engine + VIA_REG_CURSOR_FG);  in viafb_reset_engine()
500 		temp |= 0x1;  in viafb_show_hw_cursor()
503 		temp &= 0xFFFFFFFE;  in viafb_show_hw_cursor()
508 		temp |= 0x80000000;  in viafb_show_hw_cursor()
512 		temp &= 0x7FFFFFFF;  in viafb_show_hw_cursor()
520 	int loop = 0;  in viafb_wait_engine_idle()