Lines Matching full:pdif

212 						/* I2S0 can phase track the last S/PDIF input	*/
720 /* S/PDIF Input C Channel Status */
840 /* S/PDIF Host Record Index (bypasses SRC) */
842 /* S/PDIF Host Record Address */
844 /* S/PDIF Host Record Control */
1140  * 0x01, 0x1a: S/PDIF Left
1142  * 0x01, 0x1e: S/PDIF Right
1143  * 0x02, 0x00: Hana S/PDIF Left
1144  * 0x02, 0x01: Hana S/PDIF Right
1167  * 0x01, 0x12: Dock S/PDIF Left
1169  * 0x01, 0x16: Dock S/PDIF Right
1171  * 0x02, 0x00: Hana3 S/PDIF Left
1172  * 0x02, 0x01: Hana3 S/PDIF Right
1183  * 0x02, 0x00: S/PDIF Left
1184  * 0x02, 0x01: S/PDIF Right
1193  * 0x02, 0x00: S/PDIF Left
1194  * 0x02, 0x01: S/PDIF Right
1208  * 0x01, 0x12: Dock S/PDIF Left
1210  * 0x01, 0x16: Dock S/PDIF Right
1307 /* Microdock S/PDIF OUT Left, 1st or 48kHz only */
1309 /* Microdock S/PDIF OUT Left, 2nd or 96kHz */
1311 /* Microdock S/PDIF OUT Right, 1st or 48kHz only */
1313 /* Microdock S/PDIF OUT Right, 2nd or 96kHz  */
1315 /* Microdock S/PDIF ADAT 8 channel out +8 to +f */
1343  * 0x05, 0x00: Hana S/PDIF Left
1344  * 0x05, 0x01: Hana S/PDIF Right
1359  * 0x01, 0x12: Dock S/PDIF Left
1361  * 0x01, 0x16: Dock S/PDIF Right
1370  * 0x05, 0x00: Hana3 S/PDIF Left
1371  * 0x05, 0x01: Hana3 S/PDIF Right
1383  * 0x05, 0x00: S/PDIF Left
1384  * 0x05, 0x01: S/PDIF Right
1396  * 0x05, 0x00: S/PDIF Left
1397  * 0x05, 0x01: S/PDIF Right
1409  * 0x01, 0x12: Dock S/PDIF Left
1411  * 0x01, 0x16: Dock S/PDIF Right
1478 /* Microdock S/PDIF Left, 1st or 48kHz only */
1480 /* Microdock S/PDIF Left, 2nd or 96kHz */
1482 /* Microdock S/PDIF Right, 1st or 48kHz only */
1484 /* Microdock S/PDIF Right, 2nd or 96kHz */
1729 	unsigned int spdif_bits[3];		/* s/pdif out setup */