Lines Matching +full:little +full:- +full:endian
36 #define DRM_FORMAT_BIG_ENDIAN (1<<31) /* format is big endian instead of little endian */
45 #define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
48 #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
49 #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
52 #define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
53 #define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
60 #define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2') /* [15:0] x:R:G:B 4:4:4:4 little endian…
61 #define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2') /* [15:0] x:B:G:R 4:4:4:4 little endian…
62 #define DRM_FORMAT_RGBX4444 fourcc_code('R', 'X', '1', '2') /* [15:0] R:G:B:x 4:4:4:4 little endian…
63 #define DRM_FORMAT_BGRX4444 fourcc_code('B', 'X', '1', '2') /* [15:0] B:G:R:x 4:4:4:4 little endian…
65 #define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2') /* [15:0] A:R:G:B 4:4:4:4 little endian…
66 #define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2') /* [15:0] A:B:G:R 4:4:4:4 little endian…
67 #define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2') /* [15:0] R:G:B:A 4:4:4:4 little endian…
68 #define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2') /* [15:0] B:G:R:A 4:4:4:4 little endian…
70 #define DRM_FORMAT_XRGB1555 fourcc_code('X', 'R', '1', '5') /* [15:0] x:R:G:B 1:5:5:5 little endian…
71 #define DRM_FORMAT_XBGR1555 fourcc_code('X', 'B', '1', '5') /* [15:0] x:B:G:R 1:5:5:5 little endian…
72 #define DRM_FORMAT_RGBX5551 fourcc_code('R', 'X', '1', '5') /* [15:0] R:G:B:x 5:5:5:1 little endian…
73 #define DRM_FORMAT_BGRX5551 fourcc_code('B', 'X', '1', '5') /* [15:0] B:G:R:x 5:5:5:1 little endian…
75 #define DRM_FORMAT_ARGB1555 fourcc_code('A', 'R', '1', '5') /* [15:0] A:R:G:B 1:5:5:5 little endian…
76 #define DRM_FORMAT_ABGR1555 fourcc_code('A', 'B', '1', '5') /* [15:0] A:B:G:R 1:5:5:5 little endian…
77 #define DRM_FORMAT_RGBA5551 fourcc_code('R', 'A', '1', '5') /* [15:0] R:G:B:A 5:5:5:1 little endian…
78 #define DRM_FORMAT_BGRA5551 fourcc_code('B', 'A', '1', '5') /* [15:0] B:G:R:A 5:5:5:1 little endian…
80 #define DRM_FORMAT_RGB565 fourcc_code('R', 'G', '1', '6') /* [15:0] R:G:B 5:6:5 little endian */
81 #define DRM_FORMAT_BGR565 fourcc_code('B', 'G', '1', '6') /* [15:0] B:G:R 5:6:5 little endian */
84 #define DRM_FORMAT_RGB888 fourcc_code('R', 'G', '2', '4') /* [23:0] R:G:B little endian */
85 #define DRM_FORMAT_BGR888 fourcc_code('B', 'G', '2', '4') /* [23:0] B:G:R little endian */
88 #define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') /* [31:0] x:R:G:B 8:8:8:8 little endian…
89 #define DRM_FORMAT_XBGR8888 fourcc_code('X', 'B', '2', '4') /* [31:0] x:B:G:R 8:8:8:8 little endian…
90 #define DRM_FORMAT_RGBX8888 fourcc_code('R', 'X', '2', '4') /* [31:0] R:G:B:x 8:8:8:8 little endian…
91 #define DRM_FORMAT_BGRX8888 fourcc_code('B', 'X', '2', '4') /* [31:0] B:G:R:x 8:8:8:8 little endian…
93 #define DRM_FORMAT_ARGB8888 fourcc_code('A', 'R', '2', '4') /* [31:0] A:R:G:B 8:8:8:8 little endian…
94 #define DRM_FORMAT_ABGR8888 fourcc_code('A', 'B', '2', '4') /* [31:0] A:B:G:R 8:8:8:8 little endian…
95 #define DRM_FORMAT_RGBA8888 fourcc_code('R', 'A', '2', '4') /* [31:0] R:G:B:A 8:8:8:8 little endian…
96 #define DRM_FORMAT_BGRA8888 fourcc_code('B', 'A', '2', '4') /* [31:0] B:G:R:A 8:8:8:8 little endian…
98 …RM_FORMAT_XRGB2101010 fourcc_code('X', 'R', '3', '0') /* [31:0] x:R:G:B 2:10:10:10 little endian */
99 …RM_FORMAT_XBGR2101010 fourcc_code('X', 'B', '3', '0') /* [31:0] x:B:G:R 2:10:10:10 little endian */
100 …RM_FORMAT_RGBX1010102 fourcc_code('R', 'X', '3', '0') /* [31:0] R:G:B:x 10:10:10:2 little endian */
101 …RM_FORMAT_BGRX1010102 fourcc_code('B', 'X', '3', '0') /* [31:0] B:G:R:x 10:10:10:2 little endian */
103 …RM_FORMAT_ARGB2101010 fourcc_code('A', 'R', '3', '0') /* [31:0] A:R:G:B 2:10:10:10 little endian */
104 …RM_FORMAT_ABGR2101010 fourcc_code('A', 'B', '3', '0') /* [31:0] A:B:G:R 2:10:10:10 little endian */
105 …RM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */
106 …RM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */
109 …e DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
110 …e DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
111 …e DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */
112 …e DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
114 #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian …
133 * index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian
135 * index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian
141 #define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
142 #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */
161 #define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) plane…
162 #define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) plane…
168 * Format modifiers describe, typically, a re-ordering or modification
172 * The upper 8 bits of the format modifier are a vendor-id as assigned
189 #define DRM_FORMAT_RESERVED ((1ULL << 56) - 1)
216 * which tells the driver to also take driver-internal information into account
224 * Intel X-tiling layout
227 * in row-major layout. Within the tile bytes are laid out row-major, with
228 * a platform-dependent stride. On top of that the memory can apply
229 * platform-depending swizzling of some higher address bits into bit6.
231 * This format is highly platforms specific and not useful for cross-driver
233 * layout in a simple way for i915-specific userspace.
238 * Intel Y-tiling layout
241 * in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes)
242 * chunks column-major, with a platform-dependent height. On top of that the
243 * memory can apply platform-depending swizzling of some higher address bits
246 * This format is highly platforms specific and not useful for cross-driver
248 * layout in a simple way for i915-specific userspace.
253 * Intel Yf-tiling layout
255 * This is a tiled layout using 4Kb tiles in row-major layout.
256 * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
257 * are arranged in four groups (two wide, two high) with column-major layout.
259 * out as 2x2 column-major.
271 * The main surface will be plane index 0 and must be Y/Yf-tiled,
288 * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
290 * Macroblocks are laid in a Z-shape, and each pixel data is following the
295 * - multiple of 128 pixels for the width
296 * - multiple of 32 pixels for the height
298 * For more information: see https://linuxtv.org/downloads/v4l-dvb-apis/re32.html
306 * Implementation may be platform and base-format specific.
320 * This is a simple tiled layout using tiles of 4x4 pixels in a row-major
326 * Vivante 64x64 super-tiling layout
328 * This is a tiled layout using 64x64 pixel super-tiles, where each super-tile
329 * contains 8x4 groups of 2x4 tiles of 4x4 pixels (like above) each, all in row-
333 * https://github.com/etnaviv/etna_viv/blob/master/doc/hardware.md#texture-tiling
338 * Vivante 4x4 tiling layout for dual-pipe
342 * compared to the non-split tiled layout.
347 * Vivante 64x64 super-tiling layout for dual-pipe
349 * Same as the 64x64 super-tiling layout, except every second 4x4 pixel tile
351 * therefore halved compared to the non-split super-tiled layout.
370 * Within a GOB, data is ordered as 16B x 2 lines sectors laid in Z-shape.
413 ((1ULL << __fourcc_mod_broadcom_param_bits) - 1)))
415 ((m) & ~(((1ULL << __fourcc_mod_broadcom_param_bits) - 1) << \
424 * - 64b utiles of pixels in a raster-order grid according to cpp. It's 4x4
427 * - 1k subtiles made of a 4x4 raster-order grid of 64b utiles (so usually
430 * - 4k tiles made of a 2x2 grid of 1k subtiles (so usually 32x32 pixels). On
434 * - an image made of 4k tiles in rows either left-to-right (even rows of 4k
435 * tiles) or right-to-left (odd rows of 4k tiles).
458 * and UV. Some SAND-using hardware stores UV in a separate tiled
498 * the assumption is that a no-XOR tiling modifier will be created.
506 * It provides fine-grained random access and minimizes the amount of data
511 * and different devices or use-cases may support different combinations.
535 * AFBC block-split
556 * AFBC copy-block restrict
558 * Buffers with this flag must obey the copy-block restriction. The restriction
559 * is such that there are no copy-blocks referring across the border of 8x8
579 * Indicates that the buffer makes use of solid-color blocks, whereby bandwidth