Lines Matching +full:reg +full:- +full:data
2 * ff-protocol-ff400.c - a part of driver for RME Fireface series
4 * Copyright (c) 2015-2017 Takashi Sakamoto
28 __le32 reg; in ff400_get_clock() local
29 u32 data; in ff400_get_clock() local
32 err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST, in ff400_get_clock()
33 FF400_CLOCK_CONFIG, ®, sizeof(reg), 0); in ff400_get_clock()
36 data = le32_to_cpu(reg); in ff400_get_clock()
39 switch ((data >> 1) & 0x03) { in ff400_get_clock()
51 return -EIO; in ff400_get_clock()
54 if (data & 0x08) in ff400_get_clock()
56 else if (data & 0x10) in ff400_get_clock()
60 if (data & 0x01) { in ff400_get_clock()
64 switch ((data >> 10) & 0x07) { in ff400_get_clock()
86 __le32 reg; in ff400_begin_session() local
95 return -EINVAL; in ff400_begin_session()
97 /* Set the number of data blocks transferred in a second. */ in ff400_begin_session()
98 reg = cpu_to_le32(rate); in ff400_begin_session()
99 err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST, in ff400_begin_session()
100 FF400_STF, ®, sizeof(reg), 0); in ff400_begin_session()
110 reg = cpu_to_le32(((ff->rx_stream.data_block_quadlets << 3) << 8) | in ff400_begin_session()
111 ff->rx_resources.channel); in ff400_begin_session()
112 err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST, in ff400_begin_session()
113 FF400_RX_PACKET_FORMAT, ®, sizeof(reg), 0); in ff400_begin_session()
122 reg = cpu_to_le32((0x80 << 24) | in ff400_begin_session()
123 (ff->tx_resources.channel << 5) | in ff400_begin_session()
124 (ff->tx_stream.data_block_quadlets)); in ff400_begin_session()
125 err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST, in ff400_begin_session()
126 FF400_TX_PACKET_FORMAT, ®, sizeof(reg), 0); in ff400_begin_session()
131 reg = cpu_to_le32(0x00000001); in ff400_begin_session()
132 return snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST, in ff400_begin_session()
133 FF400_ISOC_COMM_START, ®, sizeof(reg), 0); in ff400_begin_session()
138 __le32 reg; in ff400_finish_session() local
140 reg = cpu_to_le32(0x80000000); in ff400_finish_session()
141 snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST, in ff400_finish_session()
142 FF400_ISOC_COMM_STOP, ®, sizeof(reg), 0); in ff400_finish_session()
147 __le32 *reg; in ff400_switch_fetching_mode() local
151 reg = kcalloc(18, sizeof(__le32), GFP_KERNEL); in ff400_switch_fetching_mode()
152 if (reg == NULL) in ff400_switch_fetching_mode()
153 return -ENOMEM; in ff400_switch_fetching_mode()
157 * Each quadlet is corresponding to data channels in a data in ff400_switch_fetching_mode()
159 * data channels should be enabled. Here, I take second best in ff400_switch_fetching_mode()
160 * to fetch PCM frames from all of data channels regardless of in ff400_switch_fetching_mode()
164 reg[i] = cpu_to_le32(0x00000001); in ff400_switch_fetching_mode()
167 err = snd_fw_transaction(ff->unit, TCODE_WRITE_BLOCK_REQUEST, in ff400_switch_fetching_mode()
168 FF400_FETCH_PCM_FRAMES, reg, in ff400_switch_fetching_mode()
170 kfree(reg); in ff400_switch_fetching_mode()
177 __le32 reg; in ff400_dump_sync_status() local
178 u32 data; in ff400_dump_sync_status() local
181 err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST, in ff400_dump_sync_status()
182 FF400_SYNC_STATUS, ®, sizeof(reg), 0); in ff400_dump_sync_status()
186 data = le32_to_cpu(reg); in ff400_dump_sync_status()
191 if ((data >> 24) & 0x20) { in ff400_dump_sync_status()
192 if ((data >> 24) & 0x40) in ff400_dump_sync_status()
201 if ((data >> 16) & 0x10) { in ff400_dump_sync_status()
202 if ((data >> 16) & 0x04) in ff400_dump_sync_status()
211 if ((data >> 8) & 0x04) { in ff400_dump_sync_status()
212 if ((data >> 8) & 0x10) in ff400_dump_sync_status()
222 if (((data >> 22) & 0x07) == 0x07) { in ff400_dump_sync_status()
225 switch ((data >> 22) & 0x07) { in ff400_dump_sync_status()
247 if ((data >> 25) & 0x07) { in ff400_dump_sync_status()
248 switch ((data >> 25) & 0x07) { in ff400_dump_sync_status()
284 snd_iprintf(buffer, "%d\n", (data & 0x3ff) * 250); in ff400_dump_sync_status()
290 __le32 reg; in ff400_dump_clock_config() local
291 u32 data; in ff400_dump_clock_config() local
296 err = snd_fw_transaction(ff->unit, TCODE_READ_BLOCK_REQUEST, in ff400_dump_clock_config()
297 FF400_CLOCK_CONFIG, ®, sizeof(reg), 0); in ff400_dump_clock_config()
301 data = le32_to_cpu(reg); in ff400_dump_clock_config()
304 (data & 0x20) ? "Professional" : "Consumer", in ff400_dump_clock_config()
305 (data & 0x40) ? "on" : "off"); in ff400_dump_clock_config()
308 ((data >> 8) & 0x01) ? "S/PDIF" : "ADAT"); in ff400_dump_clock_config()
311 ((data >> 8) & 0x20) ? "on" : "off"); in ff400_dump_clock_config()
314 ((data >> 8) & 0x02) ? "Optical" : "Coaxial"); in ff400_dump_clock_config()
316 switch ((data >> 1) & 0x03) { in ff400_dump_clock_config()
331 if (data & 0x08) in ff400_dump_clock_config()
333 else if (data & 0x10) in ff400_dump_clock_config()
338 if (data & 0x01) { in ff400_dump_clock_config()
341 switch ((data >> 10) & 0x07) { in ff400_dump_clock_config()