Lines Matching +full:adc +full:- +full:joystick
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
45 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
135 #define BA0_DMR_SIZE20 (1<<20) /* Sample is 20-bit */
139 #define BA0_DMR_SIZE8 (1<<16) /* Sample is 8-bit */
145 #define BA0_DMR_AUTO (1<<4) /* Auto-Initialize */
230 #define BA0_SLT12O 0x041c /* Slot 12 GPIO Output Register for AC-Link */
234 #define BA0_SERMC_ODSEN2 (1<<25) /* On-Demand Support Enable ASDIN2 */
235 #define BA0_SERMC_ODSEN1 (1<<24) /* On-Demand Support Enable ASDIN1 */
256 #define BA0_SLT12M 0x045c /* Slot 12 Monitor Register for Primary AC-Link */
270 #define BA0_ACOSV_SLV(x) (1<<((x)-3))
276 #define BA0_ACISV_SLV(x) (1<<((x)-3))
280 #define BA0_JSPT 0x0480 /* Joystick poll/trigger */
281 #define BA0_JSCTL 0x0484 /* Joystick control */
282 #define BA0_JSC1 0x0488 /* Joystick control */
283 #define BA0_JSC2 0x048c /* Joystick control */
297 #define BA0_MIDSR_RDA (1<<15) /* Sticky bit (RBE 1->0) */
298 #define BA0_MIDSR_TBE (1<<14) /* Sticky bit (TBF 0->1) */
305 #define BA0_AODSD1 0x04a8 /* AC'97 On-Demand Slot Disable for primary link (ro) */
306 #define BA0_AODSD1_NDS(x) (1<<((x)-3))
308 #define BA0_AODSD2 0x04ac /* AC'97 On-Demand Slot Disable for secondary link (ro) */
309 #define BA0_AODSD2_NDS(x) (1<<((x)-3))
312 #define BA0_SLT12M2 0x04dc /* Slot 12 Monitor Register 2 for secondary AC-link */
327 #define BA0_SSPM_JSEN (1<<3) /* Joystick Enable */
328 #define BA0_SSPM_ACLEN (1<<2) /* Serial Port Engine and AC-Link Enable */
331 #define BA0_DACSR 0x0744 /* DAC Sample Rate - Playback SRC */
332 #define BA0_ADCSR 0x0748 /* ADC Sample Rate - Capture SRC */
353 /* Source Slot Numbers - Playback */
366 /* Source Slot Numbers - Capture */
380 /* Source Slot Numbers - Others */
387 /* joystick bits */
517 writel(val, chip->ba0 + offset); in snd_cs4281_pokeBA0()
522 return readl(chip->ba0 + offset); in snd_cs4281_peekBA0()
535 struct cs4281 *chip = ac97->private_data; in snd_cs4281_ac97_write()
544 * set DCV - will clear when process completed in snd_cs4281_ac97_write()
545 * reset CRW - Write command in snd_cs4281_ac97_write()
546 * set VFRM - valid frame enabled in snd_cs4281_ac97_write()
547 * set ESYN - ASYNC generation enabled in snd_cs4281_ac97_write()
548 * set RSTN - ARST# inactive, AC97 codec not reset in snd_cs4281_ac97_write()
553 BA0_ACCTL_ESYN | (ac97->num ? BA0_ACCTL_TC : 0)); in snd_cs4281_ac97_write()
567 dev_err(chip->card->dev, in snd_cs4281_ac97_write()
574 struct cs4281 *chip = ac97->private_data; in snd_cs4281_ac97_read()
579 volatile int ac97_num = ((volatile struct snd_ac97 *)ac97)->num; in snd_cs4281_ac97_read()
598 * set DCV - will clear when process completed in snd_cs4281_ac97_read()
599 * set CRW - Read command in snd_cs4281_ac97_read()
600 * set VFRM - valid frame enabled in snd_cs4281_ac97_read()
601 * set ESYN - ASYNC generation enabled in snd_cs4281_ac97_read()
602 * set RSTN - ARST# inactive, AC97 codec not reset in snd_cs4281_ac97_read()
628 dev_err(chip->card->dev, in snd_cs4281_ac97_read()
641 * VSTS - Valid Status in snd_cs4281_ac97_read()
648 dev_err(chip->card->dev, in snd_cs4281_ac97_read()
670 struct cs4281_dma *dma = substream->runtime->private_data; in snd_cs4281_trigger()
673 spin_lock(&chip->reg_lock); in snd_cs4281_trigger()
676 dma->valDCR |= BA0_DCR_MSK; in snd_cs4281_trigger()
677 dma->valFCR |= BA0_FCR_FEN; in snd_cs4281_trigger()
680 dma->valDCR &= ~BA0_DCR_MSK; in snd_cs4281_trigger()
681 dma->valFCR &= ~BA0_FCR_FEN; in snd_cs4281_trigger()
685 snd_cs4281_pokeBA0(chip, dma->regDMR, dma->valDMR & ~BA0_DMR_DMA); in snd_cs4281_trigger()
686 dma->valDMR |= BA0_DMR_DMA; in snd_cs4281_trigger()
687 dma->valDCR &= ~BA0_DCR_MSK; in snd_cs4281_trigger()
688 dma->valFCR |= BA0_FCR_FEN; in snd_cs4281_trigger()
692 dma->valDMR &= ~(BA0_DMR_DMA|BA0_DMR_POLL); in snd_cs4281_trigger()
693 dma->valDCR |= BA0_DCR_MSK; in snd_cs4281_trigger()
694 dma->valFCR &= ~BA0_FCR_FEN; in snd_cs4281_trigger()
696 if (dma->regFCR != BA0_FCR0) in snd_cs4281_trigger()
697 dma->valFCR &= ~BA0_FCR_FEN; in snd_cs4281_trigger()
700 spin_unlock(&chip->reg_lock); in snd_cs4281_trigger()
701 return -EINVAL; in snd_cs4281_trigger()
703 snd_cs4281_pokeBA0(chip, dma->regDMR, dma->valDMR); in snd_cs4281_trigger()
704 snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR); in snd_cs4281_trigger()
705 snd_cs4281_pokeBA0(chip, dma->regDCR, dma->valDCR); in snd_cs4281_trigger()
706 spin_unlock(&chip->reg_lock); in snd_cs4281_trigger()
740 dma->valDMR = BA0_DMR_TYPE_SINGLE | BA0_DMR_AUTO | in snd_cs4281_mode()
742 if (runtime->channels == 1) in snd_cs4281_mode()
743 dma->valDMR |= BA0_DMR_MONO; in snd_cs4281_mode()
744 if (snd_pcm_format_unsigned(runtime->format) > 0) in snd_cs4281_mode()
745 dma->valDMR |= BA0_DMR_USIGN; in snd_cs4281_mode()
746 if (snd_pcm_format_big_endian(runtime->format) > 0) in snd_cs4281_mode()
747 dma->valDMR |= BA0_DMR_BEND; in snd_cs4281_mode()
748 switch (snd_pcm_format_width(runtime->format)) { in snd_cs4281_mode()
749 case 8: dma->valDMR |= BA0_DMR_SIZE8; in snd_cs4281_mode()
750 if (runtime->channels == 1) in snd_cs4281_mode()
751 dma->valDMR |= BA0_DMR_SWAPC; in snd_cs4281_mode()
753 case 32: dma->valDMR |= BA0_DMR_SIZE20; break; in snd_cs4281_mode()
755 dma->frag = 0; /* for workaround */ in snd_cs4281_mode()
756 dma->valDCR = BA0_DCR_TCIE | BA0_DCR_MSK; in snd_cs4281_mode()
757 if (runtime->buffer_size != runtime->period_size) in snd_cs4281_mode()
758 dma->valDCR |= BA0_DCR_HTCIE; in snd_cs4281_mode()
760 snd_cs4281_pokeBA0(chip, dma->regDBA, runtime->dma_addr); in snd_cs4281_mode()
761 snd_cs4281_pokeBA0(chip, dma->regDBC, runtime->buffer_size - 1); in snd_cs4281_mode()
762 rec_mono = (chip->dma[1].valDMR & BA0_DMR_MONO) == BA0_DMR_MONO; in snd_cs4281_mode()
763 snd_cs4281_pokeBA0(chip, BA0_SRCSA, (chip->src_left_play_slot << 0) | in snd_cs4281_mode()
764 (chip->src_right_play_slot << 8) | in snd_cs4281_mode()
765 (chip->src_left_rec_slot << 16) | in snd_cs4281_mode()
766 ((rec_mono ? 31 : chip->src_right_rec_slot) << 24)); in snd_cs4281_mode()
770 if (dma->left_slot == chip->src_left_play_slot) { in snd_cs4281_mode()
771 unsigned int val = snd_cs4281_rate(runtime->rate, NULL); in snd_cs4281_mode()
772 snd_BUG_ON(dma->right_slot != chip->src_right_play_slot); in snd_cs4281_mode()
776 if (dma->left_slot == chip->src_left_rec_slot) { in snd_cs4281_mode()
777 unsigned int val = snd_cs4281_rate(runtime->rate, NULL); in snd_cs4281_mode()
778 snd_BUG_ON(dma->right_slot != chip->src_right_rec_slot); in snd_cs4281_mode()
784 if (dma->regFCR == BA0_FCR0) in snd_cs4281_mode()
785 snd_cs4281_pokeBA0(chip, dma->regFCR, snd_cs4281_peekBA0(chip, dma->regFCR) & ~BA0_FCR_FEN); in snd_cs4281_mode()
787 dma->valFCR = BA0_FCR_LS(dma->left_slot) | in snd_cs4281_mode()
788 BA0_FCR_RS(capture && (dma->valDMR & BA0_DMR_MONO) ? 31 : dma->right_slot) | in snd_cs4281_mode()
790 BA0_FCR_OF(dma->fifo_offset); in snd_cs4281_mode()
791 snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR | (capture ? BA0_FCR_PSH : 0)); in snd_cs4281_mode()
793 if (dma->regFCR == BA0_FCR0) in snd_cs4281_mode()
794 snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR | BA0_FCR_FEN); in snd_cs4281_mode()
796 snd_cs4281_pokeBA0(chip, dma->regFSIC, 0); in snd_cs4281_mode()
812 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_playback_prepare()
813 struct cs4281_dma *dma = runtime->private_data; in snd_cs4281_playback_prepare()
816 spin_lock_irq(&chip->reg_lock); in snd_cs4281_playback_prepare()
818 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_playback_prepare()
824 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_capture_prepare()
825 struct cs4281_dma *dma = runtime->private_data; in snd_cs4281_capture_prepare()
828 spin_lock_irq(&chip->reg_lock); in snd_cs4281_capture_prepare()
830 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_capture_prepare()
836 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_pointer()
837 struct cs4281_dma *dma = runtime->private_data; in snd_cs4281_pointer()
841 dev_dbg(chip->card->dev, in snd_cs4281_pointer()
843 snd_cs4281_peekBA0(chip, dma->regDCC), runtime->buffer_size, in snd_cs4281_pointer()
846 return runtime->buffer_size - in snd_cs4281_pointer()
847 snd_cs4281_peekBA0(chip, dma->regDCC) - 1; in snd_cs4281_pointer()
903 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_playback_open()
906 dma = &chip->dma[0]; in snd_cs4281_playback_open()
907 dma->substream = substream; in snd_cs4281_playback_open()
908 dma->left_slot = 0; in snd_cs4281_playback_open()
909 dma->right_slot = 1; in snd_cs4281_playback_open()
910 runtime->private_data = dma; in snd_cs4281_playback_open()
911 runtime->hw = snd_cs4281_playback; in snd_cs4281_playback_open()
913 that although CS4297A rev B reports 18-bit ADC resolution, in snd_cs4281_playback_open()
914 samples are 20-bit */ in snd_cs4281_playback_open()
922 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_capture_open()
925 dma = &chip->dma[1]; in snd_cs4281_capture_open()
926 dma->substream = substream; in snd_cs4281_capture_open()
927 dma->left_slot = 10; in snd_cs4281_capture_open()
928 dma->right_slot = 11; in snd_cs4281_capture_open()
929 runtime->private_data = dma; in snd_cs4281_capture_open()
930 runtime->hw = snd_cs4281_capture; in snd_cs4281_capture_open()
932 that although CS4297A rev B reports 18-bit ADC resolution, in snd_cs4281_capture_open()
933 samples are 20-bit */ in snd_cs4281_capture_open()
940 struct cs4281_dma *dma = substream->runtime->private_data; in snd_cs4281_playback_close()
942 dma->substream = NULL; in snd_cs4281_playback_close()
948 struct cs4281_dma *dma = substream->runtime->private_data; in snd_cs4281_capture_close()
950 dma->substream = NULL; in snd_cs4281_capture_close()
981 err = snd_pcm_new(chip->card, "CS4281", device, 1, 1, &pcm); in snd_cs4281_pcm()
988 pcm->private_data = chip; in snd_cs4281_pcm()
989 pcm->info_flags = 0; in snd_cs4281_pcm()
990 strcpy(pcm->name, "CS4281"); in snd_cs4281_pcm()
991 chip->pcm = pcm; in snd_cs4281_pcm()
994 snd_dma_pci_data(chip->pci), 64*1024, 512*1024); in snd_cs4281_pcm()
1008 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in snd_cs4281_info_volume()
1009 uinfo->count = 2; in snd_cs4281_info_volume()
1010 uinfo->value.integer.min = 0; in snd_cs4281_info_volume()
1011 uinfo->value.integer.max = CS_VOL_MASK; in snd_cs4281_info_volume()
1019 int regL = (kcontrol->private_value >> 16) & 0xffff; in snd_cs4281_get_volume()
1020 int regR = kcontrol->private_value & 0xffff; in snd_cs4281_get_volume()
1023 volL = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regL) & CS_VOL_MASK); in snd_cs4281_get_volume()
1024 volR = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regR) & CS_VOL_MASK); in snd_cs4281_get_volume()
1026 ucontrol->value.integer.value[0] = volL; in snd_cs4281_get_volume()
1027 ucontrol->value.integer.value[1] = volR; in snd_cs4281_get_volume()
1036 int regL = (kcontrol->private_value >> 16) & 0xffff; in snd_cs4281_put_volume()
1037 int regR = kcontrol->private_value & 0xffff; in snd_cs4281_put_volume()
1040 volL = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regL) & CS_VOL_MASK); in snd_cs4281_put_volume()
1041 volR = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regR) & CS_VOL_MASK); in snd_cs4281_put_volume()
1043 if (ucontrol->value.integer.value[0] != volL) { in snd_cs4281_put_volume()
1044 volL = CS_VOL_MASK - (ucontrol->value.integer.value[0] & CS_VOL_MASK); in snd_cs4281_put_volume()
1048 if (ucontrol->value.integer.value[1] != volR) { in snd_cs4281_put_volume()
1049 volR = CS_VOL_MASK - (ucontrol->value.integer.value[1] & CS_VOL_MASK); in snd_cs4281_put_volume()
1056 static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -4650, 150, 0);
1082 struct cs4281 *chip = bus->private_data; in snd_cs4281_mixer_free_ac97_bus()
1083 chip->ac97_bus = NULL; in snd_cs4281_mixer_free_ac97_bus()
1088 struct cs4281 *chip = ac97->private_data; in snd_cs4281_mixer_free_ac97()
1089 if (ac97->num) in snd_cs4281_mixer_free_ac97()
1090 chip->ac97_secondary = NULL; in snd_cs4281_mixer_free_ac97()
1092 chip->ac97 = NULL; in snd_cs4281_mixer_free_ac97()
1097 struct snd_card *card = chip->card; in snd_cs4281_mixer()
1105 if ((err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus)) < 0) in snd_cs4281_mixer()
1107 chip->ac97_bus->private_free = snd_cs4281_mixer_free_ac97_bus; in snd_cs4281_mixer()
1112 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) in snd_cs4281_mixer()
1114 if (chip->dual_codec) { in snd_cs4281_mixer()
1116 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_secondary)) < 0) in snd_cs4281_mixer()
1134 struct cs4281 *chip = entry->private_data; in snd_cs4281_proc_read()
1137 snd_iprintf(buffer, "Spurious half IRQs : %u\n", chip->spurious_dhtc_irq); in snd_cs4281_proc_read()
1138 snd_iprintf(buffer, "Spurious end IRQs : %u\n", chip->spurious_dtc_irq); in snd_cs4281_proc_read()
1146 struct cs4281 *chip = entry->private_data; in snd_cs4281_BA0_read()
1148 if (copy_to_user_fromio(buf, chip->ba0 + pos, count)) in snd_cs4281_BA0_read()
1149 return -EFAULT; in snd_cs4281_BA0_read()
1158 struct cs4281 *chip = entry->private_data; in snd_cs4281_BA1_read()
1160 if (copy_to_user_fromio(buf, chip->ba1 + pos, count)) in snd_cs4281_BA1_read()
1161 return -EFAULT; in snd_cs4281_BA1_read()
1177 if (! snd_card_proc_new(chip->card, "cs4281", &entry)) in snd_cs4281_proc_init()
1179 if (! snd_card_proc_new(chip->card, "cs4281_BA0", &entry)) { in snd_cs4281_proc_init()
1180 entry->content = SNDRV_INFO_CONTENT_DATA; in snd_cs4281_proc_init()
1181 entry->private_data = chip; in snd_cs4281_proc_init()
1182 entry->c.ops = &snd_cs4281_proc_ops_BA0; in snd_cs4281_proc_init()
1183 entry->size = CS4281_BA0_SIZE; in snd_cs4281_proc_init()
1185 if (! snd_card_proc_new(chip->card, "cs4281_BA1", &entry)) { in snd_cs4281_proc_init()
1186 entry->content = SNDRV_INFO_CONTENT_DATA; in snd_cs4281_proc_init()
1187 entry->private_data = chip; in snd_cs4281_proc_init()
1188 entry->c.ops = &snd_cs4281_proc_ops_BA1; in snd_cs4281_proc_init()
1189 entry->size = CS4281_BA1_SIZE; in snd_cs4281_proc_init()
1194 * joystick support
1239 if (axes[jst] == 0xFFFF) axes[jst] = -1; in snd_cs4281_gameport_cooked_read()
1256 return -1; in snd_cs4281_gameport_open()
1265 chip->gameport = gp = gameport_allocate_port(); in snd_cs4281_create_gameport()
1267 dev_err(chip->card->dev, in snd_cs4281_create_gameport()
1269 return -ENOMEM; in snd_cs4281_create_gameport()
1273 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); in snd_cs4281_create_gameport()
1274 gameport_set_dev_parent(gp, &chip->pci->dev); in snd_cs4281_create_gameport()
1275 gp->open = snd_cs4281_gameport_open; in snd_cs4281_create_gameport()
1276 gp->read = snd_cs4281_gameport_read; in snd_cs4281_create_gameport()
1277 gp->trigger = snd_cs4281_gameport_trigger; in snd_cs4281_create_gameport()
1278 gp->cooked_read = snd_cs4281_gameport_cooked_read; in snd_cs4281_create_gameport()
1291 if (chip->gameport) { in snd_cs4281_free_gameport()
1292 gameport_unregister_port(chip->gameport); in snd_cs4281_free_gameport()
1293 chip->gameport = NULL; in snd_cs4281_free_gameport()
1297 static inline int snd_cs4281_create_gameport(struct cs4281 *chip) { return -ENOSYS; } in snd_cs4281_create_gameport()
1305 if (chip->irq >= 0) in snd_cs4281_free()
1306 synchronize_irq(chip->irq); in snd_cs4281_free()
1312 /* Sound System Power Management - Turn Everything OFF */ in snd_cs4281_free()
1314 /* PCI interface - D3 state */ in snd_cs4281_free()
1315 pci_set_power_state(chip->pci, PCI_D3hot); in snd_cs4281_free()
1317 if (chip->irq >= 0) in snd_cs4281_free()
1318 free_irq(chip->irq, chip); in snd_cs4281_free()
1319 iounmap(chip->ba0); in snd_cs4281_free()
1320 iounmap(chip->ba1); in snd_cs4281_free()
1321 pci_release_regions(chip->pci); in snd_cs4281_free()
1322 pci_disable_device(chip->pci); in snd_cs4281_free()
1330 struct cs4281 *chip = device->device_data; in snd_cs4281_dev_free()
1354 return -ENOMEM; in snd_cs4281_create()
1356 spin_lock_init(&chip->reg_lock); in snd_cs4281_create()
1357 chip->card = card; in snd_cs4281_create()
1358 chip->pci = pci; in snd_cs4281_create()
1359 chip->irq = -1; in snd_cs4281_create()
1362 dev_err(card->dev, "invalid dual_codec option %d\n", dual_codec); in snd_cs4281_create()
1365 chip->dual_codec = dual_codec; in snd_cs4281_create()
1372 chip->ba0_addr = pci_resource_start(pci, 0); in snd_cs4281_create()
1373 chip->ba1_addr = pci_resource_start(pci, 1); in snd_cs4281_create()
1375 chip->ba0 = pci_ioremap_bar(pci, 0); in snd_cs4281_create()
1376 chip->ba1 = pci_ioremap_bar(pci, 1); in snd_cs4281_create()
1377 if (!chip->ba0 || !chip->ba1) { in snd_cs4281_create()
1379 return -ENOMEM; in snd_cs4281_create()
1382 if (request_irq(pci->irq, snd_cs4281_interrupt, IRQF_SHARED, in snd_cs4281_create()
1384 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); in snd_cs4281_create()
1386 return -ENOMEM; in snd_cs4281_create()
1388 chip->irq = pci->irq; in snd_cs4281_create()
1424 dev_err(chip->card->dev, in snd_cs4281_chip_init()
1426 return -EIO; in snd_cs4281_chip_init()
1431 * to 4281h. Allows vendor-defined configuration in snd_cs4281_chip_init()
1436 dev_err(chip->card->dev, in snd_cs4281_chip_init()
1438 return -EIO; in snd_cs4281_chip_init()
1441 dev_err(chip->card->dev, in snd_cs4281_chip_init()
1443 return -EIO; in snd_cs4281_chip_init()
1473 if (chip->dual_codec) in snd_cs4281_chip_init()
1480 (chip->dual_codec ? BA0_SERMC_TCID(chip->dual_codec) : BA0_SERMC_TCID(1)) | in snd_cs4281_chip_init()
1504 dev_err(chip->card->dev, "DLLRDY not seen\n"); in snd_cs4281_chip_init()
1505 return -EIO; in snd_cs4281_chip_init()
1530 dev_err(chip->card->dev, in snd_cs4281_chip_init()
1533 return -EIO; in snd_cs4281_chip_init()
1536 if (chip->dual_codec) { in snd_cs4281_chip_init()
1543 dev_info(chip->card->dev, in snd_cs4281_chip_init()
1545 chip->dual_codec = 0; in snd_cs4281_chip_init()
1558 * the codec is pumping ADC data across the AC-link. in snd_cs4281_chip_init()
1572 if (--retry_count > 0) in snd_cs4281_chip_init()
1574 dev_err(chip->card->dev, "never read ISV3 and ISV4 from AC'97\n"); in snd_cs4281_chip_init()
1575 return -EIO; in snd_cs4281_chip_init()
1589 struct cs4281_dma *dma = &chip->dma[tmp]; in snd_cs4281_chip_init()
1590 dma->regDBA = BA0_DBA0 + (tmp * 0x10); in snd_cs4281_chip_init()
1591 dma->regDCA = BA0_DCA0 + (tmp * 0x10); in snd_cs4281_chip_init()
1592 dma->regDBC = BA0_DBC0 + (tmp * 0x10); in snd_cs4281_chip_init()
1593 dma->regDCC = BA0_DCC0 + (tmp * 0x10); in snd_cs4281_chip_init()
1594 dma->regDMR = BA0_DMR0 + (tmp * 8); in snd_cs4281_chip_init()
1595 dma->regDCR = BA0_DCR0 + (tmp * 8); in snd_cs4281_chip_init()
1596 dma->regHDSR = BA0_HDSR0 + (tmp * 4); in snd_cs4281_chip_init()
1597 dma->regFCR = BA0_FCR0 + (tmp * 4); in snd_cs4281_chip_init()
1598 dma->regFSIC = BA0_FSIC0 + (tmp * 4); in snd_cs4281_chip_init()
1599 dma->fifo_offset = tmp * CS4281_FIFO_SIZE; in snd_cs4281_chip_init()
1600 snd_cs4281_pokeBA0(chip, dma->regFCR, in snd_cs4281_chip_init()
1604 BA0_FCR_OF(dma->fifo_offset)); in snd_cs4281_chip_init()
1607 chip->src_left_play_slot = 0; /* AC'97 left PCM playback (3) */ in snd_cs4281_chip_init()
1608 chip->src_right_play_slot = 1; /* AC'97 right PCM playback (4) */ in snd_cs4281_chip_init()
1609 chip->src_left_rec_slot = 10; /* AC'97 left PCM record (3) */ in snd_cs4281_chip_init()
1610 chip->src_right_rec_slot = 11; /* AC'97 right PCM record (4) */ in snd_cs4281_chip_init()
1613 chip->dma[0].valFCR = BA0_FCR_FEN | BA0_FCR_LS(0) | in snd_cs4281_chip_init()
1616 BA0_FCR_OF(chip->dma[0].fifo_offset); in snd_cs4281_chip_init()
1617 snd_cs4281_pokeBA0(chip, chip->dma[0].regFCR, chip->dma[0].valFCR); in snd_cs4281_chip_init()
1618 snd_cs4281_pokeBA0(chip, BA0_SRCSA, (chip->src_left_play_slot << 0) | in snd_cs4281_chip_init()
1619 (chip->src_right_play_slot << 8) | in snd_cs4281_chip_init()
1620 (chip->src_left_rec_slot << 16) | in snd_cs4281_chip_init()
1621 (chip->src_right_rec_slot << 24)); in snd_cs4281_chip_init()
1637 synchronize_irq(chip->irq); in snd_cs4281_chip_init()
1648 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr | BA0_MIDCR_MRST); in snd_cs4281_midi_reset()
1650 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_reset()
1655 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_input_open()
1657 spin_lock_irq(&chip->reg_lock); in snd_cs4281_midi_input_open()
1658 chip->midcr |= BA0_MIDCR_RXE; in snd_cs4281_midi_input_open()
1659 chip->midi_input = substream; in snd_cs4281_midi_input_open()
1660 if (!(chip->uartm & CS4281_MODE_OUTPUT)) { in snd_cs4281_midi_input_open()
1663 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_open()
1665 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_midi_input_open()
1671 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_input_close()
1673 spin_lock_irq(&chip->reg_lock); in snd_cs4281_midi_input_close()
1674 chip->midcr &= ~(BA0_MIDCR_RXE | BA0_MIDCR_RIE); in snd_cs4281_midi_input_close()
1675 chip->midi_input = NULL; in snd_cs4281_midi_input_close()
1676 if (!(chip->uartm & CS4281_MODE_OUTPUT)) { in snd_cs4281_midi_input_close()
1679 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_close()
1681 chip->uartm &= ~CS4281_MODE_INPUT; in snd_cs4281_midi_input_close()
1682 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_midi_input_close()
1688 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_output_open()
1690 spin_lock_irq(&chip->reg_lock); in snd_cs4281_midi_output_open()
1691 chip->uartm |= CS4281_MODE_OUTPUT; in snd_cs4281_midi_output_open()
1692 chip->midcr |= BA0_MIDCR_TXE; in snd_cs4281_midi_output_open()
1693 chip->midi_output = substream; in snd_cs4281_midi_output_open()
1694 if (!(chip->uartm & CS4281_MODE_INPUT)) { in snd_cs4281_midi_output_open()
1697 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_open()
1699 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_midi_output_open()
1705 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_output_close()
1707 spin_lock_irq(&chip->reg_lock); in snd_cs4281_midi_output_close()
1708 chip->midcr &= ~(BA0_MIDCR_TXE | BA0_MIDCR_TIE); in snd_cs4281_midi_output_close()
1709 chip->midi_output = NULL; in snd_cs4281_midi_output_close()
1710 if (!(chip->uartm & CS4281_MODE_INPUT)) { in snd_cs4281_midi_output_close()
1713 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_close()
1715 chip->uartm &= ~CS4281_MODE_OUTPUT; in snd_cs4281_midi_output_close()
1716 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_midi_output_close()
1723 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_input_trigger()
1725 spin_lock_irqsave(&chip->reg_lock, flags); in snd_cs4281_midi_input_trigger()
1727 if ((chip->midcr & BA0_MIDCR_RIE) == 0) { in snd_cs4281_midi_input_trigger()
1728 chip->midcr |= BA0_MIDCR_RIE; in snd_cs4281_midi_input_trigger()
1729 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_trigger()
1732 if (chip->midcr & BA0_MIDCR_RIE) { in snd_cs4281_midi_input_trigger()
1733 chip->midcr &= ~BA0_MIDCR_RIE; in snd_cs4281_midi_input_trigger()
1734 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_trigger()
1737 spin_unlock_irqrestore(&chip->reg_lock, flags); in snd_cs4281_midi_input_trigger()
1743 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_output_trigger()
1746 spin_lock_irqsave(&chip->reg_lock, flags); in snd_cs4281_midi_output_trigger()
1748 if ((chip->midcr & BA0_MIDCR_TIE) == 0) { in snd_cs4281_midi_output_trigger()
1749 chip->midcr |= BA0_MIDCR_TIE; in snd_cs4281_midi_output_trigger()
1751 while ((chip->midcr & BA0_MIDCR_TIE) && in snd_cs4281_midi_output_trigger()
1754 chip->midcr &= ~BA0_MIDCR_TIE; in snd_cs4281_midi_output_trigger()
1759 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_trigger()
1762 if (chip->midcr & BA0_MIDCR_TIE) { in snd_cs4281_midi_output_trigger()
1763 chip->midcr &= ~BA0_MIDCR_TIE; in snd_cs4281_midi_output_trigger()
1764 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_trigger()
1767 spin_unlock_irqrestore(&chip->reg_lock, flags); in snd_cs4281_midi_output_trigger()
1789 if ((err = snd_rawmidi_new(chip->card, "CS4281", device, 1, 1, &rmidi)) < 0) in snd_cs4281_midi()
1791 strcpy(rmidi->name, "CS4281"); in snd_cs4281_midi()
1794 …rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | SNDRV_RAWMIDI_INFO_INPUT | SNDRV_RAWMIDI_INFO_DUP… in snd_cs4281_midi()
1795 rmidi->private_data = chip; in snd_cs4281_midi()
1796 chip->rmidi = rmidi; in snd_cs4281_midi()
1821 cdma = &chip->dma[dma]; in snd_cs4281_interrupt()
1822 spin_lock(&chip->reg_lock); in snd_cs4281_interrupt()
1824 val = snd_cs4281_peekBA0(chip, cdma->regHDSR); in snd_cs4281_interrupt()
1827 cdma->frag++; in snd_cs4281_interrupt()
1828 if ((val & BA0_HDSR_DHTC) && !(cdma->frag & 1)) { in snd_cs4281_interrupt()
1829 cdma->frag--; in snd_cs4281_interrupt()
1830 chip->spurious_dhtc_irq++; in snd_cs4281_interrupt()
1831 spin_unlock(&chip->reg_lock); in snd_cs4281_interrupt()
1834 if ((val & BA0_HDSR_DTC) && (cdma->frag & 1)) { in snd_cs4281_interrupt()
1835 cdma->frag--; in snd_cs4281_interrupt()
1836 chip->spurious_dtc_irq++; in snd_cs4281_interrupt()
1837 spin_unlock(&chip->reg_lock); in snd_cs4281_interrupt()
1840 spin_unlock(&chip->reg_lock); in snd_cs4281_interrupt()
1841 snd_pcm_period_elapsed(cdma->substream); in snd_cs4281_interrupt()
1845 if ((status & BA0_HISR_MIDI) && chip->rmidi) { in snd_cs4281_interrupt()
1848 spin_lock(&chip->reg_lock); in snd_cs4281_interrupt()
1851 if ((chip->midcr & BA0_MIDCR_RIE) == 0) in snd_cs4281_interrupt()
1853 snd_rawmidi_receive(chip->midi_input, &c, 1); in snd_cs4281_interrupt()
1856 if ((chip->midcr & BA0_MIDCR_TIE) == 0) in snd_cs4281_interrupt()
1858 if (snd_rawmidi_transmit(chip->midi_output, &c, 1) != 1) { in snd_cs4281_interrupt()
1859 chip->midcr &= ~BA0_MIDCR_TIE; in snd_cs4281_interrupt()
1860 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_interrupt()
1865 spin_unlock(&chip->reg_lock); in snd_cs4281_interrupt()
1882 struct cs4281 *chip = opl3->private_data; in snd_cs4281_opl3_command()
1886 port = chip->ba0 + BA0_B1AP; /* right port */ in snd_cs4281_opl3_command()
1888 port = chip->ba0 + BA0_B0AP; /* left port */ in snd_cs4281_opl3_command()
1890 spin_lock_irqsave(&opl3->reg_lock, flags); in snd_cs4281_opl3_command()
1898 spin_unlock_irqrestore(&opl3->reg_lock, flags); in snd_cs4281_opl3_command()
1911 return -ENODEV; in snd_cs4281_probe()
1914 return -ENOENT; in snd_cs4281_probe()
1917 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, in snd_cs4281_probe()
1926 card->private_data = chip; in snd_cs4281_probe()
1944 opl3->private_data = chip; in snd_cs4281_probe()
1945 opl3->command = snd_cs4281_opl3_command; in snd_cs4281_probe()
1952 strcpy(card->driver, "CS4281"); in snd_cs4281_probe()
1953 strcpy(card->shortname, "Cirrus Logic CS4281"); in snd_cs4281_probe()
1954 sprintf(card->longname, "%s at 0x%lx, irq %d", in snd_cs4281_probe()
1955 card->shortname, in snd_cs4281_probe()
1956 chip->ba0_addr, in snd_cs4281_probe()
1957 chip->irq); in snd_cs4281_probe()
2000 struct cs4281 *chip = card->private_data; in cs4281_suspend()
2005 snd_pcm_suspend_all(chip->pcm); in cs4281_suspend()
2007 snd_ac97_suspend(chip->ac97); in cs4281_suspend()
2008 snd_ac97_suspend(chip->ac97_secondary); in cs4281_suspend()
2020 chip->suspend_regs[i] = snd_cs4281_peekBA0(chip, saved_regs[i]); in cs4281_suspend()
2025 /* Power off FM, Joystick, AC link, */ in cs4281_suspend()
2043 struct cs4281 *chip = card->private_data; in cs4281_resume()
2056 snd_cs4281_pokeBA0(chip, saved_regs[i], chip->suspend_regs[i]); in cs4281_resume()
2058 snd_ac97_resume(chip->ac97); in cs4281_resume()
2059 snd_ac97_resume(chip->ac97_secondary); in cs4281_resume()