Lines Matching +full:multi +full:- +full:word
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30 #include <sound/ak4xxx-adda.h>
41 #define ICEREG(ice, x) ((ice)->port + ICE1712_REG_##x)
45 #define ICE1712_SERR_ASSERT_DS_DMA 0x40 /* disabled SERR# assertion for the DS DMA Ch-C irq ot…
54 #define ICE1712_IRQ_PROPCM 0x10 /* professional multi-track */
55 #define ICE1712_IRQ_FM 0x08 /* FM/MIDI - legacy */
61 #define ICE1712_REG_INDEX 0x03 /* byte - indirect CCIxx regs */
62 #define ICE1712_REG_DATA 0x04 /* byte - indirect CCIxx regs */
75 #define ICE1712_REG_AC97_DATA 0x0a /* word (little endian) */
85 #define ICE1712_REG_CONCAP_ADDR 0x14 /* dword - consumer capture */
86 #define ICE1712_REG_CONCAP_COUNT 0x18 /* word - current/base count */
90 #define ICE1712_REG_TIMER 0x1e /* word */
118 #define ICEDS(ice, x) ((ice)->dmapath_port + ICE1712_DS_##x)
120 #define ICE1712_DS_INTMASK 0x00 /* word - interrupt mask */
121 #define ICE1712_DS_INTSTAT 0x02 /* word - interrupt status */
122 #define ICE1712_DS_DATA 0x04 /* dword - channel data */
123 #define ICE1712_DS_INDEX 0x08 /* dword - channel index */
129 #define ICE1712_DSC_ADDR0 0x00 /* dword - base address 0 */
130 #define ICE1712_DSC_COUNT0 0x01 /* word - count 0 */
131 #define ICE1712_DSC_ADDR1 0x02 /* dword - base address 1 */
132 #define ICE1712_DSC_COUNT1 0x03 /* word - count 1 */
133 #define ICE1712_DSC_CONTROL 0x04 /* byte - control & status */
139 #define ICE1712_16BIT 0x04 /* 16-bit data */
142 #define ICE1712_DSC_RATE 0x05 /* dword - rate */
143 #define ICE1712_DSC_VOLUME 0x06 /* word - volume control */
146 * Professional multi-track direct control registers
149 #define ICEMT(ice, x) ((ice)->profi_port + ICE1712_MT_##x)
151 #define ICE1712_MT_IRQ 0x00 /* byte - interrupt mask */
156 #define ICE1712_MT_RATE 0x01 /* byte - sampling rate select */
158 #define ICE1712_MT_I2S_FORMAT 0x02 /* byte - I2S data format */
159 #define ICE1712_MT_AC97_INDEX 0x04 /* byte - AC'97 index */
160 #define ICE1712_MT_AC97_CMD 0x05 /* byte - AC'97 command & status */
162 #define ICE1712_MT_AC97_DATA 0x06 /* word - AC'97 data */
163 #define ICE1712_MT_PLAYBACK_ADDR 0x10 /* dword - playback address */
164 #define ICE1712_MT_PLAYBACK_SIZE 0x14 /* word - playback size */
165 #define ICE1712_MT_PLAYBACK_COUNT 0x16 /* word - playback count */
166 #define ICE1712_MT_PLAYBACK_CONTROL 0x18 /* byte - control */
170 #define ICE1712_MT_CAPTURE_ADDR 0x20 /* dword - capture address */
171 #define ICE1712_MT_CAPTURE_SIZE 0x24 /* word - capture size */
172 #define ICE1712_MT_CAPTURE_COUNT 0x26 /* word - capture count */
173 #define ICE1712_MT_CAPTURE_CONTROL 0x28 /* byte - control */
175 #define ICE1712_MT_ROUTE_PSDOUT03 0x30 /* word */
176 #define ICE1712_MT_ROUTE_SPDOUT 0x32 /* word */
178 #define ICE1712_MT_MONITOR_VOLUME 0x38 /* word */
199 /* PCI[61] AC-Link Configuration */
201 #define ICE1712_CFG_AC97_PACKED 0x01 /* split or packed mode - AC'97 */
205 #define ICE1712_CFG_I2S_RESMASK 0x30 /* resolution mask, 16,18,20,24-bit */
228 unsigned int subvendor; /* PCI[2c-2f] */
262 #define ice_has_con_ac97(ice) (!((ice)->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97))
340 unsigned int has_spdif:1; /* VT1720/4 - has SPDIF I/O */
341 unsigned int force_pdma4:1; /* VT1720/4 - PDMA4 as non-spdif */
342 unsigned int force_rdma1:1; /* VT1720/4 - RDMA1 as non-spdif */
352 const struct snd_pcm_hw_constraint_list *hw_rates; /* card-specific rate constraints */
374 /* misc operators - move to another place? */
380 /* other board-specific data */
411 ice->gpio.set_dir(ice, bits); in snd_ice1712_gpio_set_dir()
416 return ice->gpio.get_dir(ice); in snd_ice1712_gpio_get_dir()
421 ice->gpio.set_mask(ice, bits); in snd_ice1712_gpio_set_mask()
426 ice->gpio.set_data(ice, val); in snd_ice1712_gpio_write()
431 return ice->gpio.get_data(ice); in snd_ice1712_gpio_read()
441 mutex_lock(&ice->gpio_mutex); in snd_ice1712_save_gpio_status()
442 ice->gpio.saved[0] = ice->gpio.direction; in snd_ice1712_save_gpio_status()
443 ice->gpio.saved[1] = ice->gpio.write_mask; in snd_ice1712_save_gpio_status()
448 ice->gpio.set_dir(ice, ice->gpio.saved[0]); in snd_ice1712_restore_gpio_status()
449 ice->gpio.set_mask(ice, ice->gpio.saved[1]); in snd_ice1712_restore_gpio_status()
450 ice->gpio.direction = ice->gpio.saved[0]; in snd_ice1712_restore_gpio_status()
451 ice->gpio.write_mask = ice->gpio.saved[1]; in snd_ice1712_restore_gpio_status()
452 mutex_unlock(&ice->gpio_mutex); in snd_ice1712_restore_gpio_status()
472 ice->gpio.direction |= mask; in snd_ice1712_gpio_write_bits()
473 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); in snd_ice1712_gpio_write_bits()
483 ice->gpio.direction &= ~mask; in snd_ice1712_gpio_read_bits()
484 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); in snd_ice1712_gpio_read_bits()