Lines Matching +full:switch +full:- +full:mode
63 /* Input - Gain, Select and Filter Registers */
76 /* Output - Gain, Select and Filter Registers */
249 u8 mode; /* 0 = slave, 1 = master */ member
254 /* for MASTER mode, fs = 44.1Khz and its harmonics */
264 /* for MASTER mode, fs = 48Khz and its harmonics */
274 /* for SLAVE mode with SRM */
293 0x0, 0x10, TLV_DB_SCALE_ITEM(-5400, 0, 0),
294 /* -54dB to 15dB */
295 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
300 /* -78dB to 12dB */
301 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
310 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
311 static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
312 static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
313 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -5700, 100, 0);
314 static const DECLARE_TLV_DB_SCALE(lineout_vol_tlv, -4800, 100, 0);
315 static const DECLARE_TLV_DB_SCALE(alc_threshold_tlv, -9450, 150, 0);
329 /* ADC and DAC voice mode (8kHz) high pass cutoff value */
488 if (ucontrol->value.integer.value[0]) { in da9055_put_alc_sw()
490 * While enabling ALC (or ALC sync mode), calibration of the DC in da9055_put_alc_sw()
523 offset_l = -avg_left_data; in da9055_put_alc_sw()
524 offset_r = -avg_right_data; in da9055_put_alc_sw()
574 SOC_SINGLE("DAC EQ Switch", DA9055_DAC_FILTERS4, 7, 1, 0),
586 /* High Pass Filter and Voice Mode controls */
587 SOC_SINGLE("ADC HPF Switch", DA9055_ADC_FILTERS1, 7, 1, 0),
589 SOC_SINGLE("ADC Voice Mode Switch", DA9055_ADC_FILTERS1, 3, 1, 0),
592 SOC_SINGLE("DAC HPF Switch", DA9055_DAC_FILTERS1, 7, 1, 0),
594 SOC_SINGLE("DAC Voice Mode Switch", DA9055_DAC_FILTERS1, 3, 1, 0),
598 SOC_DOUBLE_R("Mic Switch", DA9055_MIC_L_CTRL,
600 SOC_DOUBLE_R("Aux Switch", DA9055_AUX_L_CTRL,
602 SOC_DOUBLE_R("Mixin PGA Switch", DA9055_MIXIN_L_CTRL,
604 SOC_DOUBLE_R("ADC Switch", DA9055_ADC_L_CTRL,
606 SOC_DOUBLE_R("Headphone Switch", DA9055_HP_L_CTRL,
608 SOC_SINGLE("Lineout Switch", DA9055_LINE_CTRL, 6, 1, 0),
609 SOC_SINGLE("DAC Soft Mute Switch", DA9055_DAC_FILTERS5, 7, 1, 0),
613 SOC_DOUBLE_R("Aux ZC Switch", DA9055_AUX_L_CTRL,
615 SOC_DOUBLE_R("Mixin PGA ZC Switch", DA9055_MIXIN_L_CTRL,
617 SOC_DOUBLE_R("Headphone ZC Switch", DA9055_HP_L_CTRL,
619 SOC_SINGLE("Lineout ZC Switch", DA9055_LINE_CTRL, 4, 1, 0),
622 SOC_DOUBLE_R("Aux Gain Ramping Switch", DA9055_AUX_L_CTRL,
624 SOC_DOUBLE_R("Mixin Gain Ramping Switch", DA9055_MIXIN_L_CTRL,
626 SOC_DOUBLE_R("ADC Gain Ramping Switch", DA9055_ADC_L_CTRL,
628 SOC_DOUBLE_R("DAC Gain Ramping Switch", DA9055_DAC_L_CTRL,
630 SOC_DOUBLE_R("Headphone Gain Ramping Switch", DA9055_HP_L_CTRL,
632 SOC_SINGLE("Lineout Gain Ramping Switch", DA9055_LINE_CTRL, 5, 1, 0),
636 SOC_SINGLE("DAC NG Switch", DA9055_DAC_NG_CTRL, 7, 1, 0),
650 SOC_DOUBLE_R("DMIC Switch", DA9055_MIXIN_L_SELECT,
654 SOC_DOUBLE_EXT("ALC Switch", DA9055_ALC_CTRL1, 3, 7, 1, 0,
656 SOC_SINGLE_EXT("ALC Sync Mode Switch", DA9055_ALC_CTRL1, 1, 1, 0,
658 SOC_SINGLE("ALC Offset Switch", DA9055_ALC_CTRL1, 0, 1, 0),
659 SOC_SINGLE("ALC Anticlip Mode Switch", DA9055_ALC_ANTICLIP_CTRL,
706 SOC_DAPM_SINGLE("Aux Left Switch", DA9055_MIXIN_L_SELECT, 0, 1, 0),
707 SOC_DAPM_SINGLE("Mic Left Switch", DA9055_MIXIN_L_SELECT, 1, 1, 0),
708 SOC_DAPM_SINGLE("Mic Right Switch", DA9055_MIXIN_L_SELECT, 2, 1, 0),
713 SOC_DAPM_SINGLE("Aux Right Switch", DA9055_MIXIN_R_SELECT, 0, 1, 0),
714 SOC_DAPM_SINGLE("Mic Right Switch", DA9055_MIXIN_R_SELECT, 1, 1, 0),
715 SOC_DAPM_SINGLE("Mic Left Switch", DA9055_MIXIN_R_SELECT, 2, 1, 0),
716 SOC_DAPM_SINGLE("Mixin Left Switch", DA9055_MIXIN_R_SELECT, 3, 1, 0),
729 SOC_DAPM_SINGLE("Aux Left Switch", DA9055_MIXOUT_L_SELECT, 0, 1, 0),
730 SOC_DAPM_SINGLE("Mixin Left Switch", DA9055_MIXOUT_L_SELECT, 1, 1, 0),
731 SOC_DAPM_SINGLE("Mixin Right Switch", DA9055_MIXOUT_L_SELECT, 2, 1, 0),
732 SOC_DAPM_SINGLE("DAC Left Switch", DA9055_MIXOUT_L_SELECT, 3, 1, 0),
733 SOC_DAPM_SINGLE("Aux Left Invert Switch", DA9055_MIXOUT_L_SELECT,
735 SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA9055_MIXOUT_L_SELECT,
737 SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA9055_MIXOUT_L_SELECT,
743 SOC_DAPM_SINGLE("Aux Right Switch", DA9055_MIXOUT_R_SELECT, 0, 1, 0),
744 SOC_DAPM_SINGLE("Mixin Right Switch", DA9055_MIXOUT_R_SELECT, 1, 1, 0),
745 SOC_DAPM_SINGLE("Mixin Left Switch", DA9055_MIXOUT_R_SELECT, 2, 1, 0),
746 SOC_DAPM_SINGLE("DAC Right Switch", DA9055_MIXOUT_R_SELECT, 3, 1, 0),
747 SOC_DAPM_SINGLE("Aux Right Invert Switch", DA9055_MIXOUT_R_SELECT,
749 SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA9055_MIXOUT_R_SELECT,
751 SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA9055_MIXOUT_R_SELECT,
757 SOC_DAPM_SINGLE("Switch", DA9055_HP_L_CTRL, 3, 1, 0);
760 SOC_DAPM_SINGLE("Switch", DA9055_HP_R_CTRL, 3, 1, 0);
764 SOC_DAPM_SINGLE("Switch", DA9055_LINE_CTRL, 3, 1, 0);
871 {"In Mixer Left", "Mic Left Switch", "Mic Left"},
872 {"In Mixer Left", "Mic Right Switch", "Mic Right"},
873 {"In Mixer Left", "Aux Left Switch", "Aux Left"},
875 {"In Mixer Right", "Mic Right Switch", "Mic Right"},
876 {"In Mixer Right", "Mic Left Switch", "Mic Left"},
877 {"In Mixer Right", "Aux Right Switch", "Aux Right"},
878 {"In Mixer Right", "Mixin Left Switch", "MIXIN Left"},
906 {"Out Mixer Left", "Aux Left Switch", "Aux Left"},
907 {"Out Mixer Left", "Mixin Left Switch", "MIXIN Left"},
908 {"Out Mixer Left", "Mixin Right Switch", "MIXIN Right"},
909 {"Out Mixer Left", "Aux Left Invert Switch", "Aux Left"},
910 {"Out Mixer Left", "Mixin Left Invert Switch", "MIXIN Left"},
911 {"Out Mixer Left", "Mixin Right Invert Switch", "MIXIN Right"},
912 {"Out Mixer Left", "DAC Left Switch", "DAC Left"},
914 {"Out Mixer Right", "Aux Right Switch", "Aux Right"},
915 {"Out Mixer Right", "Mixin Right Switch", "MIXIN Right"},
916 {"Out Mixer Right", "Mixin Left Switch", "MIXIN Left"},
917 {"Out Mixer Right", "Aux Right Invert Switch", "Aux Right"},
918 {"Out Mixer Right", "Mixin Right Invert Switch", "MIXIN Right"},
919 {"Out Mixer Right", "Mixin Left Invert Switch", "MIXIN Left"},
920 {"Out Mixer Right", "DAC Right Switch", "DAC Right"},
923 {"Headphone Left Enable", "Switch", "MIXOUT Left"},
929 {"Headphone Right Enable", "Switch", "MIXOUT Right"},
935 {"Lineout Enable", "Switch", "MIXOUT Right"},
1027 switch (reg) { in da9055_volatile_register()
1055 struct snd_soc_component *component = dai->component; in da9055_hw_params()
1060 switch (params_width(params)) { in da9055_hw_params()
1074 return -EINVAL; in da9055_hw_params()
1081 switch (params_rate(params)) { in da9055_hw_params()
1123 return -EINVAL; in da9055_hw_params()
1126 if (da9055->mclk_rate) { in da9055_hw_params()
1127 /* PLL Mode, Write actual FS */ in da9055_hw_params()
1131 * Non-PLL Mode in da9055_hw_params()
1140 if (da9055->mclk_rate && (da9055->mclk_rate != sysclk)) { in da9055_hw_params()
1141 /* PLL Mode */ in da9055_hw_params()
1142 if (!da9055->master) { in da9055_hw_params()
1143 /* PLL slave mode, enable PLL and also SRM */ in da9055_hw_params()
1148 /* PLL master mode, only enable PLL */ in da9055_hw_params()
1153 /* Non PLL Mode, disable PLL */ in da9055_hw_params()
1160 /* Set DAI mode and Format */
1163 struct snd_soc_component *component = codec_dai->component; in da9055_set_dai_fmt()
1165 u8 aif_clk_mode, aif_ctrl, mode; in da9055_set_dai_fmt() local
1167 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { in da9055_set_dai_fmt()
1169 /* DA9055 in I2S Master Mode */ in da9055_set_dai_fmt()
1170 mode = 1; in da9055_set_dai_fmt()
1174 /* DA9055 in I2S Slave Mode */ in da9055_set_dai_fmt()
1175 mode = 0; in da9055_set_dai_fmt()
1179 return -EINVAL; in da9055_set_dai_fmt()
1182 /* Don't allow change of mode if PLL is enabled */ in da9055_set_dai_fmt()
1184 (da9055->master != mode)) in da9055_set_dai_fmt()
1185 return -EINVAL; in da9055_set_dai_fmt()
1187 da9055->master = mode; in da9055_set_dai_fmt()
1190 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { in da9055_set_dai_fmt()
1204 return -EINVAL; in da9055_set_dai_fmt()
1220 struct snd_soc_component *component = dai->component; in da9055_mute()
1243 struct snd_soc_component *component = codec_dai->component; in da9055_set_dai_sysclk()
1246 switch (clk_id) { in da9055_set_dai_sysclk()
1248 switch (freq) { in da9055_set_dai_sysclk()
1258 da9055->mclk_rate = freq; in da9055_set_dai_sysclk()
1261 dev_err(codec_dai->dev, "Unsupported MCLK value %d\n", in da9055_set_dai_sysclk()
1263 return -EINVAL; in da9055_set_dai_sysclk()
1267 dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id); in da9055_set_dai_sysclk()
1268 return -EINVAL; in da9055_set_dai_sysclk()
1286 struct snd_soc_component *component = codec_dai->component; in da9055_set_dai_pll()
1294 /* In slave mode, there is only one set of divisors */ in da9055_set_dai_pll()
1295 if (!da9055->master && (fout != 2822400)) in da9055_set_dai_pll()
1300 /* Check fref, mode and fout */ in da9055_set_dai_pll()
1302 (da9055->master == da9055_pll_div[cnt].mode) && in da9055_set_dai_pll()
1321 dev_err(codec_dai->dev, "Error in setting up PLL\n"); in da9055_set_dai_pll()
1322 return -EINVAL; in da9055_set_dai_pll()
1335 .name = "da9055-hifi",
1359 switch (level) { in da9055_set_bias_level()
1429 if (da9055->pdata) { in da9055_probe()
1431 if (da9055->pdata->micbias_source) { in da9055_probe()
1440 switch (da9055->pdata->micbias) { in da9055_probe()
1447 (da9055->pdata->micbias) << 4); in da9055_probe()
1483 struct da9055_platform_data *pdata = dev_get_platdata(&i2c->dev); in da9055_i2c_probe()
1486 da9055 = devm_kzalloc(&i2c->dev, sizeof(struct da9055_priv), in da9055_i2c_probe()
1489 return -ENOMEM; in da9055_i2c_probe()
1492 da9055->pdata = pdata; in da9055_i2c_probe()
1496 da9055->regmap = devm_regmap_init_i2c(i2c, &da9055_regmap_config); in da9055_i2c_probe()
1497 if (IS_ERR(da9055->regmap)) { in da9055_i2c_probe()
1498 ret = PTR_ERR(da9055->regmap); in da9055_i2c_probe()
1499 dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret); in da9055_i2c_probe()
1503 ret = devm_snd_soc_register_component(&i2c->dev, in da9055_i2c_probe()
1506 dev_err(&i2c->dev, "Failed to register da9055 component: %d\n", in da9055_i2c_probe()
1520 { "da9055-codec", 0 },
1526 { .compatible = "dlg,da9055-codec", },
1534 .name = "da9055-codec",