Lines Matching +full:spk +full:- +full:mute
2 * max98088.c -- MAX98088 ALSA SoC Audio driver
90 { 0x2b, 0x00 }, /* 2B left SPK mixer */
91 { 0x2c, 0x00 }, /* 2C right SPK mixer */
92 { 0x2d, 0x00 }, /* 2D SPK control */
109 { 0x3d, 0x00 }, /* 3D left SPK volume */
110 { 0x3e, 0x00 }, /* 3E right SPK volume */
337 "Off", "100Hz", "400Hz", "600Hz", "800Hz", "1000Hz", "200-400Hz",
338 "400-600Hz", "400-800Hz",
385 unsigned int sel = ucontrol->value.integer.value[0]; in max98088_mic1pre_set()
387 max98088->mic1pre = sel; in max98088_mic1pre_set()
400 ucontrol->value.integer.value[0] = max98088->mic1pre; in max98088_mic1pre_get()
409 unsigned int sel = ucontrol->value.integer.value[0]; in max98088_mic2pre_set()
411 max98088->mic2pre = sel; in max98088_mic2pre_set()
424 ucontrol->value.integer.value[0] = max98088->mic2pre; in max98088_mic2pre_get()
434 0, 6, TLV_DB_SCALE_ITEM(-6700, 400, 0),
435 7, 14, TLV_DB_SCALE_ITEM(-4000, 300, 0),
436 15, 21, TLV_DB_SCALE_ITEM(-1700, 200, 0),
437 22, 27, TLV_DB_SCALE_ITEM(-400, 100, 0),
442 0, 6, TLV_DB_SCALE_ITEM(-6200, 400, 0),
443 7, 14, TLV_DB_SCALE_ITEM(-3500, 300, 0),
444 15, 21, TLV_DB_SCALE_ITEM(-1200, 200, 0),
620 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in max98088_mic_event()
625 if (w->reg == M98088_REG_35_LVL_MIC1) { in max98088_mic_event()
626 snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, in max98088_mic_event()
627 (1+max98088->mic1pre)<<M98088_MICPRE_SHIFT); in max98088_mic_event()
629 snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, in max98088_mic_event()
630 (1+max98088->mic2pre)<<M98088_MICPRE_SHIFT); in max98088_mic_event()
634 snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, 0); in max98088_mic_event()
637 return -EINVAL; in max98088_mic_event()
644 * The line inputs are 2-channel stereo inputs with the left
650 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in max98088_line_pga()
655 return -EINVAL; in max98088_line_pga()
659 state = &max98088->ina_state; in max98088_line_pga()
662 state = &max98088->inb_state; in max98088_line_pga()
665 return -EINVAL; in max98088_line_pga()
671 snd_soc_component_update_bits(component, w->reg, in max98088_line_pga()
672 (1 << w->shift), (1 << w->shift)); in max98088_line_pga()
677 snd_soc_component_update_bits(component, w->reg, in max98088_line_pga()
678 (1 << w->shift), 0); in max98088_line_pga()
682 return -EINVAL; in max98088_line_pga()
731 SND_SOC_DAPM_PGA("SPK Left Out", M98088_REG_4D_PWR_EN_OUT,
733 SND_SOC_DAPM_PGA("SPK Right Out", M98088_REG_4D_PWR_EN_OUT,
752 SND_SOC_DAPM_MIXER("Left SPK Mixer", SND_SOC_NOPM, 0, 0,
756 SND_SOC_DAPM_MIXER("Right SPK Mixer", SND_SOC_NOPM, 0, 0,
843 {"Left SPK Mixer", "Left DAC1 Switch", "DACL1"},
844 {"Left SPK Mixer", "Left DAC2 Switch", "DACL2"},
845 {"Left SPK Mixer", "Right DAC1 Switch", "DACR1"},
846 {"Left SPK Mixer", "Right DAC2 Switch", "DACR2"},
847 {"Left SPK Mixer", "MIC1 Switch", "MIC1 Input"},
848 {"Left SPK Mixer", "MIC2 Switch", "MIC2 Input"},
849 {"Left SPK Mixer", "INA1 Switch", "INA1 Input"},
850 {"Left SPK Mixer", "INA2 Switch", "INA2 Input"},
851 {"Left SPK Mixer", "INB1 Switch", "INB1 Input"},
852 {"Left SPK Mixer", "INB2 Switch", "INB2 Input"},
855 {"Right SPK Mixer", "Left DAC1 Switch", "DACL1"},
856 {"Right SPK Mixer", "Left DAC2 Switch", "DACL2"},
857 {"Right SPK Mixer", "Right DAC1 Switch", "DACR1"},
858 {"Right SPK Mixer", "Right DAC2 Switch", "DACR2"},
859 {"Right SPK Mixer", "MIC1 Switch", "MIC1 Input"},
860 {"Right SPK Mixer", "MIC2 Switch", "MIC2 Input"},
861 {"Right SPK Mixer", "INA1 Switch", "INA1 Input"},
862 {"Right SPK Mixer", "INA2 Switch", "INA2 Input"},
863 {"Right SPK Mixer", "INB1 Switch", "INB1 Input"},
864 {"Right SPK Mixer", "INB2 Switch", "INB2 Input"},
892 {"SPK Left Out", NULL, "Left SPK Mixer"},
893 {"SPK Right Out", NULL, "Right SPK Mixer"},
899 {"SPKL", NULL, "SPK Left Out"},
900 {"SPKR", NULL, "SPK Right Out"},
959 return -EINVAL; in rate_value()
966 struct snd_soc_component *component = dai->component; in max98088_dai1_hw_params()
973 cdata = &max98088->dai[0]; in max98088_dai1_hw_params()
987 return -EINVAL; in max98088_dai1_hw_params()
993 return -EINVAL; in max98088_dai1_hw_params()
997 cdata->rate = rate; in max98088_dai1_hw_params()
1002 if (max98088->sysclk == 0) { in max98088_dai1_hw_params()
1003 dev_err(component->dev, "Invalid system clock frequency\n"); in max98088_dai1_hw_params()
1004 return -EINVAL; in max98088_dai1_hw_params()
1008 do_div(ni, (unsigned long long int)max98088->sysclk); in max98088_dai1_hw_params()
1033 struct snd_soc_component *component = dai->component; in max98088_dai2_hw_params()
1040 cdata = &max98088->dai[1]; in max98088_dai2_hw_params()
1054 return -EINVAL; in max98088_dai2_hw_params()
1060 return -EINVAL; in max98088_dai2_hw_params()
1064 cdata->rate = rate; in max98088_dai2_hw_params()
1069 if (max98088->sysclk == 0) { in max98088_dai2_hw_params()
1070 dev_err(component->dev, "Invalid system clock frequency\n"); in max98088_dai2_hw_params()
1071 return -EINVAL; in max98088_dai2_hw_params()
1075 do_div(ni, (unsigned long long int)max98088->sysclk); in max98088_dai2_hw_params()
1099 struct snd_soc_component *component = dai->component; in max98088_dai_set_sysclk()
1103 if (freq == max98088->sysclk) in max98088_dai_set_sysclk()
1115 dev_err(component->dev, "Invalid master clock frequency\n"); in max98088_dai_set_sysclk()
1116 return -EINVAL; in max98088_dai_set_sysclk()
1126 dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq); in max98088_dai_set_sysclk()
1128 max98088->sysclk = freq; in max98088_dai_set_sysclk()
1135 struct snd_soc_component *component = codec_dai->component; in max98088_dai1_set_fmt()
1141 cdata = &max98088->dai[0]; in max98088_dai1_set_fmt()
1143 if (fmt != cdata->fmt) { in max98088_dai1_set_fmt()
1144 cdata->fmt = fmt; in max98088_dai1_set_fmt()
1161 dev_err(component->dev, "Clock mode unsupported"); in max98088_dai1_set_fmt()
1162 return -EINVAL; in max98088_dai1_set_fmt()
1172 return -EINVAL; in max98088_dai1_set_fmt()
1188 return -EINVAL; in max98088_dai1_set_fmt()
1196 if (max98088->digmic) in max98088_dai1_set_fmt()
1207 struct snd_soc_component *component = codec_dai->component; in max98088_dai2_set_fmt()
1212 cdata = &max98088->dai[1]; in max98088_dai2_set_fmt()
1214 if (fmt != cdata->fmt) { in max98088_dai2_set_fmt()
1215 cdata->fmt = fmt; in max98088_dai2_set_fmt()
1232 dev_err(component->dev, "Clock mode unsupported"); in max98088_dai2_set_fmt()
1233 return -EINVAL; in max98088_dai2_set_fmt()
1243 return -EINVAL; in max98088_dai2_set_fmt()
1259 return -EINVAL; in max98088_dai2_set_fmt()
1273 static int max98088_dai1_digital_mute(struct snd_soc_dai *codec_dai, int mute) in max98088_dai1_digital_mute() argument
1275 struct snd_soc_component *component = codec_dai->component; in max98088_dai1_digital_mute()
1278 if (mute) in max98088_dai1_digital_mute()
1288 static int max98088_dai2_digital_mute(struct snd_soc_dai *codec_dai, int mute) in max98088_dai2_digital_mute() argument
1290 struct snd_soc_component *component = codec_dai->component; in max98088_dai2_digital_mute()
1293 if (mute) in max98088_dai2_digital_mute()
1317 regcache_sync(max98088->regmap); in max98088_set_bias_level()
1326 regcache_mark_dirty(max98088->regmap); in max98088_set_bias_level()
1389 dev_err(component->dev, "Bad EQ channel name '%s'\n", name); in max98088_get_channel()
1396 struct max98088_pdata *pdata = max98088->pdata; in max98088_setup_eq1()
1401 cdata = &max98088->dai[0]; in max98088_setup_eq1()
1403 if (!pdata || !max98088->eq_textcnt) in max98088_setup_eq1()
1407 fs = cdata->rate; in max98088_setup_eq1()
1408 sel = cdata->eq_sel; in max98088_setup_eq1()
1412 for (i = 0; i < pdata->eq_cfgcnt; i++) { in max98088_setup_eq1()
1413 if (strcmp(pdata->eq_cfg[i].name, max98088->eq_texts[sel]) == 0 && in max98088_setup_eq1()
1414 abs(pdata->eq_cfg[i].rate - fs) < best_val) { in max98088_setup_eq1()
1416 best_val = abs(pdata->eq_cfg[i].rate - fs); in max98088_setup_eq1()
1420 dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n", in max98088_setup_eq1()
1421 pdata->eq_cfg[best].name, in max98088_setup_eq1()
1422 pdata->eq_cfg[best].rate, fs); in max98088_setup_eq1()
1428 coef_set = &pdata->eq_cfg[sel]; in max98088_setup_eq1()
1430 m98088_eq_band(component, 0, 0, coef_set->band1); in max98088_setup_eq1()
1431 m98088_eq_band(component, 0, 1, coef_set->band2); in max98088_setup_eq1()
1432 m98088_eq_band(component, 0, 2, coef_set->band3); in max98088_setup_eq1()
1433 m98088_eq_band(component, 0, 3, coef_set->band4); in max98088_setup_eq1()
1434 m98088_eq_band(component, 0, 4, coef_set->band5); in max98088_setup_eq1()
1443 struct max98088_pdata *pdata = max98088->pdata; in max98088_setup_eq2()
1448 cdata = &max98088->dai[1]; in max98088_setup_eq2()
1450 if (!pdata || !max98088->eq_textcnt) in max98088_setup_eq2()
1454 fs = cdata->rate; in max98088_setup_eq2()
1456 sel = cdata->eq_sel; in max98088_setup_eq2()
1459 for (i = 0; i < pdata->eq_cfgcnt; i++) { in max98088_setup_eq2()
1460 if (strcmp(pdata->eq_cfg[i].name, max98088->eq_texts[sel]) == 0 && in max98088_setup_eq2()
1461 abs(pdata->eq_cfg[i].rate - fs) < best_val) { in max98088_setup_eq2()
1463 best_val = abs(pdata->eq_cfg[i].rate - fs); in max98088_setup_eq2()
1467 dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n", in max98088_setup_eq2()
1468 pdata->eq_cfg[best].name, in max98088_setup_eq2()
1469 pdata->eq_cfg[best].rate, fs); in max98088_setup_eq2()
1475 coef_set = &pdata->eq_cfg[sel]; in max98088_setup_eq2()
1477 m98088_eq_band(component, 1, 0, coef_set->band1); in max98088_setup_eq2()
1478 m98088_eq_band(component, 1, 1, coef_set->band2); in max98088_setup_eq2()
1479 m98088_eq_band(component, 1, 2, coef_set->band3); in max98088_setup_eq2()
1480 m98088_eq_band(component, 1, 3, coef_set->band4); in max98088_setup_eq2()
1481 m98088_eq_band(component, 1, 4, coef_set->band5); in max98088_setup_eq2()
1493 struct max98088_pdata *pdata = max98088->pdata; in max98088_put_eq_enum()
1494 int channel = max98088_get_channel(component, kcontrol->id.name); in max98088_put_eq_enum()
1496 int sel = ucontrol->value.enumerated.item[0]; in max98088_put_eq_enum()
1501 cdata = &max98088->dai[channel]; in max98088_put_eq_enum()
1503 if (sel >= pdata->eq_cfgcnt) in max98088_put_eq_enum()
1504 return -EINVAL; in max98088_put_eq_enum()
1506 cdata->eq_sel = sel; in max98088_put_eq_enum()
1525 int channel = max98088_get_channel(component, kcontrol->id.name); in max98088_get_eq_enum()
1531 cdata = &max98088->dai[channel]; in max98088_get_eq_enum()
1532 ucontrol->value.enumerated.item[0] = cdata->eq_sel; in max98088_get_eq_enum()
1539 struct max98088_pdata *pdata = max98088->pdata; in max98088_handle_eq_pdata()
1547 max98088->eq_enum, in max98088_handle_eq_pdata()
1551 max98088->eq_enum, in max98088_handle_eq_pdata()
1557 cfg = pdata->eq_cfg; in max98088_handle_eq_pdata()
1558 cfgcnt = pdata->eq_cfgcnt; in max98088_handle_eq_pdata()
1563 max98088->eq_textcnt = 0; in max98088_handle_eq_pdata()
1564 max98088->eq_texts = NULL; in max98088_handle_eq_pdata()
1566 for (j = 0; j < max98088->eq_textcnt; j++) { in max98088_handle_eq_pdata()
1567 if (strcmp(cfg[i].name, max98088->eq_texts[j]) == 0) in max98088_handle_eq_pdata()
1571 if (j != max98088->eq_textcnt) in max98088_handle_eq_pdata()
1575 t = krealloc(max98088->eq_texts, in max98088_handle_eq_pdata()
1576 sizeof(char *) * (max98088->eq_textcnt + 1), in max98088_handle_eq_pdata()
1582 t[max98088->eq_textcnt] = cfg[i].name; in max98088_handle_eq_pdata()
1583 max98088->eq_textcnt++; in max98088_handle_eq_pdata()
1584 max98088->eq_texts = t; in max98088_handle_eq_pdata()
1588 max98088->eq_enum.texts = max98088->eq_texts; in max98088_handle_eq_pdata()
1589 max98088->eq_enum.items = max98088->eq_textcnt; in max98088_handle_eq_pdata()
1593 dev_err(component->dev, "Failed to add EQ control: %d\n", ret); in max98088_handle_eq_pdata()
1599 struct max98088_pdata *pdata = max98088->pdata; in max98088_handle_pdata()
1603 dev_dbg(component->dev, "No platform data\n"); in max98088_handle_pdata()
1608 if (pdata->digmic_left_mode) in max98088_handle_pdata()
1611 if (pdata->digmic_right_mode) in max98088_handle_pdata()
1614 max98088->digmic = (regval ? 1 : 0); in max98088_handle_pdata()
1619 regval = ((pdata->receiver_mode) ? M98088_REC_LINEMODE : 0); in max98088_handle_pdata()
1624 if (pdata->eq_cfgcnt) in max98088_handle_pdata()
1634 regcache_mark_dirty(max98088->regmap); in max98088_probe()
1638 max98088->sysclk = (unsigned)-1; in max98088_probe()
1639 max98088->eq_textcnt = 0; in max98088_probe()
1641 cdata = &max98088->dai[0]; in max98088_probe()
1642 cdata->rate = (unsigned)-1; in max98088_probe()
1643 cdata->fmt = (unsigned)-1; in max98088_probe()
1644 cdata->eq_sel = 0; in max98088_probe()
1646 cdata = &max98088->dai[1]; in max98088_probe()
1647 cdata->rate = (unsigned)-1; in max98088_probe()
1648 cdata->fmt = (unsigned)-1; in max98088_probe()
1649 cdata->eq_sel = 0; in max98088_probe()
1651 max98088->ina_state = 0; in max98088_probe()
1652 max98088->inb_state = 0; in max98088_probe()
1653 max98088->ex_mode = 0; in max98088_probe()
1654 max98088->digmic = 0; in max98088_probe()
1655 max98088->mic1pre = 0; in max98088_probe()
1656 max98088->mic2pre = 0; in max98088_probe()
1660 dev_err(component->dev, "Failed to read device revision: %d\n", in max98088_probe()
1664 dev_info(component->dev, "revision %c\n", ret - 0x40 + 'A'); in max98088_probe()
1693 kfree(max98088->eq_texts); in max98088_remove()
1719 max98088 = devm_kzalloc(&i2c->dev, sizeof(struct max98088_priv), in max98088_i2c_probe()
1722 return -ENOMEM; in max98088_i2c_probe()
1724 max98088->regmap = devm_regmap_init_i2c(i2c, &max98088_regmap); in max98088_i2c_probe()
1725 if (IS_ERR(max98088->regmap)) in max98088_i2c_probe()
1726 return PTR_ERR(max98088->regmap); in max98088_i2c_probe()
1728 max98088->devtype = id->driver_data; in max98088_i2c_probe()
1731 max98088->pdata = i2c->dev.platform_data; in max98088_i2c_probe()
1733 ret = devm_snd_soc_register_component(&i2c->dev, in max98088_i2c_probe()