Lines Matching +full:10 +full:- +full:11
2 * rt5670.h -- RT5670 ALSA SoC audio driver
22 /* I/O - Output */
25 /* I/O - Input */
31 /* I/O - ADC/DAC/DMIC */
39 /* Mixer - D-D */
52 /* Mixer - PDM */
61 /* Mixer - ADC */
66 /* Mixer - DAC */
82 /* Format - ADC/DAC */
91 /* Format - TDM Control */
96 /* Function - Analog */
126 /* Function - Digital */
246 #define RT5670_CAPLESS_EN (0x1 << 11)
322 #define RT5670_STO1_ADC_COMP_MASK (0x3 << 10)
323 #define RT5670_STO1_ADC_COMP_SFT 10
344 #define RT5670_ADC_2_SRC_MASK (0x1 << 11)
345 #define RT5670_ADC_2_SRC_SFT 11
346 #define RT5670_ADC_SRC_MASK (0x1 << 10)
347 #define RT5670_ADC_SRC_SFT 10
366 #define RT5670_MONO_ADC_L2_SRC_MASK (0x1 << 11)
367 #define RT5670_MONO_ADC_L2_SRC_SFT 11
368 #define RT5670_MONO_ADC_L_SRC_MASK (0x1 << 10)
369 #define RT5670_MONO_ADC_L_SRC_SFT 10
390 #define RT5670_DAC1_R_SEL_MASK (0x3 << 10)
391 #define RT5670_DAC1_R_SEL_SFT 10
392 #define RT5670_DAC1_R_SEL_IF1 (0x0 << 10)
393 #define RT5670_DAC1_R_SEL_IF2 (0x1 << 10)
394 #define RT5670_DAC1_R_SEL_IF3 (0x2 << 10)
395 #define RT5670_DAC1_R_SEL_IF4 (0x3 << 10)
414 #define RT5670_DAC_L2_STO_L_VOL_MASK (0x1 << 11)
415 #define RT5670_DAC_L2_STO_L_VOL_SFT 11
440 #define RT5670_DAC_L2_MONO_L_VOL_MASK (0x1 << 11)
441 #define RT5670_DAC_L2_MONO_L_VOL_SFT 11
442 #define RT5670_M_DAC_R2_MONO_L (0x1 << 10)
443 #define RT5670_M_DAC_R2_MONO_L_SFT 10
468 #define RT5670_M_STO_R_DAC_R (0x1 << 11)
469 #define RT5670_M_STO_R_DAC_R_SFT 11
470 #define RT5670_STO_R_DAC_R_VOL_MASK (0x1 << 10)
471 #define RT5670_STO_R_DAC_R_VOL_SFT 10
488 #define RT5670_RXDP_SRC_MASK (0x3 << 11)
489 #define RT5670_RXDP_SRC_SFT 11
490 #define RT5670_RXDP_SRC_NOR (0x0 << 11)
491 #define RT5670_RXDP_SRC_DIV2 (0x1 << 11)
492 #define RT5670_RXDP_SRC_DIV3 (0x2 << 11)
516 #define RT5670_IF2_DAC_SEL_MASK (0x3 << 10)
517 #define RT5670_IF2_DAC_SEL_SFT 10
534 #define RT5670_PDM2_L_MASK (0x1 << 11)
535 #define RT5670_PDM2_L_SFT 11
536 #define RT5670_M_PDM2_L (0x1 << 10)
537 #define RT5670_M_PDM2_L_SFT 10
551 #define RT5670_G_IN_L_RM_L_MASK (0x7 << 10)
552 #define RT5670_G_IN_L_RM_L_SFT 10
573 #define RT5670_G_IN_R_RM_R_MASK (0x7 << 10)
574 #define RT5670_G_IN_R_RM_R_SFT 10
619 #define RT5670_G_MONOMIX_MASK (0x1 << 10)
620 #define RT5670_G_MONOMIX_SFT 10
631 #define RT5670_G_BST2_OM_L_MASK (0x7 << 10)
632 #define RT5670_G_BST2_OM_L_SFT 10
643 #define RT5670_G_DAC_L2_OM_L_MASK (0x7 << 10)
644 #define RT5670_G_DAC_L2_OM_L_SFT 10
661 #define RT5670_G_BST2_OM_R_MASK (0x7 << 10)
662 #define RT5670_G_BST2_OM_R_SFT 10
673 #define RT5670_G_DAC_R2_OM_R_MASK (0x7 << 10)
674 #define RT5670_G_DAC_R2_OM_R_SFT 10
697 #define RT5670_G_LOUTMIX_MASK (0x1 << 11)
698 #define RT5670_G_LOUTMIX_SFT 11
707 #define RT5670_PWR_DAC_R1 (0x1 << 11)
708 #define RT5670_PWR_DAC_R1_BIT 11
729 #define RT5670_PWR_DAC_S1F (0x1 << 11)
730 #define RT5670_PWR_DAC_S1F_BIT 11
731 #define RT5670_PWR_DAC_MF_L (0x1 << 10)
732 #define RT5670_PWR_DAC_MF_L_BIT 10
751 #define RT5670_PWR_BG (0x1 << 11)
752 #define RT5670_PWR_BG_BIT 11
771 #define RT5670_PWR_MB1 (0x1 << 11)
772 #define RT5670_PWR_MB1_BIT 11
773 #define RT5670_PWR_MB2 (0x1 << 10)
774 #define RT5670_PWR_MB2_BIT 10
791 #define RT5670_PWR_RM_L (0x1 << 11)
792 #define RT5670_PWR_RM_L_BIT 11
793 #define RT5670_PWR_RM_R (0x1 << 10)
794 #define RT5670_PWR_RM_R_BIT 10
797 #define RT5670_PWR_HV_L (0x1 << 11)
798 #define RT5670_PWR_HV_L_BIT 11
799 #define RT5670_PWR_HV_R (0x1 << 10)
800 #define RT5670_PWR_HV_R_BIT 10
815 #define RT5670_I2S_O_CP_MASK (0x3 << 10)
816 #define RT5670_I2S_O_CP_SFT 10
817 #define RT5670_I2S_O_CP_OFF (0x0 << 10)
818 #define RT5670_I2S_O_CP_U_LAW (0x1 << 10)
819 #define RT5670_I2S_O_CP_A_LAW (0x2 << 10)
863 #define RT5670_I2S_BCLK_MS2_MASK (0x1 << 11)
864 #define RT5670_I2S_BCLK_MS2_SFT 11
865 #define RT5670_I2S_BCLK_MS2_32 (0x0 << 11)
866 #define RT5670_I2S_BCLK_MS2_64 (0x1 << 11)
917 #define RT5670_DAHPF_EN (0x1 << 11)
918 #define RT5670_DAHPF_EN_SFT 11
919 #define RT5670_ADHPF_EN (0x1 << 10)
920 #define RT5670_ADHPF_EN_SFT 10
939 #define RT5670_DMIC_2_DP_MASK (0x1 << 10)
940 #define RT5670_DMIC_2_DP_SFT 10
941 #define RT5670_DMIC_2_DP_GPIO8 (0x0 << 10)
942 #define RT5670_DMIC_2_DP_IN3N (0x1 << 10)
976 #define RT5670_PLL1_SRC_MASK (0x7 << 11)
977 #define RT5670_PLL1_SRC_SFT 11
978 #define RT5670_PLL1_SRC_MCLK (0x0 << 11)
979 #define RT5670_PLL1_SRC_BCLK1 (0x1 << 11)
980 #define RT5670_PLL1_SRC_BCLK2 (0x2 << 11)
981 #define RT5670_PLL1_SRC_BCLK3 (0x3 << 11)
1001 #define RT5670_PLL_M_BP (0x1 << 11)
1002 #define RT5670_PLL_M_BP_SFT 11
1061 #define RT5670_HP_OVCD_MASK (0x1 << 10)
1062 #define RT5670_HP_OVCD_SFT 10
1063 #define RT5670_HP_OVCD_DIS (0x0 << 10)
1064 #define RT5670_HP_OVCD_EN (0x1 << 10)
1087 #define RT5670_CLSD_OM_MASK (0x1 << 11)
1088 #define RT5670_CLSD_OM_SFT 11
1089 #define RT5670_CLSD_OM_MONO (0x0 << 11)
1090 #define RT5670_CLSD_OM_STO (0x1 << 11)
1091 #define RT5670_CLSD_SCH_MASK (0x1 << 10)
1092 #define RT5670_CLSD_SCH_SFT 10
1093 #define RT5670_CLSD_SCH_L (0x0 << 10)
1094 #define RT5670_CLSD_SCH_S (0x1 << 10)
1151 #define RT5670_BPS_MASK (0x1 << 11)
1152 #define RT5670_BPS_SFT 11
1153 #define RT5670_BPS_DIS (0x0 << 11)
1154 #define RT5670_BPS_EN (0x1 << 11)
1155 #define RT5670_FAST_UPDN_MASK (0x1 << 10)
1156 #define RT5670_FAST_UPDN_SFT 10
1157 #define RT5670_FAST_UPDN_DIS (0x0 << 10)
1158 #define RT5670_FAST_UPDN_EN (0x1 << 10)
1195 #define RT5670_OSW_L_MASK (0x1 << 11)
1196 #define RT5670_OSW_L_SFT 11
1197 #define RT5670_OSW_L_DIS (0x0 << 11)
1198 #define RT5670_OSW_L_EN (0x1 << 11)
1199 #define RT5670_OSW_R_MASK (0x1 << 10)
1200 #define RT5670_OSW_R_SFT 10
1201 #define RT5670_OSW_R_DIS (0x0 << 10)
1202 #define RT5670_OSW_R_EN (0x1 << 10)
1242 #define RT5670_MIC1_OVCD_MASK (0x1 << 11)
1243 #define RT5670_MIC1_OVCD_SFT 11
1244 #define RT5670_MIC1_OVCD_DIS (0x0 << 11)
1245 #define RT5670_MIC1_OVCD_EN (0x1 << 11)
1408 #define RT5670_JD_HP_MASK (0x1 << 11)
1409 #define RT5670_JD_HP_SFT 11
1410 #define RT5670_JD_HP_DIS (0x0 << 11)
1411 #define RT5670_JD_HP_EN (0x1 << 11)
1412 #define RT5670_JD_HP_TRG_MASK (0x1 << 10)
1413 #define RT5670_JD_HP_TRG_SFT 10
1414 #define RT5670_JD_HP_TRG_LO (0x0 << 10)
1415 #define RT5670_JD_HP_TRG_HI (0x1 << 10)
1474 #define RT5670_JD_P_MASK (0x1 << 11)
1475 #define RT5670_JD_P_SFT 11
1476 #define RT5670_JD_P_NOR (0x0 << 11)
1477 #define RT5670_JD_P_INV (0x1 << 11)
1478 #define RT5670_OT_P_MASK (0x1 << 10)
1479 #define RT5670_OT_P_SFT 10
1480 #define RT5670_OT_P_NOR (0x0 << 10)
1481 #define RT5670_OT_P_INV (0x1 << 10)
1496 #define RT5670_MB1_OC_STKY_MASK (0x1 << 11)
1497 #define RT5670_MB1_OC_STKY_SFT 11
1498 #define RT5670_MB1_OC_STKY_DIS (0x0 << 11)
1499 #define RT5670_MB1_OC_STKY_EN (0x1 << 11)
1500 #define RT5670_MB2_OC_STKY_MASK (0x1 << 10)
1501 #define RT5670_MB2_OC_STKY_SFT 10
1502 #define RT5670_MB2_OC_STKY_DIS (0x0 << 10)
1503 #define RT5670_MB2_OC_STKY_EN (0x1 << 10)
1531 #define RT5670_GP4_PIN_MASK (0x1 << 11)
1532 #define RT5670_GP4_PIN_SFT 11
1533 #define RT5670_GP4_PIN_GPIO4 (0x0 << 11)
1534 #define RT5670_GP4_PIN_DMIC2_SDA (0x1 << 11)
1535 #define RT5670_DP_SIG_MASK (0x1 << 10)
1536 #define RT5670_DP_SIG_SFT 10
1537 #define RT5670_DP_SIG_TEST (0x0 << 10)
1538 #define RT5670_DP_SIG_AP (0x1 << 10)
1575 #define RT5670_GP4_PF_MASK (0x1 << 11)
1576 #define RT5670_GP4_PF_SFT 11
1577 #define RT5670_GP4_PF_IN (0x0 << 11)
1578 #define RT5670_GP4_PF_OUT (0x1 << 11)
1579 #define RT5670_GP4_OUT_MASK (0x1 << 10)
1580 #define RT5670_GP4_OUT_SFT 10
1581 #define RT5670_GP4_OUT_LO (0x0 << 10)
1582 #define RT5670_GP4_OUT_HI (0x1 << 10)
1703 #define RT5670_3D_1F_MIX_MASK (0x3 << 11)
1704 #define RT5670_3D_1F_MIX_SFT 11
1705 #define RT5670_3D_HP_M_MASK (0x1 << 10)
1706 #define RT5670_3D_HP_M_SFT 10
1707 #define RT5670_3D_HP_M_SUR (0x0 << 10)
1708 #define RT5670_3D_HP_M_FRO (0x1 << 10)
1725 #define RT5670_1ST_HPF_MASK (0x1 << 11)
1726 #define RT5670_1ST_HPF_SFT 11
1727 #define RT5670_1ST_HPF_DIS (0x0 << 11)
1728 #define RT5670_1ST_HPF_EN (0x1 << 11)
1741 #define RT5670_SI_DAC_MASK (0x1 << 11)
1742 #define RT5670_SI_DAC_SFT 11
1743 #define RT5670_SI_DAC_AUTO (0x0 << 11)
1744 #define RT5670_SI_DAC_TEST (0x1 << 11)
1745 #define RT5670_DC_CAL_M_MASK (0x1 << 10)
1746 #define RT5670_DC_CAL_M_SFT 10
1747 #define RT5670_DC_CAL_M_CAL (0x0 << 10)
1748 #define RT5670_DC_CAL_M_NOR (0x1 << 10)
1794 #define RT5670_ZCD_DIG_MASK (0x1 << 11)
1795 #define RT5670_ZCD_DIG_SFT 11
1796 #define RT5670_ZCD_DIG_DIS (0x0 << 11)
1797 #define RT5670_ZCD_DIG_EN (0x1 << 11)
1798 #define RT5670_ZCD_MASK (0x1 << 10)
1799 #define RT5670_ZCD_SFT 10
1800 #define RT5670_ZCD_PD (0x0 << 10)
1801 #define RT5670_ZCD_PU (0x1 << 10)
1820 #define RT5670_TDM_DATA_MODE_SEL (0x1 << 11)
1821 #define RT5670_TDM_DATA_MODE_NOR (0x0 << 11)
1822 #define RT5670_TDM_DATA_MODE_50FS (0x1 << 11)
1844 #define RT5670_WND_FC_NW_MASK (0x3f << 10)
1845 #define RT5670_WND_FC_NW_SFT 10
1864 #define RT5670_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1866 #define RT5670_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
1877 #define RT5670_DP_SPK_MASK (0x1 << 10)
1878 #define RT5670_DP_SPK_SFT 10
1879 #define RT5670_DP_SPK_DIS (0x0 << 10)
1880 #define RT5670_DP_SPK_EN (0x1 << 10)
1917 #define RT5670_IF1_ADC1_IN2_SEL (0x1 << 11)
1918 #define RT5670_IF1_ADC1_IN2_SFT 11
1919 #define RT5670_IF1_ADC2_IN1_SEL (0x1 << 10)
1920 #define RT5670_IF1_ADC2_IN1_SFT 10