33 #include "../common/sst-ipc.h"
36 #include "skl-sst-ipc.h"
221 		ret = skl_ipc_set_dx(&cnl->ipc, CNL_INSTANCE_ID,  in cnl_set_dsp_D0()
248 	ret = skl_ipc_set_dx(&cnl->ipc, CNL_INSTANCE_ID,  in cnl_set_dsp_D3()
305 	struct sst_generic_ipc *ipc = &cnl->ipc;  in cnl_dsp_irq_thread_handler()  local
310 	/* here we handle ipc interrupts only */  in cnl_dsp_irq_thread_handler()
338 		dev_dbg(dsp->dev, "IPC irq: Firmware respond primary:%x",  in cnl_dsp_irq_thread_handler()
340 		dev_dbg(dsp->dev, "IPC irq: Firmware respond extension:%x",  in cnl_dsp_irq_thread_handler()
345 			skl_ipc_process_reply(ipc, header);  in cnl_dsp_irq_thread_handler()
347 			dev_dbg(dsp->dev, "IPC irq: Notification from firmware\n");  in cnl_dsp_irq_thread_handler()
348 			skl_ipc_process_notification(ipc, header);  in cnl_dsp_irq_thread_handler()
366 	schedule_work(&ipc->kwork);  in cnl_dsp_irq_thread_handler()
376 static void cnl_ipc_tx_msg(struct sst_generic_ipc *ipc, struct ipc_message *msg)  in cnl_ipc_tx_msg()  argument
381 		sst_dsp_outbox_write(ipc->dsp, msg->tx_data, msg->tx_size);  in cnl_ipc_tx_msg()
382 	sst_dsp_shim_write_unlocked(ipc->dsp, CNL_ADSP_REG_HIPCIDD,  in cnl_ipc_tx_msg()
384 	sst_dsp_shim_write_unlocked(ipc->dsp, CNL_ADSP_REG_HIPCIDR,  in cnl_ipc_tx_msg()
399 	struct sst_generic_ipc *ipc;  in cnl_ipc_init()  local
402 	ipc = &cnl->ipc;  in cnl_ipc_init()
403 	ipc->dsp = cnl->dsp;  in cnl_ipc_init()
404 	ipc->dev = dev;  in cnl_ipc_init()
406 	ipc->tx_data_max_size = CNL_ADSP_W1_SZ;  in cnl_ipc_init()
407 	ipc->rx_data_max_size = CNL_ADSP_W0_UP_SZ;  in cnl_ipc_init()
409 	err = sst_ipc_init(ipc);  in cnl_ipc_init()
415 	 * ipc registers are different for cnl  in cnl_ipc_init()
417 	ipc->ops.tx_msg = cnl_ipc_tx_msg;  in cnl_ipc_init()
418 	ipc->ops.tx_data_copy = skl_ipc_tx_data_copy;  in cnl_ipc_init()
419 	ipc->ops.is_dsp_busy = cnl_ipc_is_dsp_busy;  in cnl_ipc_init()
490 	cnl_ipc_free(&ctx->ipc);  in cnl_sst_dsp_cleanup()
497 MODULE_DESCRIPTION("Intel Cannonlake IPC driver");