16 #include "axg-fifo.h"
20  * capture frontend DAI. The logic behind this two types of fifo is very
67 static void __dma_enable(struct axg_fifo *fifo,  bool enable)  in __dma_enable()  argument
69 	regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_DMA_EN,  in __dma_enable()
75 	struct axg_fifo *fifo = axg_fifo_data(ss);  in axg_fifo_pcm_trigger()  local
81 		__dma_enable(fifo, true);  in axg_fifo_pcm_trigger()
86 		__dma_enable(fifo, false);  in axg_fifo_pcm_trigger()
97 	struct axg_fifo *fifo = axg_fifo_data(ss);  in axg_fifo_pcm_pointer()  local
101 	regmap_read(fifo->map, FIFO_STATUS2, &addr);  in axg_fifo_pcm_pointer()
110 	struct axg_fifo *fifo = axg_fifo_data(ss);  in axg_fifo_pcm_hw_params()  local
121 	regmap_write(fifo->map, FIFO_START_ADDR, runtime->dma_addr);  in axg_fifo_pcm_hw_params()
122 	regmap_write(fifo->map, FIFO_FINISH_ADDR, end_ptr);  in axg_fifo_pcm_hw_params()
126 	regmap_write(fifo->map, FIFO_INT_ADDR, burst_num);  in axg_fifo_pcm_hw_params()
129 	regmap_update_bits(fifo->map, FIFO_CTRL0,  in axg_fifo_pcm_hw_params()
138 	struct axg_fifo *fifo = axg_fifo_data(ss);  in axg_fifo_pcm_hw_free()  local
141 	regmap_update_bits(fifo->map, FIFO_CTRL0,  in axg_fifo_pcm_hw_free()
147 static void axg_fifo_ack_irq(struct axg_fifo *fifo, u8 mask)  in axg_fifo_ack_irq()  argument
149 	regmap_update_bits(fifo->map, FIFO_CTRL1,  in axg_fifo_ack_irq()
154 	regmap_update_bits(fifo->map, FIFO_CTRL1,  in axg_fifo_ack_irq()
162 	struct axg_fifo *fifo = axg_fifo_data(ss);  in axg_fifo_pcm_irq_block()  local
165 	regmap_read(fifo->map, FIFO_STATUS1, &status);  in axg_fifo_pcm_irq_block()
175 	axg_fifo_ack_irq(fifo, status);  in axg_fifo_pcm_irq_block()
182 	struct axg_fifo *fifo = axg_fifo_data(ss);  in axg_fifo_pcm_open()  local
189 	 * Make sure the buffer and period size are multiple of the FIFO  in axg_fifo_pcm_open()
204 	ret = request_irq(fifo->irq, axg_fifo_pcm_irq_block, 0,  in axg_fifo_pcm_open()
209 	/* Enable pclk to access registers and clock the fifo ip */  in axg_fifo_pcm_open()
210 	ret = clk_prepare_enable(fifo->pclk);  in axg_fifo_pcm_open()
215 	regmap_update_bits(fifo->map, FIFO_CTRL1,  in axg_fifo_pcm_open()
220 	__dma_enable(fifo, false);  in axg_fifo_pcm_open()
223 	regmap_update_bits(fifo->map, FIFO_CTRL0,  in axg_fifo_pcm_open()
227 	axg_fifo_ack_irq(fifo, FIFO_INT_MASK);  in axg_fifo_pcm_open()
230 	ret = reset_control_deassert(fifo->arb);  in axg_fifo_pcm_open()
237 	clk_disable_unprepare(fifo->pclk);  in axg_fifo_pcm_open()
239 	free_irq(fifo->irq, ss);  in axg_fifo_pcm_open()
245 	struct axg_fifo *fifo = axg_fifo_data(ss);  in axg_fifo_pcm_close()  local
249 	ret = reset_control_assert(fifo->arb);  in axg_fifo_pcm_close()
251 	/* Disable fifo ip and register access */  in axg_fifo_pcm_close()
252 	clk_disable_unprepare(fifo->pclk);  in axg_fifo_pcm_close()
255 	free_irq(fifo->irq, ss);  in axg_fifo_pcm_close()
293 	struct axg_fifo *fifo;  in axg_fifo_probe()  local
303 	fifo = devm_kzalloc(dev, sizeof(*fifo), GFP_KERNEL);  in axg_fifo_probe()
304 	if (!fifo)  in axg_fifo_probe()
306 	platform_set_drvdata(pdev, fifo);  in axg_fifo_probe()
313 	fifo->map = devm_regmap_init_mmio(dev, regs, &axg_fifo_regmap_cfg);  in axg_fifo_probe()
314 	if (IS_ERR(fifo->map)) {  in axg_fifo_probe()
316 			PTR_ERR(fifo->map));  in axg_fifo_probe()
317 		return PTR_ERR(fifo->map);  in axg_fifo_probe()
320 	fifo->pclk = devm_clk_get(dev, NULL);  in axg_fifo_probe()
321 	if (IS_ERR(fifo->pclk)) {  in axg_fifo_probe()
322 		if (PTR_ERR(fifo->pclk) != -EPROBE_DEFER)  in axg_fifo_probe()
324 				PTR_ERR(fifo->pclk));  in axg_fifo_probe()
325 		return PTR_ERR(fifo->pclk);  in axg_fifo_probe()
328 	fifo->arb = devm_reset_control_get_exclusive(dev, NULL);  in axg_fifo_probe()
329 	if (IS_ERR(fifo->arb)) {  in axg_fifo_probe()
330 		if (PTR_ERR(fifo->arb) != -EPROBE_DEFER)  in axg_fifo_probe()
332 				PTR_ERR(fifo->arb));  in axg_fifo_probe()
333 		return PTR_ERR(fifo->arb);  in axg_fifo_probe()
336 	fifo->irq = of_irq_get(dev->of_node, 0);  in axg_fifo_probe()
337 	if (fifo->irq <= 0) {  in axg_fifo_probe()
338 		dev_err(dev, "failed to get irq: %d\n", fifo->irq);  in axg_fifo_probe()
339 		return fifo->irq;  in axg_fifo_probe()
347 MODULE_DESCRIPTION("Amlogic AXG fifo driver");