Lines Matching +full:tx +full:- +full:threshold
29 #include <linux/platform_data/asoc-ti-mcbsp.h>
35 void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; in omap_mcbsp_write()
37 if (mcbsp->pdata->reg_size == 2) { in omap_mcbsp_write()
38 ((u16 *)mcbsp->reg_cache)[reg] = (u16)val; in omap_mcbsp_write()
41 ((u32 *)mcbsp->reg_cache)[reg] = val; in omap_mcbsp_write()
48 void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; in omap_mcbsp_read()
50 if (mcbsp->pdata->reg_size == 2) { in omap_mcbsp_read()
52 ((u16 *)mcbsp->reg_cache)[reg]; in omap_mcbsp_read()
55 ((u32 *)mcbsp->reg_cache)[reg]; in omap_mcbsp_read()
61 writel_relaxed(val, mcbsp->st_data->io_base_st + reg); in omap_mcbsp_st_write()
66 return readl_relaxed(mcbsp->st_data->io_base_st + reg); in omap_mcbsp_st_read()
83 dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id); in omap_mcbsp_dump_reg()
84 dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n", in omap_mcbsp_dump_reg()
86 dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n", in omap_mcbsp_dump_reg()
88 dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n", in omap_mcbsp_dump_reg()
90 dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n", in omap_mcbsp_dump_reg()
92 dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n", in omap_mcbsp_dump_reg()
94 dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n", in omap_mcbsp_dump_reg()
96 dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n", in omap_mcbsp_dump_reg()
98 dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n", in omap_mcbsp_dump_reg()
100 dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n", in omap_mcbsp_dump_reg()
102 dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n", in omap_mcbsp_dump_reg()
104 dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n", in omap_mcbsp_dump_reg()
106 dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n", in omap_mcbsp_dump_reg()
108 dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n", in omap_mcbsp_dump_reg()
110 dev_dbg(mcbsp->dev, "***********************\n"); in omap_mcbsp_dump_reg()
119 dev_dbg(mcbsp->dev, "IRQ callback : 0x%x\n", irqst); in omap_mcbsp_irq_handler()
122 dev_err(mcbsp->dev, "RX Frame Sync Error!\n"); in omap_mcbsp_irq_handler()
124 dev_dbg(mcbsp->dev, "RX Frame Sync\n"); in omap_mcbsp_irq_handler()
126 dev_dbg(mcbsp->dev, "RX End Of Frame\n"); in omap_mcbsp_irq_handler()
128 dev_dbg(mcbsp->dev, "RX Buffer Threshold Reached\n"); in omap_mcbsp_irq_handler()
130 dev_err(mcbsp->dev, "RX Buffer Underflow!\n"); in omap_mcbsp_irq_handler()
132 dev_err(mcbsp->dev, "RX Buffer Overflow!\n"); in omap_mcbsp_irq_handler()
135 dev_err(mcbsp->dev, "TX Frame Sync Error!\n"); in omap_mcbsp_irq_handler()
137 dev_dbg(mcbsp->dev, "TX Frame Sync\n"); in omap_mcbsp_irq_handler()
139 dev_dbg(mcbsp->dev, "TX End Of Frame\n"); in omap_mcbsp_irq_handler()
141 dev_dbg(mcbsp->dev, "TX Buffer threshold Reached\n"); in omap_mcbsp_irq_handler()
143 dev_err(mcbsp->dev, "TX Buffer Underflow!\n"); in omap_mcbsp_irq_handler()
145 dev_err(mcbsp->dev, "TX Buffer Overflow!\n"); in omap_mcbsp_irq_handler()
147 dev_dbg(mcbsp->dev, "TX Buffer empty at end of frame\n"); in omap_mcbsp_irq_handler()
160 dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2); in omap_mcbsp_tx_irq_handler()
163 dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n", in omap_mcbsp_tx_irq_handler()
178 dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1); in omap_mcbsp_rx_irq_handler()
181 dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n", in omap_mcbsp_rx_irq_handler()
199 dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n", in omap_mcbsp_config()
200 mcbsp->id, mcbsp->phys_base); in omap_mcbsp_config()
203 MCBSP_WRITE(mcbsp, SPCR2, config->spcr2); in omap_mcbsp_config()
204 MCBSP_WRITE(mcbsp, SPCR1, config->spcr1); in omap_mcbsp_config()
205 MCBSP_WRITE(mcbsp, RCR2, config->rcr2); in omap_mcbsp_config()
206 MCBSP_WRITE(mcbsp, RCR1, config->rcr1); in omap_mcbsp_config()
207 MCBSP_WRITE(mcbsp, XCR2, config->xcr2); in omap_mcbsp_config()
208 MCBSP_WRITE(mcbsp, XCR1, config->xcr1); in omap_mcbsp_config()
209 MCBSP_WRITE(mcbsp, SRGR2, config->srgr2); in omap_mcbsp_config()
210 MCBSP_WRITE(mcbsp, SRGR1, config->srgr1); in omap_mcbsp_config()
211 MCBSP_WRITE(mcbsp, MCR2, config->mcr2); in omap_mcbsp_config()
212 MCBSP_WRITE(mcbsp, MCR1, config->mcr1); in omap_mcbsp_config()
213 MCBSP_WRITE(mcbsp, PCR0, config->pcr0); in omap_mcbsp_config()
214 if (mcbsp->pdata->has_ccr) { in omap_mcbsp_config()
215 MCBSP_WRITE(mcbsp, XCCR, config->xccr); in omap_mcbsp_config()
216 MCBSP_WRITE(mcbsp, RCCR, config->rccr); in omap_mcbsp_config()
219 if (mcbsp->pdata->has_wakeup) in omap_mcbsp_config()
222 /* Enable TX/RX sync error interrupts by default */ in omap_mcbsp_config()
223 if (mcbsp->irq) in omap_mcbsp_config()
229 * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register
230 * @id - mcbsp id
231 * @stream - indicates the direction of data flow (rx or tx)
242 if (mcbsp->pdata->reg_size == 2) { in omap_mcbsp_dma_reg_params()
254 return mcbsp->phys_dma_base + data_reg * mcbsp->pdata->reg_step; in omap_mcbsp_dma_reg_params()
261 if (mcbsp->pdata->force_ick_on) in omap_st_on()
262 mcbsp->pdata->force_ick_on(mcbsp->st_data->mcbsp_iclk, true); in omap_st_on()
264 /* Disable Sidetone clock auto-gating for normal operation */ in omap_st_on()
287 /* Enable Sidetone clock auto-gating to reduce power consumption */ in omap_st_off()
291 if (mcbsp->pdata->force_ick_on) in omap_st_off()
292 mcbsp->pdata->force_ick_on(mcbsp->st_data->mcbsp_iclk, false); in omap_st_off()
318 dev_err(mcbsp->dev, "McBSP FIR load error!\n"); in omap_st_fir_write()
324 struct omap_mcbsp_st_data *st_data = mcbsp->st_data; in omap_st_chgain()
328 MCBSP_ST_WRITE(mcbsp, SGAINCR, ST_CH0GAIN(st_data->ch0gain) | \ in omap_st_chgain()
329 ST_CH1GAIN(st_data->ch1gain)); in omap_st_chgain()
334 struct omap_mcbsp_st_data *st_data = mcbsp->st_data; in omap_st_set_chgain()
338 return -ENOENT; in omap_st_set_chgain()
340 spin_lock_irq(&mcbsp->lock); in omap_st_set_chgain()
342 st_data->ch0gain = chgain; in omap_st_set_chgain()
344 st_data->ch1gain = chgain; in omap_st_set_chgain()
346 ret = -EINVAL; in omap_st_set_chgain()
348 if (st_data->enabled) in omap_st_set_chgain()
350 spin_unlock_irq(&mcbsp->lock); in omap_st_set_chgain()
357 struct omap_mcbsp_st_data *st_data = mcbsp->st_data; in omap_st_get_chgain()
361 return -ENOENT; in omap_st_get_chgain()
363 spin_lock_irq(&mcbsp->lock); in omap_st_get_chgain()
365 *chgain = st_data->ch0gain; in omap_st_get_chgain()
367 *chgain = st_data->ch1gain; in omap_st_get_chgain()
369 ret = -EINVAL; in omap_st_get_chgain()
370 spin_unlock_irq(&mcbsp->lock); in omap_st_get_chgain()
377 struct omap_mcbsp_st_data *st_data = mcbsp->st_data; in omap_st_start()
379 if (st_data->enabled && !st_data->running) { in omap_st_start()
380 omap_st_fir_write(mcbsp, st_data->taps); in omap_st_start()
383 if (!mcbsp->free) { in omap_st_start()
385 st_data->running = 1; in omap_st_start()
394 struct omap_mcbsp_st_data *st_data = mcbsp->st_data; in omap_st_enable()
397 return -ENODEV; in omap_st_enable()
399 spin_lock_irq(&mcbsp->lock); in omap_st_enable()
400 st_data->enabled = 1; in omap_st_enable()
402 spin_unlock_irq(&mcbsp->lock); in omap_st_enable()
409 struct omap_mcbsp_st_data *st_data = mcbsp->st_data; in omap_st_stop()
411 if (st_data->running) { in omap_st_stop()
412 if (!mcbsp->free) { in omap_st_stop()
414 st_data->running = 0; in omap_st_stop()
423 struct omap_mcbsp_st_data *st_data = mcbsp->st_data; in omap_st_disable()
427 return -ENODEV; in omap_st_disable()
429 spin_lock_irq(&mcbsp->lock); in omap_st_disable()
431 st_data->enabled = 0; in omap_st_disable()
432 spin_unlock_irq(&mcbsp->lock); in omap_st_disable()
439 struct omap_mcbsp_st_data *st_data = mcbsp->st_data; in omap_st_is_enabled()
442 return -ENODEV; in omap_st_is_enabled()
444 return st_data->enabled; in omap_st_is_enabled()
448 * omap_mcbsp_set_rx_threshold configures the transmit threshold in words.
449 * The threshold parameter is 1 based, and it is converted (threshold - 1)
452 void omap_mcbsp_set_tx_threshold(struct omap_mcbsp *mcbsp, u16 threshold) in omap_mcbsp_set_tx_threshold() argument
454 if (mcbsp->pdata->buffer_size == 0) in omap_mcbsp_set_tx_threshold()
457 if (threshold && threshold <= mcbsp->max_tx_thres) in omap_mcbsp_set_tx_threshold()
458 MCBSP_WRITE(mcbsp, THRSH2, threshold - 1); in omap_mcbsp_set_tx_threshold()
462 * omap_mcbsp_set_rx_threshold configures the receive threshold in words.
463 * The threshold parameter is 1 based, and it is converted (threshold - 1)
466 void omap_mcbsp_set_rx_threshold(struct omap_mcbsp *mcbsp, u16 threshold) in omap_mcbsp_set_rx_threshold() argument
468 if (mcbsp->pdata->buffer_size == 0) in omap_mcbsp_set_rx_threshold()
471 if (threshold && threshold <= mcbsp->max_rx_thres) in omap_mcbsp_set_rx_threshold()
472 MCBSP_WRITE(mcbsp, THRSH1, threshold - 1); in omap_mcbsp_set_rx_threshold()
482 if (mcbsp->pdata->buffer_size == 0) in omap_mcbsp_get_tx_delay()
489 return mcbsp->pdata->buffer_size - buffstat; in omap_mcbsp_get_tx_delay()
494 * to reach the threshold value (when the DMA will be triggered to read it)
498 u16 buffstat, threshold; in omap_mcbsp_get_rx_delay() local
500 if (mcbsp->pdata->buffer_size == 0) in omap_mcbsp_get_rx_delay()
505 /* RX threshold */ in omap_mcbsp_get_rx_delay()
506 threshold = MCBSP_READ(mcbsp, THRSH1); in omap_mcbsp_get_rx_delay()
508 /* Return the number of location till we reach the threshold limit */ in omap_mcbsp_get_rx_delay()
509 if (threshold <= buffstat) in omap_mcbsp_get_rx_delay()
512 return threshold - buffstat; in omap_mcbsp_get_rx_delay()
520 reg_cache = kzalloc(mcbsp->reg_cache_size, GFP_KERNEL); in omap_mcbsp_request()
522 return -ENOMEM; in omap_mcbsp_request()
525 spin_lock(&mcbsp->lock); in omap_mcbsp_request()
526 if (!mcbsp->free) { in omap_mcbsp_request()
527 dev_err(mcbsp->dev, "McBSP%d is currently in use\n", in omap_mcbsp_request()
528 mcbsp->id); in omap_mcbsp_request()
529 err = -EBUSY; in omap_mcbsp_request()
533 mcbsp->free = false; in omap_mcbsp_request()
534 mcbsp->reg_cache = reg_cache; in omap_mcbsp_request()
535 spin_unlock(&mcbsp->lock); in omap_mcbsp_request()
537 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) in omap_mcbsp_request()
538 mcbsp->pdata->ops->request(mcbsp->id - 1); in omap_mcbsp_request()
541 * Make sure that transmitter, receiver and sample-rate generator are in omap_mcbsp_request()
547 if (mcbsp->irq) { in omap_mcbsp_request()
548 err = request_irq(mcbsp->irq, omap_mcbsp_irq_handler, 0, in omap_mcbsp_request()
551 dev_err(mcbsp->dev, "Unable to request IRQ\n"); in omap_mcbsp_request()
555 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, 0, in omap_mcbsp_request()
556 "McBSP TX", (void *)mcbsp); in omap_mcbsp_request()
558 dev_err(mcbsp->dev, "Unable to request TX IRQ\n"); in omap_mcbsp_request()
562 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler, 0, in omap_mcbsp_request()
565 dev_err(mcbsp->dev, "Unable to request RX IRQ\n"); in omap_mcbsp_request()
572 free_irq(mcbsp->tx_irq, (void *)mcbsp); in omap_mcbsp_request()
574 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) in omap_mcbsp_request()
575 mcbsp->pdata->ops->free(mcbsp->id - 1); in omap_mcbsp_request()
578 if (mcbsp->pdata->has_wakeup) in omap_mcbsp_request()
581 spin_lock(&mcbsp->lock); in omap_mcbsp_request()
582 mcbsp->free = true; in omap_mcbsp_request()
583 mcbsp->reg_cache = NULL; in omap_mcbsp_request()
585 spin_unlock(&mcbsp->lock); in omap_mcbsp_request()
595 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) in omap_mcbsp_free()
596 mcbsp->pdata->ops->free(mcbsp->id - 1); in omap_mcbsp_free()
599 if (mcbsp->pdata->has_wakeup) in omap_mcbsp_free()
603 if (mcbsp->irq) in omap_mcbsp_free()
606 if (mcbsp->irq) { in omap_mcbsp_free()
607 free_irq(mcbsp->irq, (void *)mcbsp); in omap_mcbsp_free()
609 free_irq(mcbsp->rx_irq, (void *)mcbsp); in omap_mcbsp_free()
610 free_irq(mcbsp->tx_irq, (void *)mcbsp); in omap_mcbsp_free()
613 reg_cache = mcbsp->reg_cache; in omap_mcbsp_free()
625 spin_lock(&mcbsp->lock); in omap_mcbsp_free()
626 if (mcbsp->free) in omap_mcbsp_free()
627 dev_err(mcbsp->dev, "McBSP%d was not reserved\n", mcbsp->id); in omap_mcbsp_free()
629 mcbsp->free = true; in omap_mcbsp_free()
630 mcbsp->reg_cache = NULL; in omap_mcbsp_free()
631 spin_unlock(&mcbsp->lock); in omap_mcbsp_free()
638 * If no transmitter or receiver is active prior calling, then sample-rate
641 void omap_mcbsp_start(struct omap_mcbsp *mcbsp, int tx, int rx) in omap_mcbsp_start() argument
646 if (mcbsp->st_data) in omap_mcbsp_start()
662 tx &= 1; in omap_mcbsp_start()
664 MCBSP_WRITE(mcbsp, SPCR2, w | tx); in omap_mcbsp_start()
684 if (mcbsp->pdata->has_ccr) { in omap_mcbsp_start()
687 w &= ~(tx ? XDISABLE : 0); in omap_mcbsp_start()
698 void omap_mcbsp_stop(struct omap_mcbsp *mcbsp, int tx, int rx) in omap_mcbsp_stop() argument
704 tx &= 1; in omap_mcbsp_stop()
705 if (mcbsp->pdata->has_ccr) { in omap_mcbsp_stop()
707 w |= (tx ? XDISABLE : 0); in omap_mcbsp_stop()
711 MCBSP_WRITE(mcbsp, SPCR2, w & ~tx); in omap_mcbsp_stop()
715 if (mcbsp->pdata->has_ccr) { in omap_mcbsp_stop()
732 if (mcbsp->st_data) in omap_mcbsp_stop()
747 return -EINVAL; in omap2_mcbsp_set_clks_src()
749 fck_src = clk_get(mcbsp->dev, src); in omap2_mcbsp_set_clks_src()
751 dev_err(mcbsp->dev, "CLKS: could not clk_get() %s\n", src); in omap2_mcbsp_set_clks_src()
752 return -EINVAL; in omap2_mcbsp_set_clks_src()
755 pm_runtime_put_sync(mcbsp->dev); in omap2_mcbsp_set_clks_src()
757 r = clk_set_parent(mcbsp->fclk, fck_src); in omap2_mcbsp_set_clks_src()
759 dev_err(mcbsp->dev, "CLKS: could not clk_set_parent() to %s\n", in omap2_mcbsp_set_clks_src()
765 pm_runtime_get_sync(mcbsp->dev); in omap2_mcbsp_set_clks_src()
773 #define max_thres(m) (mcbsp->pdata->buffer_size)
781 return sprintf(buf, "%u\n", mcbsp->prop); \
797 return -EDOM; \
799 mcbsp->prop = val; \
809 "element", "threshold",
820 dma_op_mode = mcbsp->dma_op_mode; in dma_op_mode_show()
844 spin_lock_irq(&mcbsp->lock); in dma_op_mode_store()
845 if (!mcbsp->free) { in dma_op_mode_store()
846 size = -EBUSY; in dma_op_mode_store()
849 mcbsp->dma_op_mode = i; in dma_op_mode_store()
852 spin_unlock_irq(&mcbsp->lock); in dma_op_mode_store()
874 struct omap_mcbsp_st_data *st_data = mcbsp->st_data; in st_taps_show()
878 spin_lock_irq(&mcbsp->lock); in st_taps_show()
879 for (i = 0; i < st_data->nr_taps; i++) in st_taps_show()
881 st_data->taps[i]); in st_taps_show()
884 spin_unlock_irq(&mcbsp->lock); in st_taps_show()
894 struct omap_mcbsp_st_data *st_data = mcbsp->st_data; in st_taps_store()
897 spin_lock_irq(&mcbsp->lock); in st_taps_store()
898 memset(st_data->taps, 0, sizeof(st_data->taps)); in st_taps_store()
899 st_data->nr_taps = 0; in st_taps_store()
904 size = -EINVAL; in st_taps_store()
907 if (val < -32768 || val > 32767) { in st_taps_store()
908 size = -EINVAL; in st_taps_store()
911 st_data->taps[i++] = val; in st_taps_store()
918 st_data->nr_taps = i; in st_taps_store()
921 spin_unlock_irq(&mcbsp->lock); in st_taps_store()
942 st_data = devm_kzalloc(mcbsp->dev, sizeof(*mcbsp->st_data), GFP_KERNEL); in omap_st_add()
944 return -ENOMEM; in omap_st_add()
946 st_data->mcbsp_iclk = clk_get(mcbsp->dev, "ick"); in omap_st_add()
947 if (IS_ERR(st_data->mcbsp_iclk)) { in omap_st_add()
948 dev_warn(mcbsp->dev, in omap_st_add()
950 st_data->mcbsp_iclk = NULL; in omap_st_add()
953 st_data->io_base_st = devm_ioremap(mcbsp->dev, res->start, in omap_st_add()
955 if (!st_data->io_base_st) in omap_st_add()
956 return -ENOMEM; in omap_st_add()
958 err = sysfs_create_group(&mcbsp->dev->kobj, &sidetone_attr_group); in omap_st_add()
962 mcbsp->st_data = st_data; in omap_st_add()
976 spin_lock_init(&mcbsp->lock); in omap_mcbsp_init()
977 mcbsp->free = true; in omap_mcbsp_init()
983 mcbsp->io_base = devm_ioremap_resource(&pdev->dev, res); in omap_mcbsp_init()
984 if (IS_ERR(mcbsp->io_base)) in omap_mcbsp_init()
985 return PTR_ERR(mcbsp->io_base); in omap_mcbsp_init()
987 mcbsp->phys_base = res->start; in omap_mcbsp_init()
988 mcbsp->reg_cache_size = resource_size(res); in omap_mcbsp_init()
992 mcbsp->phys_dma_base = mcbsp->phys_base; in omap_mcbsp_init()
994 mcbsp->phys_dma_base = res->start; in omap_mcbsp_init()
997 * OMAP1, 2 uses two interrupt lines: TX, RX in omap_mcbsp_init()
1003 mcbsp->irq = platform_get_irq_byname(pdev, "common"); in omap_mcbsp_init()
1004 if (mcbsp->irq == -ENXIO) { in omap_mcbsp_init()
1005 mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx"); in omap_mcbsp_init()
1007 if (mcbsp->tx_irq == -ENXIO) { in omap_mcbsp_init()
1008 mcbsp->irq = platform_get_irq(pdev, 0); in omap_mcbsp_init()
1009 mcbsp->tx_irq = 0; in omap_mcbsp_init()
1011 mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx"); in omap_mcbsp_init()
1012 mcbsp->irq = 0; in omap_mcbsp_init()
1016 if (!pdev->dev.of_node) { in omap_mcbsp_init()
1017 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); in omap_mcbsp_init()
1019 dev_err(&pdev->dev, "invalid tx DMA channel\n"); in omap_mcbsp_init()
1020 return -ENODEV; in omap_mcbsp_init()
1022 mcbsp->dma_req[0] = res->start; in omap_mcbsp_init()
1023 mcbsp->dma_data[0].filter_data = &mcbsp->dma_req[0]; in omap_mcbsp_init()
1027 dev_err(&pdev->dev, "invalid rx DMA channel\n"); in omap_mcbsp_init()
1028 return -ENODEV; in omap_mcbsp_init()
1030 mcbsp->dma_req[1] = res->start; in omap_mcbsp_init()
1031 mcbsp->dma_data[1].filter_data = &mcbsp->dma_req[1]; in omap_mcbsp_init()
1033 mcbsp->dma_data[0].filter_data = "tx"; in omap_mcbsp_init()
1034 mcbsp->dma_data[1].filter_data = "rx"; in omap_mcbsp_init()
1037 mcbsp->dma_data[0].addr = omap_mcbsp_dma_reg_params(mcbsp, 0); in omap_mcbsp_init()
1038 mcbsp->dma_data[0].maxburst = 4; in omap_mcbsp_init()
1040 mcbsp->dma_data[1].addr = omap_mcbsp_dma_reg_params(mcbsp, 1); in omap_mcbsp_init()
1041 mcbsp->dma_data[1].maxburst = 4; in omap_mcbsp_init()
1043 mcbsp->fclk = clk_get(&pdev->dev, "fck"); in omap_mcbsp_init()
1044 if (IS_ERR(mcbsp->fclk)) { in omap_mcbsp_init()
1045 ret = PTR_ERR(mcbsp->fclk); in omap_mcbsp_init()
1046 dev_err(mcbsp->dev, "unable to get fck: %d\n", ret); in omap_mcbsp_init()
1050 mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT; in omap_mcbsp_init()
1051 if (mcbsp->pdata->buffer_size) { in omap_mcbsp_init()
1060 mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10; in omap_mcbsp_init()
1061 mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10; in omap_mcbsp_init()
1063 ret = sysfs_create_group(&mcbsp->dev->kobj, in omap_mcbsp_init()
1066 dev_err(mcbsp->dev, in omap_mcbsp_init()
1071 mcbsp->max_tx_thres = -EINVAL; in omap_mcbsp_init()
1072 mcbsp->max_rx_thres = -EINVAL; in omap_mcbsp_init()
1079 dev_err(mcbsp->dev, in omap_mcbsp_init()
1088 if (mcbsp->pdata->buffer_size) in omap_mcbsp_init()
1089 sysfs_remove_group(&mcbsp->dev->kobj, &additional_attr_group); in omap_mcbsp_init()
1091 clk_put(mcbsp->fclk); in omap_mcbsp_init()
1097 if (mcbsp->pdata->buffer_size) in omap_mcbsp_cleanup()
1098 sysfs_remove_group(&mcbsp->dev->kobj, &additional_attr_group); in omap_mcbsp_cleanup()
1100 if (mcbsp->st_data) { in omap_mcbsp_cleanup()
1101 sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group); in omap_mcbsp_cleanup()
1102 clk_put(mcbsp->st_data->mcbsp_iclk); in omap_mcbsp_cleanup()