3  * ALSA SoC Audio Layer - Rockchip I2S Controller driver
27 #define DRV_NAME "rockchip-i2s"
48  * I2S controller hopes to start the tx and rx together,
59 	struct rk_i2s_dev *i2s = dev_get_drvdata(dev);  in i2s_runtime_suspend()  local
61 	regcache_cache_only(i2s->regmap, true);  in i2s_runtime_suspend()
62 	clk_disable_unprepare(i2s->mclk);  in i2s_runtime_suspend()
69 	struct rk_i2s_dev *i2s = dev_get_drvdata(dev);  in i2s_runtime_resume()  local
72 	ret = clk_prepare_enable(i2s->mclk);  in i2s_runtime_resume()
74 		dev_err(i2s->dev, "clock enable failed %d\n", ret);  in i2s_runtime_resume()
78 	regcache_cache_only(i2s->regmap, false);  in i2s_runtime_resume()
79 	regcache_mark_dirty(i2s->regmap);  in i2s_runtime_resume()
81 	ret = regcache_sync(i2s->regmap);  in i2s_runtime_resume()
83 		clk_disable_unprepare(i2s->mclk);  in i2s_runtime_resume()
93 static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on)  in rockchip_snd_txctrl()  argument
99 		regmap_update_bits(i2s->regmap, I2S_DMACR,  in rockchip_snd_txctrl()
102 		regmap_update_bits(i2s->regmap, I2S_XFER,  in rockchip_snd_txctrl()
106 		i2s->tx_start = true;  in rockchip_snd_txctrl()
108 		i2s->tx_start = false;  in rockchip_snd_txctrl()
110 		regmap_update_bits(i2s->regmap, I2S_DMACR,  in rockchip_snd_txctrl()
113 		if (!i2s->rx_start) {  in rockchip_snd_txctrl()
114 			regmap_update_bits(i2s->regmap, I2S_XFER,  in rockchip_snd_txctrl()
121 			regmap_update_bits(i2s->regmap, I2S_CLR,  in rockchip_snd_txctrl()
125 			regmap_read(i2s->regmap, I2S_CLR, &val);  in rockchip_snd_txctrl()
129 				regmap_read(i2s->regmap, I2S_CLR, &val);  in rockchip_snd_txctrl()
132 					dev_warn(i2s->dev, "fail to clear\n");  in rockchip_snd_txctrl()
140 static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on)  in rockchip_snd_rxctrl()  argument
146 		regmap_update_bits(i2s->regmap, I2S_DMACR,  in rockchip_snd_rxctrl()
149 		regmap_update_bits(i2s->regmap, I2S_XFER,  in rockchip_snd_rxctrl()
153 		i2s->rx_start = true;  in rockchip_snd_rxctrl()
155 		i2s->rx_start = false;  in rockchip_snd_rxctrl()
157 		regmap_update_bits(i2s->regmap, I2S_DMACR,  in rockchip_snd_rxctrl()
160 		if (!i2s->tx_start) {  in rockchip_snd_rxctrl()
161 			regmap_update_bits(i2s->regmap, I2S_XFER,  in rockchip_snd_rxctrl()
168 			regmap_update_bits(i2s->regmap, I2S_CLR,  in rockchip_snd_rxctrl()
172 			regmap_read(i2s->regmap, I2S_CLR, &val);  in rockchip_snd_rxctrl()
176 				regmap_read(i2s->regmap, I2S_CLR, &val);  in rockchip_snd_rxctrl()
179 					dev_warn(i2s->dev, "fail to clear\n");  in rockchip_snd_rxctrl()
190 	struct rk_i2s_dev *i2s = to_info(cpu_dai);  in rockchip_i2s_set_fmt()  local
198 		i2s->is_master_mode = true;  in rockchip_i2s_set_fmt()
202 		i2s->is_master_mode = false;  in rockchip_i2s_set_fmt()
208 	regmap_update_bits(i2s->regmap, I2S_CKR, mask, val);  in rockchip_i2s_set_fmt()
222 	regmap_update_bits(i2s->regmap, I2S_CKR, mask, val);  in rockchip_i2s_set_fmt()
245 	regmap_update_bits(i2s->regmap, I2S_TXCR, mask, val);  in rockchip_i2s_set_fmt()
268 	regmap_update_bits(i2s->regmap, I2S_RXCR, mask, val);  in rockchip_i2s_set_fmt()
277 	struct rk_i2s_dev *i2s = to_info(dai);  in rockchip_i2s_hw_params()  local
282 	if (i2s->is_master_mode) {  in rockchip_i2s_hw_params()
283 		mclk_rate = clk_get_rate(i2s->mclk);  in rockchip_i2s_hw_params()
290 		regmap_update_bits(i2s->regmap, I2S_CKR,  in rockchip_i2s_hw_params()
294 		regmap_update_bits(i2s->regmap, I2S_CKR,  in rockchip_i2s_hw_params()
335 		dev_err(i2s->dev, "invalid channel: %d\n",  in rockchip_i2s_hw_params()
341 		regmap_update_bits(i2s->regmap, I2S_RXCR,  in rockchip_i2s_hw_params()
345 		regmap_update_bits(i2s->regmap, I2S_TXCR,  in rockchip_i2s_hw_params()
349 	if (!IS_ERR(i2s->grf) && i2s->pins) {  in rockchip_i2s_hw_params()
350 		regmap_read(i2s->regmap, I2S_TXCR, &val);  in rockchip_i2s_hw_params()
368 		val <<= i2s->pins->shift;  in rockchip_i2s_hw_params()
369 		val |= (I2S_IO_DIRECTION_MASK << i2s->pins->shift) << 16;  in rockchip_i2s_hw_params()
370 		regmap_write(i2s->grf, i2s->pins->reg_offset, val);  in rockchip_i2s_hw_params()
373 	regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_TDL_MASK,  in rockchip_i2s_hw_params()
375 	regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK,  in rockchip_i2s_hw_params()
382 	regmap_update_bits(i2s->regmap, I2S_CKR,  in rockchip_i2s_hw_params()
391 	struct rk_i2s_dev *i2s = to_info(dai);  in rockchip_i2s_trigger()  local
399 			rockchip_snd_rxctrl(i2s, 1);  in rockchip_i2s_trigger()
401 			rockchip_snd_txctrl(i2s, 1);  in rockchip_i2s_trigger()
407 			rockchip_snd_rxctrl(i2s, 0);  in rockchip_i2s_trigger()
409 			rockchip_snd_txctrl(i2s, 0);  in rockchip_i2s_trigger()
422 	struct rk_i2s_dev *i2s = to_info(cpu_dai);  in rockchip_i2s_set_sysclk()  local
425 	ret = clk_set_rate(i2s->mclk, freq);  in rockchip_i2s_set_sysclk()
427 		dev_err(i2s->dev, "Fail to set mclk %d\n", ret);  in rockchip_i2s_set_sysclk()
434 	struct rk_i2s_dev *i2s = snd_soc_dai_get_drvdata(dai);  in rockchip_i2s_dai_probe()  local
436 	dai->capture_dma_data = &i2s->capture_dma_data;  in rockchip_i2s_dai_probe()
437 	dai->playback_dma_data = &i2s->playback_dma_data;  in rockchip_i2s_dai_probe()
570 	{ .compatible = "rockchip,rk3066-i2s", },
571 	{ .compatible = "rockchip,rk3188-i2s", },
572 	{ .compatible = "rockchip,rk3288-i2s", },
573 	{ .compatible = "rockchip,rk3399-i2s", .data = &rk3399_i2s_pins },
581 	struct rk_i2s_dev *i2s;  in rockchip_i2s_probe()  local
588 	i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL);  in rockchip_i2s_probe()
589 	if (!i2s)  in rockchip_i2s_probe()
592 	i2s->dev = &pdev->dev;  in rockchip_i2s_probe()
594 	i2s->grf = syscon_regmap_lookup_by_phandle(node, "rockchip,grf");  in rockchip_i2s_probe()
595 	if (!IS_ERR(i2s->grf)) {  in rockchip_i2s_probe()
600 		i2s->pins = of_id->data;  in rockchip_i2s_probe()
604 	i2s->hclk = devm_clk_get(&pdev->dev, "i2s_hclk");  in rockchip_i2s_probe()
605 	if (IS_ERR(i2s->hclk)) {  in rockchip_i2s_probe()
606 		dev_err(&pdev->dev, "Can't retrieve i2s bus clock\n");  in rockchip_i2s_probe()
607 		return PTR_ERR(i2s->hclk);  in rockchip_i2s_probe()
609 	ret = clk_prepare_enable(i2s->hclk);  in rockchip_i2s_probe()
611 		dev_err(i2s->dev, "hclock enable failed %d\n", ret);  in rockchip_i2s_probe()
615 	i2s->mclk = devm_clk_get(&pdev->dev, "i2s_clk");  in rockchip_i2s_probe()
616 	if (IS_ERR(i2s->mclk)) {  in rockchip_i2s_probe()
617 		dev_err(&pdev->dev, "Can't retrieve i2s master clock\n");  in rockchip_i2s_probe()
618 		return PTR_ERR(i2s->mclk);  in rockchip_i2s_probe()
626 	i2s->regmap = devm_regmap_init_mmio(&pdev->dev, regs,  in rockchip_i2s_probe()
628 	if (IS_ERR(i2s->regmap)) {  in rockchip_i2s_probe()
631 		return PTR_ERR(i2s->regmap);  in rockchip_i2s_probe()
634 	i2s->playback_dma_data.addr = res->start + I2S_TXDR;  in rockchip_i2s_probe()
635 	i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;  in rockchip_i2s_probe()
636 	i2s->playback_dma_data.maxburst = 4;  in rockchip_i2s_probe()
638 	i2s->capture_dma_data.addr = res->start + I2S_RXDR;  in rockchip_i2s_probe()
639 	i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;  in rockchip_i2s_probe()
640 	i2s->capture_dma_data.maxburst = 4;  in rockchip_i2s_probe()
642 	dev_set_drvdata(&pdev->dev, i2s);  in rockchip_i2s_probe()
696 	struct rk_i2s_dev *i2s = dev_get_drvdata(&pdev->dev);  in rockchip_i2s_remove()  local
702 	clk_disable_unprepare(i2s->hclk);  in rockchip_i2s_remove()