Lines Matching +full:stm32h7 +full:- +full:spi
4 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
139 #define I2S_CGFR_I2SDIV_MAX ((1 << (I2S_CGFR_I2SDIV_BIT_H -\
140 I2S_CGFR_I2SDIV_SHIFT)) - 1)
185 #define STM32_I2S_IS_MASTER(x) ((x)->ms_flg == I2S_MS_MASTER)
186 #define STM32_I2S_IS_SLAVE(x) ((x)->ms_flg == I2S_MS_SLAVE)
234 struct platform_device *pdev = i2s->pdev; in stm32_i2s_isr()
239 regmap_read(i2s->regmap, STM32_I2S_SR_REG, &sr); in stm32_i2s_isr()
240 regmap_read(i2s->regmap, STM32_I2S_IER_REG, &ier); in stm32_i2s_isr()
244 dev_dbg(&pdev->dev, "Spurious IRQ sr=0x%08x, ier=0x%08x\n", in stm32_i2s_isr()
249 regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG, in stm32_i2s_isr()
253 dev_dbg(&pdev->dev, "Overrun\n"); in stm32_i2s_isr()
258 dev_dbg(&pdev->dev, "Underrun\n"); in stm32_i2s_isr()
263 dev_dbg(&pdev->dev, "Frame error\n"); in stm32_i2s_isr()
266 snd_pcm_stop_xrun(i2s->substream); in stm32_i2s_isr()
322 dev_dbg(cpu_dai->dev, "fmt %x\n", fmt); in stm32_i2s_set_dai_fmt()
343 dev_err(cpu_dai->dev, "Unsupported protocol %#x\n", in stm32_i2s_set_dai_fmt()
345 return -EINVAL; in stm32_i2s_set_dai_fmt()
363 dev_err(cpu_dai->dev, "Unsupported strobing %#x\n", in stm32_i2s_set_dai_fmt()
365 return -EINVAL; in stm32_i2s_set_dai_fmt()
371 i2s->ms_flg = I2S_MS_SLAVE; in stm32_i2s_set_dai_fmt()
374 i2s->ms_flg = I2S_MS_MASTER; in stm32_i2s_set_dai_fmt()
377 dev_err(cpu_dai->dev, "Unsupported mode %#x\n", in stm32_i2s_set_dai_fmt()
379 return -EINVAL; in stm32_i2s_set_dai_fmt()
382 i2s->fmt = fmt; in stm32_i2s_set_dai_fmt()
383 return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2s_set_dai_fmt()
392 dev_dbg(cpu_dai->dev, "I2S MCLK frequency is %uHz\n", freq); in stm32_i2s_set_sysclk()
395 i2s->mclk_rate = freq; in stm32_i2s_set_sysclk()
397 /* Enable master clock if master mode and mclk-fs are set */ in stm32_i2s_set_sysclk()
398 return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2s_set_sysclk()
417 clk_set_parent(i2s->i2sclk, i2s->x11kclk); in stm32_i2s_configure_clock()
419 clk_set_parent(i2s->i2sclk, i2s->x8kclk); in stm32_i2s_configure_clock()
420 i2s_clock_rate = clk_get_rate(i2s->i2sclk); in stm32_i2s_configure_clock()
434 if (i2s->mclk_rate) { in stm32_i2s_configure_clock()
435 tmp = DIV_ROUND_CLOSEST(i2s_clock_rate, i2s->mclk_rate); in stm32_i2s_configure_clock()
438 if ((i2s->fmt & SND_SOC_DAIFMT_FORMAT_MASK) == in stm32_i2s_configure_clock()
443 ret = regmap_read(i2s->regmap, STM32_I2S_CGFR_REG, &cgfr); in stm32_i2s_configure_clock()
461 dev_dbg(cpu_dai->dev, "I2S clk: %ld, SCLK: %d\n", in stm32_i2s_configure_clock()
463 dev_dbg(cpu_dai->dev, "Divider: 2*%d(div)+%d(odd) = %d\n", in stm32_i2s_configure_clock()
467 dev_err(cpu_dai->dev, "Wrong divider setting\n"); in stm32_i2s_configure_clock()
468 return -EINVAL; in stm32_i2s_configure_clock()
472 dev_warn(cpu_dai->dev, "real divider forced to 1\n"); in stm32_i2s_configure_clock()
474 ret = regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2s_configure_clock()
480 return regmap_update_bits(i2s->regmap, STM32_I2S_CFG2_REG, in stm32_i2s_configure_clock()
495 ((i2s->fmt & SND_SOC_DAIFMT_FORMAT_MASK) != SND_SOC_DAIFMT_DSP_A)) { in stm32_i2s_configure()
496 dev_err(cpu_dai->dev, "Mono mode supported only by DSP_A\n"); in stm32_i2s_configure()
497 return -EINVAL; in stm32_i2s_configure()
511 dev_err(cpu_dai->dev, "Unexpected format %d", format); in stm32_i2s_configure()
512 return -EINVAL; in stm32_i2s_configure()
526 ret = regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2s_configure()
532 cfg1 = I2S_CFG1_FTHVL_SET(fthlv - 1); in stm32_i2s_configure()
534 return regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG, in stm32_i2s_configure()
543 i2s->substream = substream; in stm32_i2s_startup()
545 spin_lock(&i2s->lock_fd); in stm32_i2s_startup()
546 i2s->refcount++; in stm32_i2s_startup()
547 spin_unlock(&i2s->lock_fd); in stm32_i2s_startup()
549 return regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG, in stm32_i2s_startup()
562 dev_err(cpu_dai->dev, "Configuration returned error %d\n", ret); in stm32_i2s_hw_params()
576 bool playback_flg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); in stm32_i2s_trigger()
585 dev_dbg(cpu_dai->dev, "start I2S\n"); in stm32_i2s_trigger()
588 regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG, in stm32_i2s_trigger()
591 ret = regmap_update_bits(i2s->regmap, STM32_I2S_CR1_REG, in stm32_i2s_trigger()
594 dev_err(cpu_dai->dev, "Error %d enabling I2S\n", ret); in stm32_i2s_trigger()
598 ret = regmap_update_bits(i2s->regmap, STM32_I2S_CR1_REG, in stm32_i2s_trigger()
601 dev_err(cpu_dai->dev, "Error %d starting I2S\n", ret); in stm32_i2s_trigger()
605 regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG, in stm32_i2s_trigger()
613 spin_lock(&i2s->lock_fd); in stm32_i2s_trigger()
614 if (i2s->refcount == 1) in stm32_i2s_trigger()
616 regmap_write(i2s->regmap, in stm32_i2s_trigger()
618 spin_unlock(&i2s->lock_fd); in stm32_i2s_trigger()
624 regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG, ier, ier); in stm32_i2s_trigger()
630 regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG, in stm32_i2s_trigger()
634 regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG, in stm32_i2s_trigger()
638 spin_lock(&i2s->lock_fd); in stm32_i2s_trigger()
639 i2s->refcount--; in stm32_i2s_trigger()
640 if (i2s->refcount) { in stm32_i2s_trigger()
641 spin_unlock(&i2s->lock_fd); in stm32_i2s_trigger()
644 spin_unlock(&i2s->lock_fd); in stm32_i2s_trigger()
646 dev_dbg(cpu_dai->dev, "stop I2S\n"); in stm32_i2s_trigger()
648 ret = regmap_update_bits(i2s->regmap, STM32_I2S_CR1_REG, in stm32_i2s_trigger()
651 dev_err(cpu_dai->dev, "Error %d disabling I2S\n", ret); in stm32_i2s_trigger()
656 regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG, in stm32_i2s_trigger()
660 return -EINVAL; in stm32_i2s_trigger()
671 i2s->substream = NULL; in stm32_i2s_shutdown()
673 regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2s_shutdown()
679 struct stm32_i2s_data *i2s = dev_get_drvdata(cpu_dai->dev); in stm32_i2s_dai_probe()
680 struct snd_dmaengine_dai_dma_data *dma_data_tx = &i2s->dma_data_tx; in stm32_i2s_dai_probe()
681 struct snd_dmaengine_dai_dma_data *dma_data_rx = &i2s->dma_data_rx; in stm32_i2s_dai_probe()
684 dma_data_tx->addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED; in stm32_i2s_dai_probe()
685 dma_data_tx->addr = (dma_addr_t)(i2s->phys_addr) + STM32_I2S_TXDR_REG; in stm32_i2s_dai_probe()
686 dma_data_tx->maxburst = 1; in stm32_i2s_dai_probe()
687 dma_data_rx->addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED; in stm32_i2s_dai_probe()
688 dma_data_rx->addr = (dma_addr_t)(i2s->phys_addr) + STM32_I2S_RXDR_REG; in stm32_i2s_dai_probe()
689 dma_data_rx->maxburst = 1; in stm32_i2s_dai_probe()
731 .name = "stm32-i2s",
737 stream->stream_name = stream_name; in stm32_i2s_dai_init()
738 stream->channels_min = 1; in stm32_i2s_dai_init()
739 stream->channels_max = 2; in stm32_i2s_dai_init()
740 stream->rates = SNDRV_PCM_RATE_8000_192000; in stm32_i2s_dai_init()
741 stream->formats = SNDRV_PCM_FMTBIT_S16_LE | in stm32_i2s_dai_init()
750 dai_ptr = devm_kzalloc(&pdev->dev, sizeof(struct snd_soc_dai_driver), in stm32_i2s_dais_init()
753 return -ENOMEM; in stm32_i2s_dais_init()
755 snprintf(i2s->dais_name, STM32_I2S_DAI_NAME_SIZE, in stm32_i2s_dais_init()
756 "%s", dev_name(&pdev->dev)); in stm32_i2s_dais_init()
758 dai_ptr->probe = stm32_i2s_dai_probe; in stm32_i2s_dais_init()
759 dai_ptr->ops = &stm32_i2s_pcm_dai_ops; in stm32_i2s_dais_init()
760 dai_ptr->name = i2s->dais_name; in stm32_i2s_dais_init()
761 dai_ptr->id = 1; in stm32_i2s_dais_init()
762 stm32_i2s_dai_init(&dai_ptr->playback, "playback"); in stm32_i2s_dais_init()
763 stm32_i2s_dai_init(&dai_ptr->capture, "capture"); in stm32_i2s_dais_init()
764 i2s->dai_drv = dai_ptr; in stm32_i2s_dais_init()
771 .compatible = "st,stm32h7-i2s",
780 struct device_node *np = pdev->dev.of_node; in stm32_i2s_parse_dt()
787 return -ENODEV; in stm32_i2s_parse_dt()
789 of_id = of_match_device(stm32_i2s_ids, &pdev->dev); in stm32_i2s_parse_dt()
791 i2s->regmap_conf = (const struct regmap_config *)of_id->data; in stm32_i2s_parse_dt()
793 return -EINVAL; in stm32_i2s_parse_dt()
796 i2s->base = devm_ioremap_resource(&pdev->dev, res); in stm32_i2s_parse_dt()
797 if (IS_ERR(i2s->base)) in stm32_i2s_parse_dt()
798 return PTR_ERR(i2s->base); in stm32_i2s_parse_dt()
800 i2s->phys_addr = res->start; in stm32_i2s_parse_dt()
803 i2s->pclk = devm_clk_get(&pdev->dev, "pclk"); in stm32_i2s_parse_dt()
804 if (IS_ERR(i2s->pclk)) { in stm32_i2s_parse_dt()
805 dev_err(&pdev->dev, "Could not get pclk\n"); in stm32_i2s_parse_dt()
806 return PTR_ERR(i2s->pclk); in stm32_i2s_parse_dt()
809 i2s->i2sclk = devm_clk_get(&pdev->dev, "i2sclk"); in stm32_i2s_parse_dt()
810 if (IS_ERR(i2s->i2sclk)) { in stm32_i2s_parse_dt()
811 dev_err(&pdev->dev, "Could not get i2sclk\n"); in stm32_i2s_parse_dt()
812 return PTR_ERR(i2s->i2sclk); in stm32_i2s_parse_dt()
815 i2s->x8kclk = devm_clk_get(&pdev->dev, "x8k"); in stm32_i2s_parse_dt()
816 if (IS_ERR(i2s->x8kclk)) { in stm32_i2s_parse_dt()
817 dev_err(&pdev->dev, "missing x8k parent clock\n"); in stm32_i2s_parse_dt()
818 return PTR_ERR(i2s->x8kclk); in stm32_i2s_parse_dt()
821 i2s->x11kclk = devm_clk_get(&pdev->dev, "x11k"); in stm32_i2s_parse_dt()
822 if (IS_ERR(i2s->x11kclk)) { in stm32_i2s_parse_dt()
823 dev_err(&pdev->dev, "missing x11k parent clock\n"); in stm32_i2s_parse_dt()
824 return PTR_ERR(i2s->x11kclk); in stm32_i2s_parse_dt()
830 dev_err(&pdev->dev, "no irq for node %s\n", pdev->name); in stm32_i2s_parse_dt()
831 return -ENOENT; in stm32_i2s_parse_dt()
834 ret = devm_request_irq(&pdev->dev, irq, stm32_i2s_isr, IRQF_ONESHOT, in stm32_i2s_parse_dt()
835 dev_name(&pdev->dev), i2s); in stm32_i2s_parse_dt()
837 dev_err(&pdev->dev, "irq request returned %d\n", ret); in stm32_i2s_parse_dt()
842 rst = devm_reset_control_get_exclusive(&pdev->dev, NULL); in stm32_i2s_parse_dt()
857 i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); in stm32_i2s_probe()
859 return -ENOMEM; in stm32_i2s_probe()
865 i2s->pdev = pdev; in stm32_i2s_probe()
866 i2s->ms_flg = I2S_MS_NOT_SET; in stm32_i2s_probe()
867 spin_lock_init(&i2s->lock_fd); in stm32_i2s_probe()
874 i2s->regmap = devm_regmap_init_mmio(&pdev->dev, i2s->base, in stm32_i2s_probe()
875 i2s->regmap_conf); in stm32_i2s_probe()
876 if (IS_ERR(i2s->regmap)) { in stm32_i2s_probe()
877 dev_err(&pdev->dev, "regmap init failed\n"); in stm32_i2s_probe()
878 return PTR_ERR(i2s->regmap); in stm32_i2s_probe()
881 ret = clk_prepare_enable(i2s->pclk); in stm32_i2s_probe()
883 dev_err(&pdev->dev, "Enable pclk failed: %d\n", ret); in stm32_i2s_probe()
887 ret = clk_prepare_enable(i2s->i2sclk); in stm32_i2s_probe()
889 dev_err(&pdev->dev, "Enable i2sclk failed: %d\n", ret); in stm32_i2s_probe()
893 ret = devm_snd_soc_register_component(&pdev->dev, &stm32_i2s_component, in stm32_i2s_probe()
894 i2s->dai_drv, 1); in stm32_i2s_probe()
898 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, in stm32_i2s_probe()
903 /* Set SPI/I2S in i2s mode */ in stm32_i2s_probe()
904 ret = regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2s_probe()
912 clk_disable_unprepare(i2s->i2sclk); in stm32_i2s_probe()
914 clk_disable_unprepare(i2s->pclk); in stm32_i2s_probe()
923 clk_disable_unprepare(i2s->i2sclk); in stm32_i2s_remove()
924 clk_disable_unprepare(i2s->pclk); in stm32_i2s_remove()
933 .name = "st,stm32-i2s",
944 MODULE_ALIAS("platform:stm32-i2s");