Lines Matching +full:reg +full:- +full:addr
26 phys_addr_t addr, phys_addr_t alignment) in vgic_check_ioaddr() argument
28 if (addr & ~KVM_PHYS_MASK) in vgic_check_ioaddr()
29 return -E2BIG; in vgic_check_ioaddr()
31 if (!IS_ALIGNED(addr, alignment)) in vgic_check_ioaddr()
32 return -EINVAL; in vgic_check_ioaddr()
35 return -EEXIST; in vgic_check_ioaddr()
42 if (kvm->arch.vgic.vgic_model != type_needed) in vgic_check_type()
43 return -ENODEV; in vgic_check_type()
49 * kvm_vgic_addr - set or get vgic VM base addresses
51 * @type: the VGIC addr type, one of KVM_VGIC_V[23]_ADDR_TYPE_XXX
52 * @addr: pointer to address value
64 int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write) in kvm_vgic_addr() argument
67 struct vgic_dist *vgic = &kvm->arch.vgic; in kvm_vgic_addr()
71 mutex_lock(&kvm->lock); in kvm_vgic_addr()
75 addr_ptr = &vgic->vgic_dist_base; in kvm_vgic_addr()
80 addr_ptr = &vgic->vgic_cpu_base; in kvm_vgic_addr()
85 addr_ptr = &vgic->vgic_dist_base; in kvm_vgic_addr()
95 r = vgic_v3_set_redist_base(kvm, 0, *addr, 0); in kvm_vgic_addr()
98 rdreg = list_first_entry(&vgic->rd_regions, in kvm_vgic_addr()
103 addr_ptr = &rdreg->base; in kvm_vgic_addr()
115 index = *addr & KVM_VGIC_V3_RDIST_INDEX_MASK; in kvm_vgic_addr()
118 gpa_t base = *addr & KVM_VGIC_V3_RDIST_BASE_MASK; in kvm_vgic_addr()
119 u32 count = (*addr & KVM_VGIC_V3_RDIST_COUNT_MASK) in kvm_vgic_addr()
121 u8 flags = (*addr & KVM_VGIC_V3_RDIST_FLAGS_MASK) in kvm_vgic_addr()
125 r = -EINVAL; in kvm_vgic_addr()
134 r = -ENOENT; in kvm_vgic_addr()
138 *addr = index; in kvm_vgic_addr()
139 *addr |= rdreg->base; in kvm_vgic_addr()
140 *addr |= (u64)rdreg->count << KVM_VGIC_V3_RDIST_COUNT_SHIFT; in kvm_vgic_addr()
144 r = -ENODEV; in kvm_vgic_addr()
151 r = vgic_check_ioaddr(kvm, addr_ptr, *addr, alignment); in kvm_vgic_addr()
153 *addr_ptr = *addr; in kvm_vgic_addr()
155 *addr = *addr_ptr; in kvm_vgic_addr()
159 mutex_unlock(&kvm->lock); in kvm_vgic_addr()
168 switch (attr->group) { in vgic_set_common_attr()
170 u64 __user *uaddr = (u64 __user *)(long)attr->addr; in vgic_set_common_attr()
171 u64 addr; in vgic_set_common_attr() local
172 unsigned long type = (unsigned long)attr->attr; in vgic_set_common_attr()
174 if (copy_from_user(&addr, uaddr, sizeof(addr))) in vgic_set_common_attr()
175 return -EFAULT; in vgic_set_common_attr()
177 r = kvm_vgic_addr(dev->kvm, type, &addr, true); in vgic_set_common_attr()
178 return (r == -ENODEV) ? -ENXIO : r; in vgic_set_common_attr()
181 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_set_common_attr()
186 return -EFAULT; in vgic_set_common_attr()
190 * - at least 32 SPIs on top of the 16 SGIs and 16 PPIs in vgic_set_common_attr()
191 * - at most 1024 interrupts in vgic_set_common_attr()
192 * - a multiple of 32 interrupts in vgic_set_common_attr()
197 return -EINVAL; in vgic_set_common_attr()
199 mutex_lock(&dev->kvm->lock); in vgic_set_common_attr()
201 if (vgic_ready(dev->kvm) || dev->kvm->arch.vgic.nr_spis) in vgic_set_common_attr()
202 ret = -EBUSY; in vgic_set_common_attr()
204 dev->kvm->arch.vgic.nr_spis = in vgic_set_common_attr()
205 val - VGIC_NR_PRIVATE_IRQS; in vgic_set_common_attr()
207 mutex_unlock(&dev->kvm->lock); in vgic_set_common_attr()
212 switch (attr->attr) { in vgic_set_common_attr()
214 mutex_lock(&dev->kvm->lock); in vgic_set_common_attr()
215 r = vgic_init(dev->kvm); in vgic_set_common_attr()
216 mutex_unlock(&dev->kvm->lock); in vgic_set_common_attr()
223 return -ENXIO; in vgic_set_common_attr()
229 int r = -ENXIO; in vgic_get_common_attr()
231 switch (attr->group) { in vgic_get_common_attr()
233 u64 __user *uaddr = (u64 __user *)(long)attr->addr; in vgic_get_common_attr()
234 u64 addr; in vgic_get_common_attr() local
235 unsigned long type = (unsigned long)attr->attr; in vgic_get_common_attr()
237 r = kvm_vgic_addr(dev->kvm, type, &addr, false); in vgic_get_common_attr()
239 return (r == -ENODEV) ? -ENXIO : r; in vgic_get_common_attr()
241 if (copy_to_user(uaddr, &addr, sizeof(addr))) in vgic_get_common_attr()
242 return -EFAULT; in vgic_get_common_attr()
246 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_get_common_attr()
248 r = put_user(dev->kvm->arch.vgic.nr_spis + in vgic_get_common_attr()
259 return kvm_vgic_create(dev->kvm, type); in vgic_create()
269 int ret = -ENODEV; in kvm_register_vgic_device()
294 cpuid = (attr->attr & KVM_DEV_ARM_VGIC_CPUID_MASK) >> in vgic_v2_parse_attr()
297 if (cpuid >= atomic_read(&dev->kvm->online_vcpus)) in vgic_v2_parse_attr()
298 return -EINVAL; in vgic_v2_parse_attr()
300 reg_attr->vcpu = kvm_get_vcpu(dev->kvm, cpuid); in vgic_v2_parse_attr()
301 reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK; in vgic_v2_parse_attr()
311 for (; vcpu_lock_idx >= 0; vcpu_lock_idx--) { in unlock_vcpus()
313 mutex_unlock(&tmp_vcpu->mutex); in unlock_vcpus()
319 unlock_vcpus(kvm, atomic_read(&kvm->online_vcpus) - 1); in unlock_all_vcpus()
330 * vcpu->mutex. By grabbing the vcpu->mutex of all VCPUs we ensure in lock_all_vcpus()
335 if (!mutex_trylock(&tmp_vcpu->mutex)) { in lock_all_vcpus()
336 unlock_vcpus(kvm, c - 1); in lock_all_vcpus()
345 * vgic_v2_attr_regs_access - allows user space to access VGIC v2 state
349 * @reg: address the value is read or written
354 u32 *reg, bool is_write) in vgic_v2_attr_regs_access() argument
357 gpa_t addr; in vgic_v2_attr_regs_access() local
366 addr = reg_attr.addr; in vgic_v2_attr_regs_access()
368 mutex_lock(&dev->kvm->lock); in vgic_v2_attr_regs_access()
370 ret = vgic_init(dev->kvm); in vgic_v2_attr_regs_access()
374 if (!lock_all_vcpus(dev->kvm)) { in vgic_v2_attr_regs_access()
375 ret = -EBUSY; in vgic_v2_attr_regs_access()
379 switch (attr->group) { in vgic_v2_attr_regs_access()
381 ret = vgic_v2_cpuif_uaccess(vcpu, is_write, addr, reg); in vgic_v2_attr_regs_access()
384 ret = vgic_v2_dist_uaccess(vcpu, is_write, addr, reg); in vgic_v2_attr_regs_access()
387 ret = -EINVAL; in vgic_v2_attr_regs_access()
391 unlock_all_vcpus(dev->kvm); in vgic_v2_attr_regs_access()
393 mutex_unlock(&dev->kvm->lock); in vgic_v2_attr_regs_access()
403 if (ret != -ENXIO) in vgic_v2_set_attr()
406 switch (attr->group) { in vgic_v2_set_attr()
409 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_v2_set_attr()
410 u32 reg; in vgic_v2_set_attr() local
412 if (get_user(reg, uaddr)) in vgic_v2_set_attr()
413 return -EFAULT; in vgic_v2_set_attr()
415 return vgic_v2_attr_regs_access(dev, attr, ®, true); in vgic_v2_set_attr()
419 return -ENXIO; in vgic_v2_set_attr()
428 if (ret != -ENXIO) in vgic_v2_get_attr()
431 switch (attr->group) { in vgic_v2_get_attr()
434 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_v2_get_attr()
435 u32 reg = 0; in vgic_v2_get_attr() local
437 ret = vgic_v2_attr_regs_access(dev, attr, ®, false); in vgic_v2_get_attr()
440 return put_user(reg, uaddr); in vgic_v2_get_attr()
444 return -ENXIO; in vgic_v2_get_attr()
450 switch (attr->group) { in vgic_v2_has_attr()
452 switch (attr->attr) { in vgic_v2_has_attr()
464 switch (attr->attr) { in vgic_v2_has_attr()
469 return -ENXIO; in vgic_v2_has_attr()
473 .name = "kvm-arm-vgic-v2",
490 if (attr->group != KVM_DEV_ARM_VGIC_GRP_DIST_REGS) { in vgic_v3_parse_attr()
491 vgic_mpidr = (attr->attr & KVM_DEV_ARM_VGIC_V3_MPIDR_MASK) >> in vgic_v3_parse_attr()
495 reg_attr->vcpu = kvm_mpidr_to_vcpu(dev->kvm, mpidr_reg); in vgic_v3_parse_attr()
497 reg_attr->vcpu = kvm_get_vcpu(dev->kvm, 0); in vgic_v3_parse_attr()
500 if (!reg_attr->vcpu) in vgic_v3_parse_attr()
501 return -EINVAL; in vgic_v3_parse_attr()
503 reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK; in vgic_v3_parse_attr()
509 * vgic_v3_attr_regs_access - allows user space to access VGIC v3 state
513 * @reg: address the value is read or written
518 u64 *reg, bool is_write) in vgic_v3_attr_regs_access() argument
521 gpa_t addr; in vgic_v3_attr_regs_access() local
531 addr = reg_attr.addr; in vgic_v3_attr_regs_access()
533 mutex_lock(&dev->kvm->lock); in vgic_v3_attr_regs_access()
535 if (unlikely(!vgic_initialized(dev->kvm))) { in vgic_v3_attr_regs_access()
536 ret = -EBUSY; in vgic_v3_attr_regs_access()
540 if (!lock_all_vcpus(dev->kvm)) { in vgic_v3_attr_regs_access()
541 ret = -EBUSY; in vgic_v3_attr_regs_access()
545 switch (attr->group) { in vgic_v3_attr_regs_access()
548 tmp32 = *reg; in vgic_v3_attr_regs_access()
550 ret = vgic_v3_dist_uaccess(vcpu, is_write, addr, &tmp32); in vgic_v3_attr_regs_access()
552 *reg = tmp32; in vgic_v3_attr_regs_access()
556 tmp32 = *reg; in vgic_v3_attr_regs_access()
558 ret = vgic_v3_redist_uaccess(vcpu, is_write, addr, &tmp32); in vgic_v3_attr_regs_access()
560 *reg = tmp32; in vgic_v3_attr_regs_access()
565 regid = (attr->attr & KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK); in vgic_v3_attr_regs_access()
567 regid, reg); in vgic_v3_attr_regs_access()
573 info = (attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >> in vgic_v3_attr_regs_access()
576 intid = attr->attr & in vgic_v3_attr_regs_access()
579 intid, reg); in vgic_v3_attr_regs_access()
581 ret = -EINVAL; in vgic_v3_attr_regs_access()
586 ret = -EINVAL; in vgic_v3_attr_regs_access()
590 unlock_all_vcpus(dev->kvm); in vgic_v3_attr_regs_access()
592 mutex_unlock(&dev->kvm->lock); in vgic_v3_attr_regs_access()
602 if (ret != -ENXIO) in vgic_v3_set_attr()
605 switch (attr->group) { in vgic_v3_set_attr()
608 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_v3_set_attr()
610 u64 reg; in vgic_v3_set_attr() local
613 return -EFAULT; in vgic_v3_set_attr()
615 reg = tmp32; in vgic_v3_set_attr()
616 return vgic_v3_attr_regs_access(dev, attr, ®, true); in vgic_v3_set_attr()
619 u64 __user *uaddr = (u64 __user *)(long)attr->addr; in vgic_v3_set_attr()
620 u64 reg; in vgic_v3_set_attr() local
622 if (get_user(reg, uaddr)) in vgic_v3_set_attr()
623 return -EFAULT; in vgic_v3_set_attr()
625 return vgic_v3_attr_regs_access(dev, attr, ®, true); in vgic_v3_set_attr()
628 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_v3_set_attr()
629 u64 reg; in vgic_v3_set_attr() local
633 return -EFAULT; in vgic_v3_set_attr()
635 reg = tmp32; in vgic_v3_set_attr()
636 return vgic_v3_attr_regs_access(dev, attr, ®, true); in vgic_v3_set_attr()
641 switch (attr->attr) { in vgic_v3_set_attr()
643 mutex_lock(&dev->kvm->lock); in vgic_v3_set_attr()
645 if (!lock_all_vcpus(dev->kvm)) { in vgic_v3_set_attr()
646 mutex_unlock(&dev->kvm->lock); in vgic_v3_set_attr()
647 return -EBUSY; in vgic_v3_set_attr()
649 ret = vgic_v3_save_pending_tables(dev->kvm); in vgic_v3_set_attr()
650 unlock_all_vcpus(dev->kvm); in vgic_v3_set_attr()
651 mutex_unlock(&dev->kvm->lock); in vgic_v3_set_attr()
657 return -ENXIO; in vgic_v3_set_attr()
666 if (ret != -ENXIO) in vgic_v3_get_attr()
669 switch (attr->group) { in vgic_v3_get_attr()
672 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_v3_get_attr()
673 u64 reg; in vgic_v3_get_attr() local
676 ret = vgic_v3_attr_regs_access(dev, attr, ®, false); in vgic_v3_get_attr()
679 tmp32 = reg; in vgic_v3_get_attr()
683 u64 __user *uaddr = (u64 __user *)(long)attr->addr; in vgic_v3_get_attr()
684 u64 reg; in vgic_v3_get_attr() local
686 ret = vgic_v3_attr_regs_access(dev, attr, ®, false); in vgic_v3_get_attr()
689 return put_user(reg, uaddr); in vgic_v3_get_attr()
692 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_v3_get_attr()
693 u64 reg; in vgic_v3_get_attr() local
696 ret = vgic_v3_attr_regs_access(dev, attr, ®, false); in vgic_v3_get_attr()
699 tmp32 = reg; in vgic_v3_get_attr()
703 return -ENXIO; in vgic_v3_get_attr()
709 switch (attr->group) { in vgic_v3_has_attr()
711 switch (attr->attr) { in vgic_v3_has_attr()
725 if (((attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >> in vgic_v3_has_attr()
732 switch (attr->attr) { in vgic_v3_has_attr()
739 return -ENXIO; in vgic_v3_has_attr()
743 .name = "kvm-arm-vgic-v3",