• Home
  • Raw
  • Download

Lines Matching +full:1 +full:- +full:lane

1 // SPDX-License-Identifier: GPL-2.0-or-later
37 int lane, int device, int reg, u16 *val) in mv88e6390_serdes_read() argument
41 return mv88e6xxx_phy_read(chip, lane, reg_c45, val); in mv88e6390_serdes_read()
45 int lane, int device, int reg, u16 val) in mv88e6390_serdes_write() argument
49 return mv88e6xxx_phy_write(chip, lane, reg_c45, val); in mv88e6390_serdes_write()
57 state->link = !!(status & MV88E6390_SGMII_PHY_STATUS_LINK); in mv88e6xxx_serdes_pcs_get_state()
58 state->duplex = status & in mv88e6xxx_serdes_pcs_get_state()
63 state->pause |= MLO_PAUSE_TX; in mv88e6xxx_serdes_pcs_get_state()
65 state->pause |= MLO_PAUSE_RX; in mv88e6xxx_serdes_pcs_get_state()
69 if (state->interface == PHY_INTERFACE_MODE_2500BASEX) in mv88e6xxx_serdes_pcs_get_state()
70 state->speed = SPEED_2500; in mv88e6xxx_serdes_pcs_get_state()
72 state->speed = SPEED_1000; in mv88e6xxx_serdes_pcs_get_state()
75 state->speed = SPEED_100; in mv88e6xxx_serdes_pcs_get_state()
78 state->speed = SPEED_10; in mv88e6xxx_serdes_pcs_get_state()
81 dev_err(chip->dev, "invalid PHY speed\n"); in mv88e6xxx_serdes_pcs_get_state()
82 return -EINVAL; in mv88e6xxx_serdes_pcs_get_state()
85 state->link = false; in mv88e6xxx_serdes_pcs_get_state()
88 if (state->interface == PHY_INTERFACE_MODE_2500BASEX) in mv88e6xxx_serdes_pcs_get_state()
89 mii_lpa_mod_linkmode_x(state->lp_advertising, lpa, in mv88e6xxx_serdes_pcs_get_state()
91 else if (state->interface == PHY_INTERFACE_MODE_1000BASEX) in mv88e6xxx_serdes_pcs_get_state()
92 mii_lpa_mod_linkmode_x(state->lp_advertising, lpa, in mv88e6xxx_serdes_pcs_get_state()
98 int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane, in mv88e6352_serdes_power() argument
120 u8 lane, unsigned int mode, in mv88e6352_serdes_pcs_config() argument
169 u8 lane, struct phylink_link_state *state) in mv88e6352_serdes_pcs_get_state() argument
176 dev_err(chip->dev, "can't read Serdes PHY status: %d\n", err); in mv88e6352_serdes_pcs_get_state()
182 dev_err(chip->dev, "can't read Serdes PHY LPA: %d\n", err); in mv88e6352_serdes_pcs_get_state()
190 u8 lane) in mv88e6352_serdes_pcs_an_restart() argument
203 u8 lane, int speed, int duplex) in mv88e6352_serdes_pcs_link_up() argument
235 u8 cmode = chip->ports[port].cmode; in mv88e6352_serdes_get_lane()
236 u8 lane = 0; in mv88e6352_serdes_get_lane() local
241 lane = 0xff; /* Unused */ in mv88e6352_serdes_get_lane()
243 return lane; in mv88e6352_serdes_get_lane()
284 memcpy(data + i * ETH_GSTRING_LEN, stat->string, in mv88e6352_serdes_get_strings()
297 err = mv88e6352_serdes_read(chip, stat->reg, &reg); in mv88e6352_serdes_get_stat()
299 dev_err(chip->dev, "failed to read statistic\n"); in mv88e6352_serdes_get_stat()
305 if (stat->sizeof_stat == 32) { in mv88e6352_serdes_get_stat()
306 err = mv88e6352_serdes_read(chip, stat->reg + 1, &reg); in mv88e6352_serdes_get_stat()
308 dev_err(chip->dev, "failed to read statistic\n"); in mv88e6352_serdes_get_stat()
320 struct mv88e6xxx_port *mv88e6xxx_port = &chip->ports[port]; in mv88e6352_serdes_get_stats()
329 ARRAY_SIZE(mv88e6xxx_port->serdes_stats)); in mv88e6352_serdes_get_stats()
334 mv88e6xxx_port->serdes_stats[i] += value; in mv88e6352_serdes_get_stats()
335 data[i] = mv88e6xxx_port->serdes_stats[i]; in mv88e6352_serdes_get_stats()
349 dev_err(chip->dev, "can't read Serdes BMSR: %d\n", err); in mv88e6352_serdes_irq_link()
353 dsa_port_phylink_mac_change(chip->ds, port, !!(bmsr & BMSR_LSTATUS)); in mv88e6352_serdes_irq_link()
357 u8 lane) in mv88e6352_serdes_irq_status() argument
375 int mv88e6352_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, u8 lane, in mv88e6352_serdes_irq_enable() argument
388 return irq_find_mapping(chip->g2_irq.domain, MV88E6352_SERDES_IRQ); in mv88e6352_serdes_irq_mapping()
416 u8 cmode = chip->ports[port].cmode; in mv88e6341_serdes_get_lane()
417 u8 lane = 0; in mv88e6341_serdes_get_lane() local
424 lane = MV88E6341_PORT5_LANE; in mv88e6341_serdes_get_lane()
428 return lane; in mv88e6341_serdes_get_lane()
433 u8 cmode = chip->ports[port].cmode; in mv88e6390_serdes_get_lane()
434 u8 lane = 0; in mv88e6390_serdes_get_lane() local
441 lane = MV88E6390_PORT9_LANE0; in mv88e6390_serdes_get_lane()
447 lane = MV88E6390_PORT10_LANE0; in mv88e6390_serdes_get_lane()
451 return lane; in mv88e6390_serdes_get_lane()
456 u8 cmode_port = chip->ports[port].cmode; in mv88e6390x_serdes_get_lane()
457 u8 cmode_port10 = chip->ports[10].cmode; in mv88e6390x_serdes_get_lane()
458 u8 cmode_port9 = chip->ports[9].cmode; in mv88e6390x_serdes_get_lane()
459 u8 lane = 0; in mv88e6390x_serdes_get_lane() local
467 lane = MV88E6390_PORT9_LANE1; in mv88e6390x_serdes_get_lane()
475 lane = MV88E6390_PORT9_LANE2; in mv88e6390x_serdes_get_lane()
483 lane = MV88E6390_PORT9_LANE3; in mv88e6390x_serdes_get_lane()
490 lane = MV88E6390_PORT10_LANE1; in mv88e6390x_serdes_get_lane()
498 lane = MV88E6390_PORT10_LANE2; in mv88e6390x_serdes_get_lane()
506 lane = MV88E6390_PORT10_LANE3; in mv88e6390x_serdes_get_lane()
514 lane = MV88E6390_PORT9_LANE0; in mv88e6390x_serdes_get_lane()
522 lane = MV88E6390_PORT10_LANE0; in mv88e6390x_serdes_get_lane()
526 return lane; in mv88e6390x_serdes_get_lane()
529 /* Set power up/down for 10GBASE-R and 10GBASE-X4/X2 */
530 static int mv88e6390_serdes_power_10g(struct mv88e6xxx_chip *chip, u8 lane, in mv88e6390_serdes_power_10g() argument
536 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_power_10g()
550 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_power_10g()
556 /* Set power up/down for SGMII and 1000Base-X */
557 static int mv88e6390_serdes_power_sgmii(struct mv88e6xxx_chip *chip, u8 lane, in mv88e6390_serdes_power_sgmii() argument
563 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_power_sgmii()
574 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_power_sgmii()
610 memcpy(data + i * ETH_GSTRING_LEN, stat->string, in mv88e6390_serdes_get_strings()
616 static uint64_t mv88e6390_serdes_get_stat(struct mv88e6xxx_chip *chip, int lane, in mv88e6390_serdes_get_stat() argument
623 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_get_stat()
624 stat->reg + i, &reg[i]); in mv88e6390_serdes_get_stat()
626 dev_err(chip->dev, "failed to read statistic\n"); in mv88e6390_serdes_get_stat()
631 return reg[0] | ((u64)reg[1] << 16) | ((u64)reg[2] << 32); in mv88e6390_serdes_get_stat()
638 int lane; in mv88e6390_serdes_get_stats() local
641 lane = mv88e6xxx_serdes_get_lane(chip, port); in mv88e6390_serdes_get_stats()
642 if (lane == 0) in mv88e6390_serdes_get_stats()
647 data[i] = mv88e6390_serdes_get_stat(chip, lane, stat); in mv88e6390_serdes_get_stats()
653 static int mv88e6390_serdes_enable_checker(struct mv88e6xxx_chip *chip, u8 lane) in mv88e6390_serdes_enable_checker() argument
658 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_enable_checker()
664 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_enable_checker()
668 int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane, in mv88e6390_serdes_power() argument
671 u8 cmode = chip->ports[port].cmode; in mv88e6390_serdes_power()
678 err = mv88e6390_serdes_power_sgmii(chip, lane, up); in mv88e6390_serdes_power()
682 err = mv88e6390_serdes_power_10g(chip, lane, up); in mv88e6390_serdes_power()
687 err = mv88e6390_serdes_enable_checker(chip, lane); in mv88e6390_serdes_power()
693 u8 lane, unsigned int mode, in mv88e6390_serdes_pcs_config() argument
720 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_config()
727 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_config()
733 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_config()
747 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_config()
752 int port, u8 lane, struct phylink_link_state *state) in mv88e6390_serdes_pcs_get_state_sgmii() argument
757 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_get_state_sgmii()
760 dev_err(chip->dev, "can't read Serdes PHY status: %d\n", err); in mv88e6390_serdes_pcs_get_state_sgmii()
764 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_get_state_sgmii()
767 dev_err(chip->dev, "can't read Serdes PHY LPA: %d\n", err); in mv88e6390_serdes_pcs_get_state_sgmii()
775 int port, u8 lane, struct phylink_link_state *state) in mv88e6390_serdes_pcs_get_state_10g() argument
780 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_get_state_10g()
785 state->link = !!(status & MDIO_STAT1_LSTATUS); in mv88e6390_serdes_pcs_get_state_10g()
786 if (state->link) { in mv88e6390_serdes_pcs_get_state_10g()
787 state->speed = SPEED_10000; in mv88e6390_serdes_pcs_get_state_10g()
788 state->duplex = DUPLEX_FULL; in mv88e6390_serdes_pcs_get_state_10g()
795 u8 lane, struct phylink_link_state *state) in mv88e6390_serdes_pcs_get_state() argument
797 switch (state->interface) { in mv88e6390_serdes_pcs_get_state()
801 return mv88e6390_serdes_pcs_get_state_sgmii(chip, port, lane, in mv88e6390_serdes_pcs_get_state()
805 return mv88e6390_serdes_pcs_get_state_10g(chip, port, lane, in mv88e6390_serdes_pcs_get_state()
809 return -EOPNOTSUPP; in mv88e6390_serdes_pcs_get_state()
814 u8 lane) in mv88e6390_serdes_pcs_an_restart() argument
819 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_an_restart()
824 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_an_restart()
830 u8 lane, int speed, int duplex) in mv88e6390_serdes_pcs_link_up() argument
835 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_link_up()
859 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_link_up()
864 int port, u8 lane) in mv88e6390_serdes_irq_link_sgmii() argument
870 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_irq_link_sgmii()
873 dev_err(chip->dev, "can't read Serdes BMSR: %d\n", err); in mv88e6390_serdes_irq_link_sgmii()
877 dsa_port_phylink_mac_change(chip->ds, port, !!(bmsr & BMSR_LSTATUS)); in mv88e6390_serdes_irq_link_sgmii()
881 u8 lane, bool enable) in mv88e6390_serdes_irq_enable_sgmii() argument
889 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_irq_enable_sgmii()
893 int mv88e6390_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, u8 lane, in mv88e6390_serdes_irq_enable() argument
896 u8 cmode = chip->ports[port].cmode; in mv88e6390_serdes_irq_enable()
902 return mv88e6390_serdes_irq_enable_sgmii(chip, lane, enable); in mv88e6390_serdes_irq_enable()
909 u8 lane, u16 *status) in mv88e6390_serdes_irq_status_sgmii() argument
913 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_irq_status_sgmii()
920 u8 lane) in mv88e6390_serdes_irq_status() argument
922 u8 cmode = chip->ports[port].cmode; in mv88e6390_serdes_irq_status()
931 err = mv88e6390_serdes_irq_status_sgmii(chip, lane, &status); in mv88e6390_serdes_irq_status()
937 mv88e6390_serdes_irq_link_sgmii(chip, port, lane); in mv88e6390_serdes_irq_status()
946 return irq_find_mapping(chip->g2_irq.domain, port); in mv88e6390_serdes_irq_mapping()
964 /* 10Gbase-X */
972 /* 10Gbase-R */
988 int lane; in mv88e6390_serdes_get_regs() local
992 lane = mv88e6xxx_serdes_get_lane(chip, port); in mv88e6390_serdes_get_regs()
993 if (lane == 0) in mv88e6390_serdes_get_regs()
997 mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_get_regs()