Lines Matching +full:0 +full:x43f00000
37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
59 #define WIDGET_CHIP_CTRL 0x15
60 #define WIDGET_DSP_CTRL 0x16
70 #define SCP_SET 0
107 #define VNODE_START_NID 0x80
117 #define EFFECT_START_NID 0x90
170 #define DSP_CAPTURE_INIT_LATENCY 0
181 int direct; /* 0:output; 1:input*/
187 #define EFX_DIR_OUT 0
193 .mid = 0x96,
194 .reqs = {0, 1},
197 .def_vals = {0x3F800000, 0x3F2B851F}
201 .mid = 0x96,
205 .def_vals = {0x3F800000, 0x3F266666}
209 .mid = 0x96,
213 .def_vals = {0x00000000, 0x3F000000}
217 .mid = 0x96,
221 .def_vals = {0x3F800000, 0x3F3D70A4, 0x00000000}
225 .mid = 0x96,
229 .def_vals = {0x3F800000, 0x42A00000, 0x3F000000}
233 .mid = 0x96,
238 .def_vals = {0x00000000, 0x00000000, 0x00000000, 0x00000000,
239 0x00000000, 0x00000000, 0x00000000, 0x00000000,
240 0x00000000, 0x00000000, 0x00000000, 0x00000000}
244 .mid = 0x95,
245 .reqs = {0, 1, 2, 3},
248 .def_vals = {0x00000000, 0x3F3A9692, 0x00000000, 0x00000000}
252 .mid = 0x95,
256 .def_vals = {0x3F800000, 0x3D7DF3B6, 0x41F00000, 0x41F00000}
260 .mid = 0x95,
264 .def_vals = {0x00000000, 0x3F3D70A4}
268 .mid = 0x95,
272 .def_vals = {0x3F800000, 0x3F000000}
276 .mid = 0x95,
280 .def_vals = {0x00000000, 0x43C80000, 0x44AF0000, 0x44FA0000,
281 0x3F800000, 0x3F800000, 0x3F800000, 0x00000000,
282 0x00000000}
290 #define TUNING_CTL_START_NID 0xC0
313 int direct; /* 0:output; 1:input*/
321 .mid = 0x95,
324 .def_val = 0x41F00000
329 .mid = 0x95,
332 .def_val = 0x3F3D70A4
337 .mid = 0x96,
340 .def_val = 0x00000000
345 .mid = 0x96,
348 .def_val = 0x00000000
353 .mid = 0x96,
356 .def_val = 0x00000000
361 .mid = 0x96,
364 .def_val = 0x00000000
369 .mid = 0x96,
372 .def_val = 0x00000000
377 .mid = 0x96,
380 .def_val = 0x00000000
385 .mid = 0x96,
388 .def_val = 0x00000000
393 .mid = 0x96,
396 .def_val = 0x00000000
401 .mid = 0x96,
404 .def_val = 0x00000000
409 .mid = 0x96,
412 .def_val = 0x00000000
435 .mid = 0x95,
441 .vals = { 0x00000000, 0x43C80000, 0x44AF0000,
442 0x44FA0000, 0x3F800000, 0x3F800000,
443 0x3F800000, 0x00000000, 0x00000000 }
446 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
447 0x44FA0000, 0x3F19999A, 0x3F866666,
448 0x3F800000, 0x00000000, 0x00000000 }
451 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
452 0x450AC000, 0x4017AE14, 0x3F6B851F,
453 0x3F800000, 0x00000000, 0x00000000 }
456 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
457 0x44FA0000, 0x40400000, 0x3F28F5C3,
458 0x3F800000, 0x00000000, 0x00000000 }
461 .vals = { 0x3F800000, 0x44324000, 0x44BB8000,
462 0x44E10000, 0x3FB33333, 0x3FB9999A,
463 0x3F800000, 0x3E3A2E43, 0x00000000 }
466 .vals = { 0x3F800000, 0x43EA0000, 0x44A52000,
467 0x45098000, 0x3F266666, 0x3FC00000,
468 0x3F800000, 0x00000000, 0x00000000 }
471 .vals = { 0x3F800000, 0x43C70000, 0x44AE6000,
472 0x45193000, 0x3F8E147B, 0x3F75C28F,
473 0x3F800000, 0x00000000, 0x00000000 }
476 .vals = { 0x3F800000, 0x43930000, 0x44BEE000,
477 0x45007000, 0x3F451EB8, 0x3F7851EC,
478 0x3F800000, 0x00000000, 0x00000000 }
481 .vals = { 0x3F800000, 0x43BFC5AC, 0x44B28FDF,
482 0x451F6000, 0x3F266666, 0x3FA7D945,
483 0x3F800000, 0x3CF5C28F, 0x00000000 }
486 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
487 0x44FA0000, 0x3FB2718B, 0x3F800000,
488 0xBC07010E, 0x00000000, 0x00000000 }
491 .vals = { 0x3F800000, 0x43C20000, 0x44906000,
492 0x44E70000, 0x3F4CCCCD, 0x3F8A3D71,
493 0x3F0A3D71, 0x00000000, 0x00000000 }
496 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
497 0x44FA0000, 0x3F800000, 0x3F800000,
498 0x3E4CCCCD, 0x00000000, 0x00000000 }
501 .vals = { 0x3F800000, 0x43A9C5AC, 0x44AA4FDF,
502 0x44FFC000, 0x3EDBB56F, 0x3F99C4CA,
503 0x3F800000, 0x00000000, 0x00000000 }
506 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
507 0x44FA0000, 0x3F800000, 0x3F1A043C,
508 0x3F800000, 0x00000000, 0x00000000 }
531 .mid = 0x96,
538 .vals = { 0x00000000, 0x00000000, 0x00000000,
539 0x00000000, 0x00000000, 0x00000000,
540 0x00000000, 0x00000000, 0x00000000,
541 0x00000000, 0x00000000 }
544 .vals = { 0x00000000, 0x00000000, 0x3F8CCCCD,
545 0x40000000, 0x00000000, 0x00000000,
546 0x00000000, 0x00000000, 0x40000000,
547 0x40000000, 0x40000000 }
550 .vals = { 0x00000000, 0x00000000, 0x40C00000,
551 0x40C00000, 0x40466666, 0x00000000,
552 0x00000000, 0x00000000, 0x00000000,
553 0x40466666, 0x40466666 }
556 .vals = { 0x00000000, 0xBF99999A, 0x00000000,
557 0x3FA66666, 0x3FA66666, 0x3F8CCCCD,
558 0x00000000, 0x00000000, 0x40000000,
559 0x40466666, 0x40800000 }
562 .vals = { 0x00000000, 0xBF99999A, 0x40000000,
563 0x40466666, 0x40866666, 0xBF99999A,
564 0xBF99999A, 0x00000000, 0x00000000,
565 0x40800000, 0x40800000 }
568 .vals = { 0x00000000, 0x00000000, 0x00000000,
569 0x3F8CCCCD, 0x40800000, 0x40800000,
570 0x40800000, 0x00000000, 0x3F8CCCCD,
571 0x40466666, 0x40466666 }
574 .vals = { 0x00000000, 0x00000000, 0x40000000,
575 0x40000000, 0x00000000, 0x00000000,
576 0x00000000, 0x3F8CCCCD, 0x40000000,
577 0x40000000, 0x40000000 }
580 .vals = { 0x00000000, 0xBFCCCCCD, 0x00000000,
581 0x40000000, 0x40000000, 0x00000000,
582 0xBF99999A, 0xBF99999A, 0x00000000,
583 0x40466666, 0x40C00000 }
586 .vals = { 0x00000000, 0xBF99999A, 0xBF99999A,
587 0x3F8CCCCD, 0x40000000, 0xBF99999A,
588 0xBF99999A, 0x00000000, 0x00000000,
589 0x40800000, 0x40800000 }
592 .vals = { 0x00000000, 0xC0000000, 0xBF99999A,
593 0xBF99999A, 0x00000000, 0x40466666,
594 0x40800000, 0x40466666, 0x00000000,
595 0x00000000, 0x3F8CCCCD }
607 SPEAKER_BASS_REDIRECT = 0x15,
608 SPEAKER_BASS_REDIRECT_XOVER_FREQ = 0x16,
609 /* Between 0x16-0x1a are the X-Bass reqs. */
610 SPEAKER_FULL_RANGE_FRONT_L_R = 0x1a,
611 SPEAKER_FULL_RANGE_CENTER_LFE = 0x1b,
612 SPEAKER_FULL_RANGE_REAR_L_R = 0x1c,
613 SPEAKER_FULL_RANGE_SURROUND_L_R = 0x1d,
614 SPEAKER_BASS_REDIRECT_SUB_GAIN = 0x1e,
619 * module ID 0x96, the output effects module.
625 * connect software, the QUERY_SPEAKER_EQ_ADDRESS req on mid 0x80 is
635 SPEAKER_TUNING_USE_SPEAKER_EQ = 0x1f,
636 SPEAKER_TUNING_ENABLE_CENTER_EQ = 0x20,
637 SPEAKER_TUNING_FRONT_LEFT_VOL_LEVEL = 0x21,
638 SPEAKER_TUNING_FRONT_RIGHT_VOL_LEVEL = 0x22,
639 SPEAKER_TUNING_CENTER_VOL_LEVEL = 0x23,
640 SPEAKER_TUNING_LFE_VOL_LEVEL = 0x24,
641 SPEAKER_TUNING_REAR_LEFT_VOL_LEVEL = 0x25,
642 SPEAKER_TUNING_REAR_RIGHT_VOL_LEVEL = 0x26,
643 SPEAKER_TUNING_SURROUND_LEFT_VOL_LEVEL = 0x27,
644 SPEAKER_TUNING_SURROUND_RIGHT_VOL_LEVEL = 0x28,
649 SPEAKER_TUNING_FRONT_LEFT_INVERT = 0x29,
650 SPEAKER_TUNING_FRONT_RIGHT_INVERT = 0x2a,
651 SPEAKER_TUNING_CENTER_INVERT = 0x2b,
652 SPEAKER_TUNING_LFE_INVERT = 0x2c,
653 SPEAKER_TUNING_REAR_LEFT_INVERT = 0x2d,
654 SPEAKER_TUNING_REAR_RIGHT_INVERT = 0x2e,
655 SPEAKER_TUNING_SURROUND_LEFT_INVERT = 0x2f,
656 SPEAKER_TUNING_SURROUND_RIGHT_INVERT = 0x30,
658 SPEAKER_TUNING_FRONT_LEFT_DELAY = 0x31,
659 SPEAKER_TUNING_FRONT_RIGHT_DELAY = 0x32,
660 SPEAKER_TUNING_CENTER_DELAY = 0x33,
661 SPEAKER_TUNING_LFE_DELAY = 0x34,
662 SPEAKER_TUNING_REAR_LEFT_DELAY = 0x35,
663 SPEAKER_TUNING_REAR_RIGHT_DELAY = 0x36,
664 SPEAKER_TUNING_SURROUND_LEFT_DELAY = 0x37,
665 SPEAKER_TUNING_SURROUND_RIGHT_DELAY = 0x38,
667 SPEAKER_TUNING_MAIN_VOLUME = 0x39,
668 SPEAKER_TUNING_MUTE = 0x3a,
709 #define DSP_VOL_OUT 0
720 .mid = 0x32,
724 .mid = 0x37,
738 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
739 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
741 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
743 { 0x3f, 0x3f, 0x00, 0x00, 0x00, 0x00 } },
747 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
748 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
750 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
752 { 0x3f, 0x3f, 0x00, 0x00, 0x02, 0x00 } },
764 .vals = { 0xff, 0x2c, 0xf5, 0x32 }
767 .vals = { 0x38, 0xa8, 0x3e, 0x4c }
770 .vals = { 0xff, 0xff, 0xff, 0x7f }
781 .val = 0xa0
784 .val = 0xc0
787 .val = 0x80
793 VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
794 VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
796 VENDOR_DSPIO_STATUS = 0xF01,
797 VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
798 VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
799 VENDOR_DSPIO_DSP_INIT = 0x703,
800 VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
801 VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
804 VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
805 VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
806 VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
807 VENDOR_CHIPIO_DATA_LOW = 0x300,
808 VENDOR_CHIPIO_DATA_HIGH = 0x400,
810 VENDOR_CHIPIO_8051_WRITE_DIRECT = 0x500,
811 VENDOR_CHIPIO_8051_READ_DIRECT = 0xD00,
813 VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
814 VENDOR_CHIPIO_STATUS = 0xF01,
815 VENDOR_CHIPIO_HIC_POST_READ = 0x702,
816 VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
818 VENDOR_CHIPIO_8051_DATA_WRITE = 0x707,
819 VENDOR_CHIPIO_8051_DATA_READ = 0xF07,
820 VENDOR_CHIPIO_8051_PMEM_READ = 0xF08,
821 VENDOR_CHIPIO_8051_IRAM_WRITE = 0x709,
822 VENDOR_CHIPIO_8051_IRAM_READ = 0xF09,
824 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
825 VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A,
827 VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
828 VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
829 VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
830 VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
831 VENDOR_CHIPIO_FLAG_SET = 0x70F,
832 VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
833 VENDOR_CHIPIO_PARAM_SET = 0x710,
834 VENDOR_CHIPIO_PARAM_GET = 0xF10,
836 VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
837 VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
838 VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
839 VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
841 VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17,
842 VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717,
843 VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18,
844 VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718,
846 VENDOR_CHIPIO_DMIC_CTL_SET = 0x788,
847 VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88,
848 VENDOR_CHIPIO_DMIC_PIN_SET = 0x789,
849 VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89,
850 VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A,
851 VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A,
853 VENDOR_CHIPIO_EAPD_SEL_SET = 0x78D
861 CONTROL_FLAG_C_MGR = 0,
918 /* 0: None, 1: Mic1In*/
920 /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
966 VENDOR_STATUS_DSPIO_OK = 0x00,
968 VENDOR_STATUS_DSPIO_BUSY = 0x01,
970 VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
972 VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
980 VENDOR_STATUS_CHIPIO_OK = 0x00,
982 VENDOR_STATUS_CHIPIO_BUSY = 0x01
989 SR_6_000 = 0x00,
990 SR_8_000 = 0x01,
991 SR_9_600 = 0x02,
992 SR_11_025 = 0x03,
993 SR_16_000 = 0x04,
994 SR_22_050 = 0x05,
995 SR_24_000 = 0x06,
996 SR_32_000 = 0x07,
997 SR_44_100 = 0x08,
998 SR_48_000 = 0x09,
999 SR_88_200 = 0x0A,
1000 SR_96_000 = 0x0B,
1001 SR_144_000 = 0x0C,
1002 SR_176_400 = 0x0D,
1003 SR_192_000 = 0x0E,
1004 SR_384_000 = 0x0F,
1006 SR_COUNT = 0x10,
1008 SR_RATE_UNKNOWN = 0x1F
1013 DSP_DOWNLOAD_INIT = 0,
1019 #define get_hdafmt_chs(fmt) (fmt & 0xf)
1020 #define get_hdafmt_bits(fmt) ((fmt >> 4) & 0x7)
1021 #define get_hdafmt_rate(fmt) ((fmt >> 8) & 0x7f)
1022 #define get_hdafmt_type(fmt) ((fmt >> 15) & 0x1)
1160 { 0x0b, 0x90170110 }, /* Builtin Speaker */
1161 { 0x0c, 0x411111f0 }, /* N/A */
1162 { 0x0d, 0x411111f0 }, /* N/A */
1163 { 0x0e, 0x411111f0 }, /* N/A */
1164 { 0x0f, 0x0321101f }, /* HP */
1165 { 0x10, 0x411111f0 }, /* Headset? disabled for now */
1166 { 0x11, 0x03a11021 }, /* Mic */
1167 { 0x12, 0xd5a30140 }, /* Builtin Mic */
1168 { 0x13, 0x411111f0 }, /* N/A */
1169 { 0x18, 0x411111f0 }, /* N/A */
1175 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1176 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1177 { 0x0d, 0x014510f0 }, /* Digital Out */
1178 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1179 { 0x0f, 0x0221701f }, /* Port A -- BackPanel HP */
1180 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1181 { 0x11, 0x01017014 }, /* Port B -- LineMicIn2 / Rear L/R */
1182 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1183 { 0x13, 0x908700f0 }, /* What U Hear In*/
1184 { 0x18, 0x50d000f0 }, /* N/A */
1190 { 0x0b, 0x01047110 }, /* Port G -- Lineout FRONT L/R */
1191 { 0x0c, 0x414510f0 }, /* SPDIF Out 1 - Disabled*/
1192 { 0x0d, 0x014510f0 }, /* Digital Out */
1193 { 0x0e, 0x41c520f0 }, /* SPDIF In - Disabled*/
1194 { 0x0f, 0x0122711f }, /* Port A -- BackPanel HP */
1195 { 0x10, 0x01017111 }, /* Port D -- Center/LFE */
1196 { 0x11, 0x01017114 }, /* Port B -- LineMicIn2 / Rear L/R */
1197 { 0x12, 0x01a271f0 }, /* Port C -- LineIn1 */
1198 { 0x13, 0x908700f0 }, /* What U Hear In*/
1199 { 0x18, 0x50d000f0 }, /* N/A */
1205 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1206 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1207 { 0x0d, 0x014510f0 }, /* Digital Out */
1208 { 0x0e, 0x01c520f0 }, /* SPDIF In */
1209 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1210 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1211 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1212 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1213 { 0x13, 0x908700f0 }, /* What U Hear In*/
1214 { 0x18, 0x50d000f0 }, /* N/A */
1220 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1221 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1222 { 0x0d, 0x014510f0 }, /* Digital Out */
1223 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1224 { 0x0f, 0x01017114 }, /* Port A -- Rear L/R. */
1225 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1226 { 0x11, 0x012170ff }, /* Port B -- LineMicIn2 / Rear Headphone */
1227 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1228 { 0x13, 0x908700f0 }, /* What U Hear In*/
1229 { 0x18, 0x50d000f0 }, /* N/A */
1235 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1236 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1237 { 0x0d, 0x014510f0 }, /* Digital Out */
1238 { 0x0e, 0x41c520f0 }, /* SPDIF In */
1239 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1240 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1241 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1242 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1243 { 0x13, 0x908700f0 }, /* What U Hear In*/
1244 { 0x18, 0x500000f0 }, /* N/A */
1249 { 0x0b, 0x01017010 },
1250 { 0x0c, 0x014510f0 },
1251 { 0x0d, 0x414510f0 },
1252 { 0x0e, 0x01c520f0 },
1253 { 0x0f, 0x01017114 },
1254 { 0x10, 0x01017011 },
1255 { 0x11, 0x018170ff },
1256 { 0x12, 0x01a170f0 },
1257 { 0x13, 0x908700f0 },
1258 { 0x18, 0x500000f0 },
1263 SND_PCI_QUIRK(0x1028, 0x057b, "Alienware M17x R4", QUIRK_ALIENWARE_M17XR4),
1264 SND_PCI_QUIRK(0x1028, 0x0685, "Alienware 15 2015", QUIRK_ALIENWARE),
1265 SND_PCI_QUIRK(0x1028, 0x0688, "Alienware 17 2015", QUIRK_ALIENWARE),
1266 SND_PCI_QUIRK(0x1028, 0x0708, "Alienware 15 R2 2016", QUIRK_ALIENWARE),
1267 SND_PCI_QUIRK(0x1102, 0x0010, "Sound Blaster Z", QUIRK_SBZ),
1268 SND_PCI_QUIRK(0x1102, 0x0023, "Sound Blaster Z", QUIRK_SBZ),
1269 SND_PCI_QUIRK(0x1102, 0x0027, "Sound Blaster Z", QUIRK_SBZ),
1270 SND_PCI_QUIRK(0x1102, 0x0033, "Sound Blaster ZxR", QUIRK_SBZ),
1271 SND_PCI_QUIRK(0x1458, 0xA016, "Recon3Di", QUIRK_R3DI),
1272 SND_PCI_QUIRK(0x1458, 0xA026, "Gigabyte G1.Sniper Z97", QUIRK_R3DI),
1273 SND_PCI_QUIRK(0x1458, 0xA036, "Gigabyte GA-Z170X-Gaming 7", QUIRK_R3DI),
1274 SND_PCI_QUIRK(0x3842, 0x1038, "EVGA X99 Classified", QUIRK_R3DI),
1275 SND_PCI_QUIRK(0x1102, 0x0013, "Recon3D", QUIRK_R3D),
1276 SND_PCI_QUIRK(0x1102, 0x0018, "Recon3D", QUIRK_R3D),
1277 SND_PCI_QUIRK(0x1102, 0x0051, "Sound Blaster AE-5", QUIRK_AE5),
1278 SND_PCI_QUIRK(0x1102, 0x0191, "Sound Blaster AE-5 Plus", QUIRK_AE5),
1279 SND_PCI_QUIRK(0x1102, 0x0081, "Sound Blaster AE-7", QUIRK_AE7),
1287 unsigned int dac2port; /* ParamID 0x0d value. */
1322 { .dac2port = 0x24,
1326 .mmio_gpio_count = 0,
1327 .scp_cmds_count = 0,
1331 { .dac2port = 0x21,
1334 .hda_gpio_set = 0,
1335 .mmio_gpio_count = 0,
1336 .scp_cmds_count = 0,
1345 { .dac2port = 0x24,
1350 .scp_cmds_count = 0,
1354 { .dac2port = 0x21,
1358 .mmio_gpio_set = { 0 },
1359 .scp_cmds_count = 0,
1368 { .dac2port = 0x18,
1372 .mmio_gpio_set = { 0, 1, 1 },
1373 .scp_cmds_count = 0,
1376 { .dac2port = 0x12,
1380 .mmio_gpio_set = { 1, 1, 0 },
1381 .scp_cmds_count = 0,
1390 { .dac2port = 0x24,
1394 .mmio_gpio_set = { 1, 1, 0 },
1395 .scp_cmds_count = 0,
1399 { .dac2port = 0x21,
1403 .mmio_gpio_set = { 0, 1, 1 },
1404 .scp_cmds_count = 0,
1413 { .dac2port = 0xa4,
1415 .mmio_gpio_count = 0,
1417 .scp_cmd_mid = { 0x96, 0x96 },
1422 .chipio_write_addr = 0x0018b03c,
1423 .chipio_write_data = 0x00000012
1426 { .dac2port = 0xa1,
1428 .mmio_gpio_count = 0,
1430 .scp_cmd_mid = { 0x96, 0x96 },
1435 .chipio_write_addr = 0x0018b03c,
1436 .chipio_write_data = 0x00000012
1444 { .dac2port = 0x58,
1447 .mmio_gpio_pin = { 0 },
1450 .scp_cmd_mid = { 0x96, 0x96 },
1455 .chipio_write_addr = 0x0018b03c,
1456 .chipio_write_data = 0x00000000
1459 { .dac2port = 0x58,
1462 .mmio_gpio_pin = { 0 },
1465 .scp_cmd_mid = { 0x96, 0x96 },
1470 .chipio_write_addr = 0x0018b03c,
1471 .chipio_write_data = 0x00000010
1483 response = snd_hda_codec_read(codec, nid, 0, verb, parm); in codec_send_command()
1486 return ((response == -1) ? -1 : 0); in codec_send_command()
1493 converter_format & 0xffff, res); in codec_set_converter_format()
1500 unsigned char converter_stream_channel = 0; in codec_set_converter_stream_channel()
1502 converter_stream_channel = (stream << 4) | (channel & 0x0f); in codec_set_converter_stream_channel()
1517 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_send()
1520 return 0; in chipio_send()
1537 return 0; in chipio_write_address()
1541 chip_addx & 0xffff); in chipio_write_address()
1549 spec->curr_chip_addx = (res < 0) ? ~0U : chip_addx; in chipio_write_address()
1563 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff); in chipio_write_data()
1574 (spec->curr_chip_addx + 4) : ~0U; in chipio_write_data()
1585 int status = 0; in chipio_write_data_multiple()
1592 while ((count-- != 0) && (status == 0)) in chipio_write_data_multiple()
1608 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0); in chipio_read_data()
1612 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in chipio_read_data()
1617 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_read_data()
1619 0); in chipio_read_data()
1625 (spec->curr_chip_addx + 4) : ~0U; in chipio_read_data()
1643 if (err < 0) in chipio_write()
1647 if (err < 0) in chipio_write()
1667 if (err < 0) in chipio_write_no_mutex()
1671 if (err < 0) in chipio_write_no_mutex()
1692 if (status < 0) in chipio_write_multiple()
1716 if (err < 0) in chipio_read()
1720 if (err < 0) in chipio_read()
1738 flag_bit = (flag_state ? 1 : 0); in chipio_set_control_flag()
1740 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_flag()
1755 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1759 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param()
1760 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1763 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1781 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1784 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param_no_mutex()
1785 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1788 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1860 * 0x80-0xFF.
1868 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, verb, addr); in chipio_8051_write_direct()
1879 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1880 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0); in chipio_enable_clocks()
1881 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1882 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff); in chipio_enable_clocks()
1883 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1885 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1886 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x0b); in chipio_enable_clocks()
1887 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1889 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1890 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff); in chipio_enable_clocks()
1905 res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data); in dspio_send()
1906 if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY)) in dspio_send()
1923 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write_wait()
1924 VENDOR_DSPIO_STATUS, 0); in dspio_write_wait()
1944 scp_data & 0xffff); in dspio_write()
1945 if (status < 0) in dspio_write()
1950 if (status < 0) in dspio_write()
1954 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write()
1955 VENDOR_DSPIO_STATUS, 0); in dspio_write()
1960 -EIO : 0; in dspio_write()
1969 int status = 0; in dspio_write_multiple()
1975 count = 0; in dspio_write_multiple()
1978 if (status != 0) in dspio_write_multiple()
1990 status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0); in dspio_read()
1994 status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0); in dspio_read()
1999 *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_read()
2000 VENDOR_DSPIO_SCP_READ_DATA, 0); in dspio_read()
2002 return 0; in dspio_read()
2008 int status = 0; in dspio_read_multiple()
2017 count = 0; in dspio_read_multiple()
2020 if (status != 0) in dspio_read_multiple()
2026 if (status == 0) { in dspio_read_multiple()
2029 if (status != 0) in dspio_read_multiple()
2048 unsigned int header = 0; in make_scp_header()
2050 header = (data_size & 0x1f) << 27; in make_scp_header()
2051 header |= (error_flag & 0x01) << 26; in make_scp_header()
2052 header |= (resp_flag & 0x01) << 25; in make_scp_header()
2053 header |= (device_flag & 0x01) << 24; in make_scp_header()
2054 header |= (req & 0x7f) << 17; in make_scp_header()
2055 header |= (get_flag & 0x01) << 16; in make_scp_header()
2056 header |= (source_id & 0xff) << 8; in make_scp_header()
2057 header |= target_id & 0xff; in make_scp_header()
2073 *data_size = (header >> 27) & 0x1f; in extract_scp_header()
2075 *error_flag = (header >> 26) & 0x01; in extract_scp_header()
2077 *resp_flag = (header >> 25) & 0x01; in extract_scp_header()
2079 *device_flag = (header >> 24) & 0x01; in extract_scp_header()
2081 *req = (header >> 17) & 0x7f; in extract_scp_header()
2083 *get_flag = (header >> 16) & 0x01; in extract_scp_header()
2085 *source_id = (header >> 8) & 0xff; in extract_scp_header()
2087 *target_id = header & 0xff; in extract_scp_header()
2101 unsigned int dummy = 0; in dspio_clear_response_queue()
2107 } while (status == 0 && time_before(jiffies, timeout)); in dspio_clear_response_queue()
2113 unsigned int data = 0; in dspio_get_response_data()
2116 if (dspio_read(codec, &data) < 0) in dspio_get_response_data()
2119 if ((data & 0x00ffffff) == spec->wait_scp_header) { in dspio_get_response_data()
2125 return 0; in dspio_get_response_data()
2143 unsigned int scp_send_size = 0; in dspio_send_scp_message()
2152 *bytes_returned = 0; in dspio_send_scp_message()
2173 spec->wait_scp_header &= 0xffff0000; in dspio_send_scp_message()
2182 if (status < 0) { in dspio_send_scp_message()
2183 spec->wait_scp = 0; in dspio_send_scp_message()
2189 memset(return_buf, 0, return_buf_size); in dspio_send_scp_message()
2200 status = 0; in dspio_send_scp_message()
2204 spec->wait_scp = 0; in dspio_send_scp_message()
2228 int status = 0; in dspio_scp()
2234 memset(&scp_send, 0, sizeof(scp_send)); in dspio_scp()
2235 memset(&scp_reply, 0, sizeof(scp_reply)); in dspio_scp()
2237 if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS)) in dspio_scp()
2245 if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) { in dspio_scp()
2251 0, 0, 0, len/sizeof(unsigned int)); in dspio_scp()
2252 if (data != NULL && len > 0) { in dspio_scp()
2257 ret_bytes = 0; in dspio_scp()
2263 if (status < 0) { in dspio_scp()
2276 return 0; in dspio_scp()
2316 return dspio_set_param(codec, mod_id, 0x20, req, &data, in dspio_set_uint_param()
2323 return dspio_set_param(codec, mod_id, 0x00, req, &data, in dspio_set_uint_param_no_source()
2332 int status = 0; in dspio_alloc_dma_chan()
2336 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_alloc_dma_chan()
2337 MASTERCONTROL_ALLOC_DMA_CHAN, SCP_GET, NULL, 0, in dspio_alloc_dma_chan()
2340 if (status < 0) { in dspio_alloc_dma_chan()
2345 if ((*dma_chan + 1) == 0) { in dspio_alloc_dma_chan()
2361 int status = 0; in dspio_free_dma_chan()
2362 unsigned int dummy = 0; in dspio_free_dma_chan()
2367 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_free_dma_chan()
2371 if (status < 0) { in dspio_free_dma_chan()
2391 if (err < 0) in dsp_set_run_state()
2397 if (halt_state != 0) { in dsp_set_run_state()
2402 if (err < 0) in dsp_set_run_state()
2409 if (err < 0) in dsp_set_run_state()
2413 return 0; in dsp_set_run_state()
2426 res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0); in dsp_reset()
2435 return 0; in dsp_reset()
2469 (DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0); in dsp_is_dma_active()
2478 int status = 0; in dsp_dma_setup_common()
2504 active = 0; in dsp_dma_setup_common()
2512 if (status < 0) { in dsp_dma_setup_common()
2527 if (status < 0) { in dsp_dma_setup_common()
2537 if (status < 0) { in dsp_dma_setup_common()
2548 if (status < 0) { in dsp_dma_setup_common()
2557 if (status < 0) { in dsp_dma_setup_common()
2565 if (status < 0) { in dsp_dma_setup_common()
2572 "ChipA=0x%x,DspA=0x%x,dmaCh=%u, " in dsp_dma_setup_common()
2573 "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n", in dsp_dma_setup_common()
2579 return 0; in dsp_dma_setup_common()
2590 int status = 0; in dsp_dma_setup()
2597 unsigned int dma_cfg = 0; in dsp_dma_setup()
2598 unsigned int adr_ofs = 0; in dsp_dma_setup()
2599 unsigned int xfr_cnt = 0; in dsp_dma_setup()
2619 incr_field = 0; in dsp_dma_setup()
2632 if (status < 0) { in dsp_dma_setup()
2639 (code ? 0 : 1)); in dsp_dma_setup()
2643 if (status < 0) { in dsp_dma_setup()
2657 if (status < 0) { in dsp_dma_setup()
2664 "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, " in dsp_dma_setup()
2665 "ADROFS=0x%x, XFRCNT=0x%x\n", in dsp_dma_setup()
2670 return 0; in dsp_dma_setup()
2679 unsigned int reg = 0; in dsp_dma_start()
2680 int status = 0; in dsp_dma_start()
2688 if (status < 0) { in dsp_dma_start()
2700 if (status < 0) { in dsp_dma_start()
2715 unsigned int reg = 0; in dsp_dma_stop()
2716 int status = 0; in dsp_dma_stop()
2724 if (status < 0) { in dsp_dma_stop()
2735 if (status < 0) { in dsp_dma_stop()
2761 int status = 0; in dsp_allocate_router_ports()
2765 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2766 if (status < 0) in dsp_allocate_router_ports()
2773 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2777 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2781 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2782 if (status < 0) in dsp_allocate_router_ports()
2785 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2786 VENDOR_CHIPIO_PORT_ALLOC_GET, 0); in dsp_allocate_router_ports()
2790 return (res < 0) ? res : 0; in dsp_allocate_router_ports()
2798 int status = 0; in dsp_free_router_ports()
2800 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2801 if (status < 0) in dsp_free_router_ports()
2804 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_free_router_ports()
2808 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2830 rate_multi, 0, port_map); in dsp_allocate_ports()
2844 unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1; in dsp_allocate_ports_format()
2870 if (status < 0) { in dsp_free_ports()
2891 DMA_STATE_STOP = 0,
2903 channels, SNDRV_PCM_FORMAT_S32_LE, 32, 0); in dma_convert_to_hda_format()
2908 return 0; in dma_convert_to_hda_format()
2927 if (status < 0) in dma_reset()
2930 return 0; in dma_reset()
2945 return 0; in dma_set_state()
2949 return 0; in dma_set_state()
2967 return 0; in dma_xfer()
2992 static const u32 g_magic_value = 0x4c46584d;
2993 static const u32 g_chip_addr_magic_value = 0xFFFFFF01;
3007 return p->count == 0; in is_last()
3024 #define INVALID_DMA_CHANNEL (~0U)
3046 status = chipio_write(codec, data[0], data[1]); in dspxfr_hci_write()
3047 if (status < 0) { in dspxfr_hci_write()
3054 return 0; in dspxfr_hci_write()
3063 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3080 int status = 0; in dspxfr_one_seg()
3112 if (fls == NULL || dma_engine == NULL || port_map_mask == 0) { in dspxfr_one_seg()
3122 return hci_write ? dspxfr_hci_write(codec, hci_write) : 0; in dspxfr_one_seg()
3124 chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2); in dspxfr_one_seg()
3144 sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1; in dspxfr_one_seg()
3148 hda_frame_size_words = ((sample_rate_div == 0) ? 0 : in dspxfr_one_seg()
3151 if (hda_frame_size_words == 0) { in dspxfr_one_seg()
3161 "chpadr=0x%08x frmsz=%u nchan=%u " in dspxfr_one_seg()
3179 while (words_to_write != 0) { in dspxfr_one_seg()
3186 if (status < 0) in dspxfr_one_seg()
3190 if (status < 0) in dspxfr_one_seg()
3197 if (status < 0) in dspxfr_one_seg()
3200 if (status < 0) in dspxfr_one_seg()
3207 if (status < 0) in dspxfr_one_seg()
3209 if (remainder_words != 0) { in dspxfr_one_seg()
3214 if (status < 0) in dspxfr_one_seg()
3216 remainder_words = 0; in dspxfr_one_seg()
3220 if (status < 0) in dspxfr_one_seg()
3239 if (status < 0) in dspxfr_one_seg()
3247 if (remainder_words != 0) { in dspxfr_one_seg()
3260 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3277 unsigned short hda_format = 0; in dspxfr_image()
3279 unsigned char stream_id = 0; in dspxfr_image()
3303 dma_chan = ovly ? INVALID_DMA_CHANNEL : 0; in dspxfr_image()
3308 if (status < 0) { in dspxfr_image()
3317 if (status < 0) in dspxfr_image()
3323 if (status < 0) { in dspxfr_image()
3330 port_map_mask = 0; in dspxfr_image()
3333 if (status < 0) { in dspxfr_image()
3340 WIDGET_CHIP_CTRL, stream_id, 0, &response); in dspxfr_image()
3341 if (status < 0) { in dspxfr_image()
3355 if (status < 0) in dspxfr_image()
3365 if (port_map_mask != 0) in dspxfr_image()
3368 if (status < 0) in dspxfr_image()
3372 WIDGET_CHIP_CTRL, 0, 0, &response); in dspxfr_image()
3395 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); in dspload_post_setup()
3396 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000); in dspload_post_setup()
3399 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002); in dspload_post_setup()
3409 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3412 * @router_chans: number of audio router channels to be allocated (0 means use
3428 int status = 0; in dspload_image()
3433 if (router_chans == 0) { in dspload_image()
3453 if (status < 0) in dspload_image()
3460 if (status < 0) in dspload_image()
3470 } while (0); in dspload_image()
3478 unsigned int data = 0; in dspload_is_loaded()
3479 int status = 0; in dspload_is_loaded()
3481 status = chipio_read(codec, 0x40004, &data); in dspload_is_loaded()
3482 if ((status < 0) || (data != 1)) in dspload_is_loaded()
3515 * the mmio address 0x320 is used to set GPIO pins. The format for the data
3528 gpio_data = gpio_pin & 0xF; in ca0113_mmio_gpio_set()
3529 gpio_data |= ((enable << 8) & 0x100); in ca0113_mmio_gpio_set()
3531 writew(gpio_data, spec->mem_base + 0x320); in ca0113_mmio_gpio_set()
3548 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3549 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3550 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3551 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3552 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3554 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3555 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set()
3557 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3558 write_val = (target & 0xff); in ca0113_mmio_command_set()
3562 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set()
3568 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set()
3569 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set()
3570 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set()
3572 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3573 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3574 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3575 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3587 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3588 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3589 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3590 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3591 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3593 writel(0x00800003, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3594 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set_type2()
3596 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3597 write_val = (target & 0xff); in ca0113_mmio_command_set_type2()
3601 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set_type2()
3603 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set_type2()
3604 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set_type2()
3605 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set_type2()
3607 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3608 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3609 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3610 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3629 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3630 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ca0132_gpio_init()
3631 snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23); in ca0132_gpio_init()
3634 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3635 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B); in ca0132_gpio_init()
3650 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3651 AC_VERB_SET_GPIO_DIRECTION, 0x07); in ca0132_gpio_setup()
3652 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3653 AC_VERB_SET_GPIO_MASK, 0x07); in ca0132_gpio_setup()
3654 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3655 AC_VERB_SET_GPIO_DATA, 0x04); in ca0132_gpio_setup()
3656 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3657 AC_VERB_SET_GPIO_DATA, 0x06); in ca0132_gpio_setup()
3660 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3661 AC_VERB_SET_GPIO_DIRECTION, 0x1E); in ca0132_gpio_setup()
3662 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3663 AC_VERB_SET_GPIO_MASK, 0x1F); in ca0132_gpio_setup()
3664 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3665 AC_VERB_SET_GPIO_DATA, 0x0C); in ca0132_gpio_setup()
3677 /* Bit 1 - Switch between front/rear mic. 0 = rear, 1 = front */
3679 /* Bit 2 - Switch between headphone/line out. 0 = Headphone, 1 = Line */
3694 /* Set GPIO bit 1 to 0 for rear mic */
3695 R3DI_REAR_MIC = 0,
3701 /* Set GPIO bit 2 to 0 for headphone */
3702 R3DI_HEADPHONE_OUT = 0,
3708 R3DI_DSP_DOWNLOADING = 0,
3720 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_mic_set()
3730 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_mic_set()
3740 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_dsp_status_set()
3745 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3749 /* Set DOWNLOADING bit to 0. */ in r3di_gpio_dsp_status_set()
3752 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3759 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3774 snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format); in ca0132_playback_pcm_prepare()
3776 return 0; in ca0132_playback_pcm_prepare()
3786 return 0; in ca0132_playback_pcm_cleanup()
3793 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_playback_pcm_cleanup()
3795 return 0; in ca0132_playback_pcm_cleanup()
3807 return 0; in ca0132_playback_pcm_delay()
3871 stream_tag, 0, format); in ca0132_capture_pcm_prepare()
3873 return 0; in ca0132_capture_pcm_prepare()
3883 return 0; in ca0132_capture_pcm_cleanup()
3886 return 0; in ca0132_capture_pcm_cleanup()
3898 return 0; in ca0132_capture_pcm_delay()
3924 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3942 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3951 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3971 0xC2B40000, 0xC2B20000, 0xC2B00000, 0xC2AE0000, 0xC2AC0000, 0xC2AA0000,
3972 0xC2A80000, 0xC2A60000, 0xC2A40000, 0xC2A20000, 0xC2A00000, 0xC29E0000,
3973 0xC29C0000, 0xC29A0000, 0xC2980000, 0xC2960000, 0xC2940000, 0xC2920000,
3974 0xC2900000, 0xC28E0000, 0xC28C0000, 0xC28A0000, 0xC2880000, 0xC2860000,
3975 0xC2840000, 0xC2820000, 0xC2800000, 0xC27C0000, 0xC2780000, 0xC2740000,
3976 0xC2700000, 0xC26C0000, 0xC2680000, 0xC2640000, 0xC2600000, 0xC25C0000,
3977 0xC2580000, 0xC2540000, 0xC2500000, 0xC24C0000, 0xC2480000, 0xC2440000,
3978 0xC2400000, 0xC23C0000, 0xC2380000, 0xC2340000, 0xC2300000, 0xC22C0000,
3979 0xC2280000, 0xC2240000, 0xC2200000, 0xC21C0000, 0xC2180000, 0xC2140000,
3980 0xC2100000, 0xC20C0000, 0xC2080000, 0xC2040000, 0xC2000000, 0xC1F80000,
3981 0xC1F00000, 0xC1E80000, 0xC1E00000, 0xC1D80000, 0xC1D00000, 0xC1C80000,
3982 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
3983 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
3984 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
3985 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
3986 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
3987 0x40C00000, 0x40E00000, 0x41000000, 0x41100000
3991 * This table counts from float 0 to 1 in increments of .01, which is
3995 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
3996 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
3997 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
3998 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
3999 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4000 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4001 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4002 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4003 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4004 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4005 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4006 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4007 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4008 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4009 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4010 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4011 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4019 0x41200000, 0x41A00000, 0x41F00000, 0x42200000, 0x42480000, 0x42700000,
4020 0x428C0000, 0x42A00000, 0x42B40000, 0x42C80000, 0x42DC0000, 0x42F00000,
4021 0x43020000, 0x430C0000, 0x43160000, 0x43200000, 0x432A0000, 0x43340000,
4022 0x433E0000, 0x43480000, 0x43520000, 0x435C0000, 0x43660000, 0x43700000,
4023 0x437A0000, 0x43820000, 0x43870000, 0x438C0000, 0x43910000, 0x43960000,
4024 0x439B0000, 0x43A00000, 0x43A50000, 0x43AA0000, 0x43AF0000, 0x43B40000,
4025 0x43B90000, 0x43BE0000, 0x43C30000, 0x43C80000, 0x43CD0000, 0x43D20000,
4026 0x43D70000, 0x43DC0000, 0x43E10000, 0x43E60000, 0x43EB0000, 0x43F00000,
4027 0x43F50000, 0x43FA0000, 0x43FF0000, 0x44020000, 0x44048000, 0x44070000,
4028 0x44098000, 0x440C0000, 0x440E8000, 0x44110000, 0x44138000, 0x44160000,
4029 0x44188000, 0x441B0000, 0x441D8000, 0x44200000, 0x44228000, 0x44250000,
4030 0x44278000, 0x442A0000, 0x442C8000, 0x442F0000, 0x44318000, 0x44340000,
4031 0x44368000, 0x44390000, 0x443B8000, 0x443E0000, 0x44408000, 0x44430000,
4032 0x44458000, 0x44480000, 0x444A8000, 0x444D0000, 0x444F8000, 0x44520000,
4033 0x44548000, 0x44570000, 0x44598000, 0x445C0000, 0x445E8000, 0x44610000,
4034 0x44638000, 0x44660000, 0x44688000, 0x446B0000, 0x446D8000, 0x44700000,
4035 0x44728000, 0x44750000, 0x44778000, 0x447A0000
4042 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000, 0x41C00000, 0x41C80000,
4043 0x41D00000, 0x41D80000, 0x41E00000, 0x41E80000, 0x41F00000, 0x41F80000,
4044 0x42000000, 0x42040000, 0x42080000, 0x420C0000, 0x42100000, 0x42140000,
4045 0x42180000, 0x421C0000, 0x42200000, 0x42240000, 0x42280000, 0x422C0000,
4046 0x42300000, 0x42340000, 0x42380000, 0x423C0000, 0x42400000, 0x42440000,
4047 0x42480000, 0x424C0000, 0x42500000, 0x42540000, 0x42580000, 0x425C0000,
4048 0x42600000, 0x42640000, 0x42680000, 0x426C0000, 0x42700000, 0x42740000,
4049 0x42780000, 0x427C0000, 0x42800000, 0x42820000, 0x42840000, 0x42860000,
4050 0x42880000, 0x428A0000, 0x428C0000, 0x428E0000, 0x42900000, 0x42920000,
4051 0x42940000, 0x42960000, 0x42980000, 0x429A0000, 0x429C0000, 0x429E0000,
4052 0x42A00000, 0x42A20000, 0x42A40000, 0x42A60000, 0x42A80000, 0x42AA0000,
4053 0x42AC0000, 0x42AE0000, 0x42B00000, 0x42B20000, 0x42B40000, 0x42B60000,
4054 0x42B80000, 0x42BA0000, 0x42BC0000, 0x42BE0000, 0x42C00000, 0x42C20000,
4055 0x42C40000, 0x42C60000, 0x42C80000, 0x42CA0000, 0x42CC0000, 0x42CE0000,
4056 0x42D00000, 0x42D20000, 0x42D40000, 0x42D60000, 0x42D80000, 0x42DA0000,
4057 0x42DC0000, 0x42DE0000, 0x42E00000, 0x42E20000, 0x42E40000, 0x42E60000,
4058 0x42E80000, 0x42EA0000, 0x42EC0000, 0x42EE0000, 0x42F00000, 0x42F20000,
4059 0x42F40000, 0x42F60000, 0x42F80000, 0x42FA0000, 0x42FC0000, 0x42FE0000,
4060 0x43000000, 0x43010000, 0x43020000, 0x43030000, 0x43040000, 0x43050000,
4061 0x43060000, 0x43070000, 0x43080000, 0x43090000, 0x430A0000, 0x430B0000,
4062 0x430C0000, 0x430D0000, 0x430E0000, 0x430F0000, 0x43100000, 0x43110000,
4063 0x43120000, 0x43130000, 0x43140000, 0x43150000, 0x43160000, 0x43170000,
4064 0x43180000, 0x43190000, 0x431A0000, 0x431B0000, 0x431C0000, 0x431D0000,
4065 0x431E0000, 0x431F0000, 0x43200000, 0x43210000, 0x43220000, 0x43230000,
4066 0x43240000, 0x43250000, 0x43260000, 0x43270000, 0x43280000, 0x43290000,
4067 0x432A0000, 0x432B0000, 0x432C0000, 0x432D0000, 0x432E0000, 0x432F0000,
4068 0x43300000, 0x43310000, 0x43320000, 0x43330000, 0x43340000
4072 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4073 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4074 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4075 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4076 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4077 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4078 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4079 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4080 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4081 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4082 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4083 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4084 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4085 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4086 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4087 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4088 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4092 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4093 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4094 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4095 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4096 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4097 0x40C00000, 0x40E00000, 0x41000000, 0x41100000, 0x41200000, 0x41300000,
4098 0x41400000, 0x41500000, 0x41600000, 0x41700000, 0x41800000, 0x41880000,
4099 0x41900000, 0x41980000, 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000,
4100 0x41C00000
4106 int i = 0; in tuning_ctl_set()
4108 for (i = 0; i < TUNING_CTLS_COUNT; i++) in tuning_ctl_set()
4113 dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20, in tuning_ctl_set()
4131 return 0; in tuning_ctl_get()
4144 return 0; in voice_focus_ctl_info()
4159 return 0; in voice_focus_ctl_put()
4175 uinfo->value.integer.min = 0; in mic_svm_ctl_info()
4179 return 0; in mic_svm_ctl_info()
4194 return 0; in mic_svm_ctl_put()
4201 return 0; in mic_svm_ctl_put()
4210 uinfo->value.integer.min = 0; in equalizer_ctl_info()
4214 return 0; in equalizer_ctl_info()
4229 return 0; in equalizer_ctl_put()
4239 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
4240 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(eq_db_scale, -2400, 100, 0);
4249 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in add_tuning_control()
4253 knew.tlv.c = 0; in add_tuning_control()
4254 knew.tlv.p = 0; in add_tuning_control()
4274 return 0; in add_tuning_control()
4277 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in add_tuning_control()
4287 for (i = 0; i < TUNING_CTLS_COUNT; i++) { in add_tuning_ctls()
4293 if (err < 0) in add_tuning_ctls()
4297 return 0; in add_tuning_ctls()
4310 /* EQ defaults to 0dB. */ in ca0132_init_tuning_defaults()
4352 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4353 if (err < 0) in ca0132_select_out()
4357 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4358 if (err < 0) in ca0132_select_out()
4362 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4363 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4364 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4365 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4366 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4367 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4368 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4369 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4372 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4373 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4377 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4378 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4379 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4385 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4386 if (err < 0) in ca0132_select_out()
4390 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4391 if (err < 0) in ca0132_select_out()
4395 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4396 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4397 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4398 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4399 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4400 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4401 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4402 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4405 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4406 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4407 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4410 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4411 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4419 return err < 0 ? err : 0; in ca0132_select_out()
4437 for (i = 0; i < AE_CA0113_OUT_SET_COMMANDS; i++) in ae5_mmio_select_out()
4453 return 0; in ca0132_alt_set_full_range_speaker()
4456 tmp = spec->speaker_range_val[0] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4457 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4459 if (err < 0) in ca0132_alt_set_full_range_speaker()
4464 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4466 if (err < 0) in ca0132_alt_set_full_range_speaker()
4469 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4471 if (err < 0) in ca0132_alt_set_full_range_speaker()
4479 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4481 if (err < 0) in ca0132_alt_set_full_range_speaker()
4485 return 0; in ca0132_alt_set_full_range_speaker()
4501 err = dspio_set_uint_param(codec, 0x96, SPEAKER_BASS_REDIRECT, tmp); in ca0132_alt_surround_set_bass_redirection()
4502 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4508 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_surround_set_bass_redirection()
4510 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4514 return 0; in ca0132_alt_surround_set_bass_redirection()
4529 for (i = 0; i < ARRAY_SIZE(quirk_out_set_data); i++) { in ca0132_alt_select_out_get_quirk_data()
4547 return 0; in ca0132_alt_select_out_quirk_set()
4554 gpio_data = snd_hda_codec_read(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4555 AC_VERB_GET_GPIO_DATA, 0); in ca0132_alt_select_out_quirk_set()
4562 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4567 for (i = 0; i < out_info->mmio_gpio_count; i++) { in ca0132_alt_select_out_quirk_set()
4574 for (i = 0; i < out_info->scp_cmds_count; i++) { in ca0132_alt_select_out_quirk_set()
4579 if (err < 0) in ca0132_alt_select_out_quirk_set()
4584 chipio_set_control_param(codec, 0x0d, out_info->dac2port); in ca0132_alt_select_out_quirk_set()
4596 zxr_headphone_gain_set(codec, 0); in ca0132_alt_select_out_quirk_set()
4607 return 0; in ca0132_alt_select_out_quirk_set()
4615 pin_ctl = snd_hda_codec_read(codec, nid, 0, in ca0132_set_out_node_pincfg()
4616 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_set_out_node_pincfg()
4666 err = dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_MUTE, FLOAT_ONE); in ca0132_alt_select_out()
4667 if (err < 0) in ca0132_alt_select_out()
4670 if (ca0132_alt_select_out_quirk_set(codec) < 0) in ca0132_alt_select_out()
4678 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4679 AC_VERB_SET_EAPD_BTLENABLE, 0x01); in ca0132_alt_select_out()
4682 ca0132_set_out_node_pincfg(codec, spec->out_pins[1], 0, 0); in ca0132_alt_select_out()
4684 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 1, 0); in ca0132_alt_select_out()
4686 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 1, 0); in ca0132_alt_select_out()
4688 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 1, 0); in ca0132_alt_select_out()
4700 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_alt_select_out()
4701 if (err < 0) in ca0132_alt_select_out()
4707 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4708 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_alt_select_out()
4711 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 0, 0); in ca0132_alt_select_out()
4712 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 0, 0); in ca0132_alt_select_out()
4713 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 0, 0); in ca0132_alt_select_out()
4724 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE); in ca0132_alt_select_out()
4726 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO); in ca0132_alt_select_out()
4728 if (err < 0) in ca0132_alt_select_out()
4741 /* Set speaker EQ bypass attenuation to 0. */ in ca0132_alt_select_out()
4742 err = dspio_set_uint_param(codec, 0x8f, 0x01, FLOAT_ZERO); in ca0132_alt_select_out()
4743 if (err < 0) in ca0132_alt_select_out()
4750 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4752 if (err < 0) in ca0132_alt_select_out()
4759 err = ca0132_alt_surround_set_bass_redirection(codec, 0); in ca0132_alt_select_out()
4762 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4764 if (err < 0) in ca0132_alt_select_out()
4769 if (err < 0) in ca0132_alt_select_out()
4776 return err < 0 ? err : 0; in ca0132_alt_select_out()
4792 jack->block_report = 0; in ca0132_unsol_hp_delayed()
4813 return 0; in ca0132_set_vipsource()
4815 /* if CrystalVoice if off, vipsource should be 0 */ in ca0132_set_vipsource()
4817 (val == 0)) { in ca0132_set_vipsource()
4818 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_set_vipsource()
4825 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4827 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4835 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4837 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4851 return 0; in ca0132_alt_set_vipsource()
4855 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_set_vipsource()
4856 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_set_vipsource()
4858 /* if CrystalVoice is off, vipsource should be 0 */ in ca0132_alt_set_vipsource()
4860 (val == 0) || spec->in_enum_val == REAR_LINE_IN) { in ca0132_alt_set_vipsource()
4862 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_alt_set_vipsource()
4865 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
4870 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_set_vipsource()
4882 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
4889 chipio_set_conn_rate(codec, 0x0F, SR_16_000); in ca0132_alt_set_vipsource()
4895 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
4898 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
4904 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_set_vipsource()
4905 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_set_vipsource()
4943 ca0132_mic_boost_set(codec, 0); in ca0132_select_mic()
4951 ca0132_set_dmic(codec, 0); in ca0132_select_mic()
4954 ca0132_effects_set(codec, VOICE_FOCUS, 0); in ca0132_select_mic()
4959 return 0; in ca0132_select_mic()
4977 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_select_in()
4978 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_select_in()
4987 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
4998 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5002 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5008 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5018 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5020 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5022 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5023 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5026 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5027 chipio_write(codec, 0x18B09C, 0x0000000C); in ca0132_alt_select_in()
5030 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5031 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5034 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5035 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5043 ca0132_mic_boost_set(codec, 0); in ca0132_alt_select_in()
5047 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5053 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5056 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5061 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5070 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5076 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5081 chipio_write(codec, 0x18B098, 0x00000000); in ca0132_alt_select_in()
5082 chipio_write(codec, 0x18B09C, 0x00000000); in ca0132_alt_select_in()
5087 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5088 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5094 ca0113_mmio_gpio_set(codec, 0, true); in ca0132_alt_select_in()
5103 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5114 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5116 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5118 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5119 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5123 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5124 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5127 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5128 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5139 return 0; in ca0132_alt_select_in()
5171 * They return 0 if no changed. Return 1 if changed.
5187 ca0132_voicefx.reqs[0], tmp); in ca0132_voicefx_set()
5200 int err = 0; in ca0132_effects_set()
5203 if ((idx < 0) || (idx >= num_fx)) in ca0132_effects_set()
5204 return 0; /* no changed */ in ca0132_effects_set()
5210 val = 0; in ca0132_effects_set()
5215 val = 0; in ca0132_effects_set()
5223 val = 0; in ca0132_effects_set()
5227 val = 0; in ca0132_effects_set()
5242 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_effects_set()
5247 * to module ID 0x47. No clue why. in ca0132_effects_set()
5261 dspio_set_uint_param(codec, 0x47, 0x00, tmp); in ca0132_effects_set()
5267 val = 0; in ca0132_effects_set()
5270 codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n", in ca0132_effects_set()
5273 on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE; in ca0132_effects_set()
5275 ca0132_effects[idx].reqs[0], on); in ca0132_effects_set()
5277 if (err < 0) in ca0132_effects_set()
5278 return 0; /* no changed */ in ca0132_effects_set()
5290 int i, ret = 0; in ca0132_pe_switch_set()
5311 unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0, in stop_mic1()
5312 AC_VERB_GET_CONV, 0); in stop_mic1()
5313 if (oldval != 0) in stop_mic1()
5314 snd_hda_codec_write(codec, spec->adcs[0], 0, in stop_mic1()
5316 0); in stop_mic1()
5325 if (oldval != 0) in resume_mic1()
5326 snd_hda_codec_write(codec, spec->adcs[0], 0, in resume_mic1()
5338 int i, ret = 0; in ca0132_cvoice_switch_set()
5351 ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0)); in ca0132_cvoice_switch_set()
5366 int ret = 0; in ca0132_mic_boost_set()
5369 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5370 HDA_INPUT, 0, HDA_AMP_VOLMASK, 3); in ca0132_mic_boost_set()
5372 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5373 HDA_INPUT, 0, HDA_AMP_VOLMASK, 0); in ca0132_mic_boost_set()
5381 int ret = 0; in ca0132_alt_mic_boost_set()
5383 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_alt_mic_boost_set()
5384 HDA_INPUT, 0, HDA_AMP_VOLMASK, val); in ca0132_alt_mic_boost_set()
5392 for (i = 0; i < 4; i++) in ae5_headphone_gain_set()
5393 ca0113_mmio_command_set(codec, 0x48, 0x11 + i, in ae5_headphone_gain_set()
5395 return 0; in ae5_headphone_gain_set()
5406 return 0; in zxr_headphone_gain_set()
5414 hda_nid_t shared_nid = 0; in ca0132_vnode_switch_set()
5416 int ret = 0; in ca0132_vnode_switch_set()
5463 0, dir); in ca0132_vnode_switch_set()
5478 dspio_set_param(codec, 0x96, 0x20, SPEAKER_BASS_REDIRECT_XOVER_FREQ, in ca0132_alt_bass_redirection_xover_set()
5496 int i = 0; in ca0132_alt_slider_ctl_set()
5509 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5513 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5518 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5522 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5529 return 0; in ca0132_alt_slider_ctl_set()
5545 return 0; in ca0132_alt_xbass_xover_slider_ctl_get()
5558 return 0; in ca0132_alt_slider_ctl_get()
5574 return 0; in ca0132_alt_xbass_xover_slider_info()
5584 uinfo->value.integer.min = 0; in ca0132_alt_effect_slider_info()
5588 return 0; in ca0132_alt_effect_slider_info()
5608 return 0; in ca0132_alt_xbass_xover_slider_put()
5618 return 0; in ca0132_alt_xbass_xover_slider_put()
5633 return 0; in ca0132_alt_effect_slider_put()
5640 return 0; in ca0132_alt_effect_slider_put()
5647 * traditional 0-100 in alsamixer that goes in big steps. I like enum better.
5665 return 0; in ca0132_alt_mic_boost_info()
5674 ucontrol->value.enumerated.item[0] = spec->mic_boost_enum_val; in ca0132_alt_mic_boost_get()
5675 return 0; in ca0132_alt_mic_boost_get()
5683 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_mic_boost_put()
5687 return 0; in ca0132_alt_mic_boost_put()
5719 return 0; in ae5_headphone_gain_info()
5728 ucontrol->value.enumerated.item[0] = spec->ae5_headphone_gain_val; in ae5_headphone_gain_get()
5729 return 0; in ae5_headphone_gain_get()
5737 int sel = ucontrol->value.enumerated.item[0]; in ae5_headphone_gain_put()
5741 return 0; in ae5_headphone_gain_put()
5772 return 0; in ae5_sound_filter_info()
5781 ucontrol->value.enumerated.item[0] = spec->ae5_filter_val; in ae5_sound_filter_get()
5782 return 0; in ae5_sound_filter_get()
5790 int sel = ucontrol->value.enumerated.item[0]; in ae5_sound_filter_put()
5794 return 0; in ae5_sound_filter_put()
5801 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, in ae5_sound_filter_put()
5822 return 0; in ca0132_alt_input_source_info()
5831 ucontrol->value.enumerated.item[0] = spec->in_enum_val; in ca0132_alt_input_source_get()
5832 return 0; in ca0132_alt_input_source_get()
5840 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_input_source_put()
5851 return 0; in ca0132_alt_input_source_put()
5874 return 0; in ca0132_alt_output_select_get_info()
5883 ucontrol->value.enumerated.item[0] = spec->out_enum_val; in ca0132_alt_output_select_get()
5884 return 0; in ca0132_alt_output_select_get()
5892 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_output_select_put()
5897 return 0; in ca0132_alt_output_select_put()
5925 return 0; in ca0132_alt_speaker_channel_cfg_get_info()
5934 ucontrol->value.enumerated.item[0] = spec->channel_cfg_val; in ca0132_alt_speaker_channel_cfg_get()
5935 return 0; in ca0132_alt_speaker_channel_cfg_get()
5943 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_speaker_channel_cfg_put()
5947 return 0; in ca0132_alt_speaker_channel_cfg_put()
5978 return 0; in ca0132_alt_svm_setting_info()
5987 ucontrol->value.enumerated.item[0] = spec->smart_volume_setting; in ca0132_alt_svm_setting_get()
5988 return 0; in ca0132_alt_svm_setting_get()
5996 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_svm_setting_put()
6002 return 0; in ca0132_alt_svm_setting_put()
6010 case 0: in ca0132_alt_svm_setting_put()
6042 return 0; in ca0132_alt_eq_preset_info()
6051 ucontrol->value.enumerated.item[0] = spec->eq_preset_val; in ca0132_alt_eq_preset_get()
6052 return 0; in ca0132_alt_eq_preset_get()
6060 int i, err = 0; in ca0132_alt_eq_preset_put()
6061 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_eq_preset_put()
6065 return 0; in ca0132_alt_eq_preset_put()
6070 * Idx 0 is default. in ca0132_alt_eq_preset_put()
6073 for (i = 0; i < EQ_PRESET_MAX_PARAM_COUNT; i++) { in ca0132_alt_eq_preset_put()
6077 if (err < 0) in ca0132_alt_eq_preset_put()
6081 if (err >= 0) in ca0132_alt_eq_preset_put()
6099 return 0; in ca0132_voicefx_info()
6108 ucontrol->value.enumerated.item[0] = spec->voicefx_val; in ca0132_voicefx_get()
6109 return 0; in ca0132_voicefx_get()
6117 int i, err = 0; in ca0132_voicefx_put()
6118 int sel = ucontrol->value.enumerated.item[0]; in ca0132_voicefx_put()
6121 return 0; in ca0132_voicefx_put()
6127 * Idx 0 is default. in ca0132_voicefx_put()
6130 for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) { in ca0132_voicefx_put()
6134 if (err < 0) in ca0132_voicefx_put()
6138 if (err >= 0) { in ca0132_voicefx_put()
6141 ca0132_voicefx_set(codec, (sel ? 1 : 0)); in ca0132_voicefx_put()
6166 return 0; in ca0132_switch_get()
6172 return 0; in ca0132_switch_get()
6176 if (nid == spec->input_pins[0]) { in ca0132_switch_get()
6178 return 0; in ca0132_switch_get()
6183 return 0; in ca0132_switch_get()
6188 return 0; in ca0132_switch_get()
6193 return 0; in ca0132_switch_get()
6196 return 0; in ca0132_switch_get()
6209 codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n", in ca0132_switch_put()
6250 if (nid == spec->input_pins[0]) { in ca0132_switch_put()
6269 changed = 0; in ca0132_switch_put()
6279 changed = 0; in ca0132_switch_put()
6287 changed = 0; in ca0132_switch_put()
6318 ca0132_alt_vol_ctls[dsp_dir].reqs[0], in ca0132_alt_dsp_volume_put()
6350 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6360 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6389 return 0; in ca0132_volume_get()
6400 hda_nid_t shared_nid = 0; in ca0132_volume_put()
6424 0, dir); in ca0132_volume_put()
6447 hda_nid_t vnid = 0; in ca0132_alt_volume_put()
6451 case 0x02: in ca0132_alt_volume_put()
6454 case 0x07: in ca0132_alt_volume_put()
6496 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6506 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6524 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6541 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6576 VOICEFX, 1, 0, HDA_INPUT); in add_voicefx()
6588 EQ_PRESET_ENUM, 1, 0, HDA_OUTPUT); in add_ca0132_alt_eq_presets()
6605 SMART_VOLUME_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_svm_enum()
6622 OUTPUT_SOURCE_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_output_enum()
6639 SPEAKER_CHANNEL_CFG_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_speaker_channel_cfg_enum()
6682 HDA_CODEC_VOLUME_MONO(namestr, BASS_REDIRECTION_XOVER, 1, 0, in ca0132_alt_add_bass_redirection_crossover()
6714 INPUT_SOURCE_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_input_enum()
6723 * Add mic boost enumerated control. Switches through 0dB to 30dB. This adds
6730 MIC_BOOST_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_mic_boost_enum()
6748 AE5_HEADPHONE_GAIN_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_headphone_gain_enum()
6765 AE5_SOUND_FILTER_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_sound_filter_enum()
6793 * I think this has to do with the pin for rear surround being 0x11,
6794 * and the center/lfe being 0x10. Usually the pin order is the opposite.
6812 int err = 0; in ca0132_alt_add_chmap_ctls()
6825 elem, hinfo->channels_max, 0, &chmap); in ca0132_alt_add_chmap_ctls()
6826 if (err < 0) in ca0132_alt_add_chmap_ctls()
6841 HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT),
6842 HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT),
6843 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6844 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6846 0x12, 1, HDA_INPUT),
6864 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
6866 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
6867 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
6868 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
6869 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
6870 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
6871 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
6872 CA0132_ALT_CODEC_VOL("Capture Volume", 0x07, HDA_INPUT),
6874 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6875 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6886 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
6888 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
6889 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
6890 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
6891 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
6892 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
6893 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
6896 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6897 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6907 int err = 0; in ca0132_build_controls()
6910 for (i = 0; i < spec->num_mixers; i++) { in ca0132_build_controls()
6912 if (err < 0) in ca0132_build_controls()
6917 snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT, in ca0132_build_controls()
6926 if (err < 0) in ca0132_build_controls()
6934 for (i = 0; i < num_fx; i++) { in ca0132_build_controls()
6945 if (err < 0) in ca0132_build_controls()
6955 if (err < 0) in ca0132_build_controls()
6959 if (err < 0) in ca0132_build_controls()
6963 "Enable OutFX", 0); in ca0132_build_controls()
6964 if (err < 0) in ca0132_build_controls()
6969 if (err < 0) in ca0132_build_controls()
6973 for (i = 0; i < num_sliders; i++) { in ca0132_build_controls()
6978 if (err < 0) in ca0132_build_controls()
6985 if (err < 0) in ca0132_build_controls()
6989 "PlayEnhancement", 0); in ca0132_build_controls()
6990 if (err < 0) in ca0132_build_controls()
6995 if (err < 0) in ca0132_build_controls()
6999 if (err < 0) in ca0132_build_controls()
7009 if (err < 0) in ca0132_build_controls()
7012 if (err < 0) in ca0132_build_controls()
7015 if (err < 0) in ca0132_build_controls()
7018 if (err < 0) in ca0132_build_controls()
7021 if (err < 0) in ca0132_build_controls()
7024 if (err < 0) in ca0132_build_controls()
7027 if (err < 0) in ca0132_build_controls()
7035 if (err < 0) in ca0132_build_controls()
7044 if (err < 0) in ca0132_build_controls()
7047 if (err < 0) in ca0132_build_controls()
7052 if (err < 0) in ca0132_build_controls()
7064 if (err < 0) in ca0132_build_controls()
7070 if (err < 0) in ca0132_build_controls()
7073 if (err < 0) in ca0132_build_controls()
7080 if (err < 0) in ca0132_build_controls()
7087 return 0; in ca0132_build_controls()
7093 int err = 0; in dbpro_build_controls()
7098 if (err < 0) in dbpro_build_controls()
7104 if (err < 0) in dbpro_build_controls()
7108 return 0; in dbpro_build_controls()
7168 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0]; in ca0132_build_pcms()
7173 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in ca0132_build_pcms()
7194 return 0; in ca0132_build_pcms()
7211 return 0; in ca0132_build_pcms()
7224 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in dbpro_build_pcms()
7228 return 0; in dbpro_build_pcms()
7245 return 0; in dbpro_build_pcms()
7253 snd_hda_codec_write(codec, pin, 0, in init_output()
7258 snd_hda_codec_write(codec, dac, 0, in init_output()
7267 snd_hda_codec_write(codec, pin, 0, in init_input()
7269 AMP_IN_UNMUTE(0)); in init_input()
7272 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE, in init_input()
7273 AMP_IN_UNMUTE(0)); in init_input()
7275 /* init to 0 dB and unmute. */ in init_input()
7276 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7277 HDA_AMP_VOLMASK, 0x5a); in init_input()
7278 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7279 HDA_AMP_MUTE, 0); in init_input()
7305 ca0132_set_vipsource(codec, 0); in ca0132_set_dmic()
7309 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7312 val |= 0x80; in ca0132_set_dmic()
7313 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7316 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7321 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7325 val &= 0x5f; in ca0132_set_dmic()
7326 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7329 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7330 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0); in ca0132_set_dmic()
7349 * Bit 2-0: MPIO select in ca0132_init_dmic()
7353 val = 0x01; in ca0132_init_dmic()
7354 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7358 * Bit 2-0: Data1 MPIO select in ca0132_init_dmic()
7363 val = 0x83; in ca0132_init_dmic()
7364 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7367 /* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first. in ca0132_init_dmic()
7368 * Bit 3-0: Channel mask in ca0132_init_dmic()
7375 val = 0x33; in ca0132_init_dmic()
7377 val = 0x23; in ca0132_init_dmic()
7380 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7392 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7393 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20); in ca0132_init_analog_mic2()
7394 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7395 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in ca0132_init_analog_mic2()
7396 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7397 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in ca0132_init_analog_mic2()
7398 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7399 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x2D); in ca0132_init_analog_mic2()
7400 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7401 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in ca0132_init_analog_mic2()
7402 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7403 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in ca0132_init_analog_mic2()
7415 for (i = 0; i < spec->multiout.num_dacs; i++) in ca0132_refresh_widget_caps()
7418 for (i = 0; i < spec->num_outputs; i++) in ca0132_refresh_widget_caps()
7421 for (i = 0; i < spec->num_inputs; i++) { in ca0132_refresh_widget_caps()
7432 0x394f9e38, 0x394f9e38, 0x00000000, 0x00000000, 0x00000000, 0x00000000
7437 0x00000000, 0x00000000, 0x3966afcd, 0x3966afcd, 0x3966afcd, 0x3966afcd
7442 0x00000000, 0x00000000, 0x38d1b717, 0x38d1b717, 0x38d1b717, 0x38d1b717
7471 dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_ENABLE_CENTER_EQ, tmp); in ca0132_alt_init_speaker_tuning()
7476 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7481 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7484 for (i = 0; i < 6; i++) in ca0132_alt_init_speaker_tuning()
7485 dspio_set_uint_param(codec, 0x96, in ca0132_alt_init_speaker_tuning()
7499 SNDRV_PCM_FORMAT_S32_LE, 32, 0); in ca0132_alt_create_dummy_stream()
7501 snd_hda_codec_setup_stream(codec, spec->dacs[0], spec->dsp_stream_id, in ca0132_alt_create_dummy_stream()
7502 0, stream_format); in ca0132_alt_create_dummy_stream()
7504 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_alt_create_dummy_stream()
7519 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7523 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_init_analog_mics()
7529 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7531 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_alt_init_analog_mics()
7535 * Sets the source of stream 0x14 to connpointID 0x48, and the destination
7536 * connpointID to 0x91. If this isn't done, the destination is 0x71, and
7548 chipio_set_stream_channels(codec, 0x0C, 6); in sbz_connect_streams()
7549 chipio_set_stream_control(codec, 0x0C, 1); in sbz_connect_streams()
7551 /* This value is 0x43 for 96khz, and 0x83 for 192khz. */ in sbz_connect_streams()
7552 chipio_write_no_mutex(codec, 0x18a020, 0x00000043); in sbz_connect_streams()
7554 /* Setup stream 0x14 with it's source and destination points */ in sbz_connect_streams()
7555 chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91); in sbz_connect_streams()
7556 chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000); in sbz_connect_streams()
7557 chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000); in sbz_connect_streams()
7558 chipio_set_stream_channels(codec, 0x14, 2); in sbz_connect_streams()
7559 chipio_set_stream_control(codec, 0x14, 1); in sbz_connect_streams()
7580 chipio_write_no_mutex(codec, 0x190060, 0x0001f8c0); in sbz_chipio_startup_data()
7581 chipio_write_no_mutex(codec, 0x190064, 0x0001f9c1); in sbz_chipio_startup_data()
7582 chipio_write_no_mutex(codec, 0x190068, 0x0001fac6); in sbz_chipio_startup_data()
7583 chipio_write_no_mutex(codec, 0x19006c, 0x0001fbc7); in sbz_chipio_startup_data()
7585 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in sbz_chipio_startup_data()
7587 chipio_set_stream_channels(codec, 0x0C, 6); in sbz_chipio_startup_data()
7588 chipio_set_stream_control(codec, 0x0C, 1); in sbz_chipio_startup_data()
7591 chipio_write_no_mutex(codec, 0x190030, 0x0001e0c0); in sbz_chipio_startup_data()
7592 chipio_write_no_mutex(codec, 0x190034, 0x0001e1c1); in sbz_chipio_startup_data()
7593 chipio_write_no_mutex(codec, 0x190038, 0x0001e4c2); in sbz_chipio_startup_data()
7594 chipio_write_no_mutex(codec, 0x19003c, 0x0001e5c3); in sbz_chipio_startup_data()
7595 chipio_write_no_mutex(codec, 0x190040, 0x0001e2c4); in sbz_chipio_startup_data()
7596 chipio_write_no_mutex(codec, 0x190044, 0x0001e3c5); in sbz_chipio_startup_data()
7597 chipio_write_no_mutex(codec, 0x190048, 0x0001e8c6); in sbz_chipio_startup_data()
7598 chipio_write_no_mutex(codec, 0x19004c, 0x0001e9c7); in sbz_chipio_startup_data()
7599 chipio_write_no_mutex(codec, 0x190050, 0x0001ecc8); in sbz_chipio_startup_data()
7600 chipio_write_no_mutex(codec, 0x190054, 0x0001edc9); in sbz_chipio_startup_data()
7601 chipio_write_no_mutex(codec, 0x190058, 0x0001eaca); in sbz_chipio_startup_data()
7602 chipio_write_no_mutex(codec, 0x19005c, 0x0001ebcb); in sbz_chipio_startup_data()
7604 chipio_write_no_mutex(codec, 0x190038, 0x000140c2); in sbz_chipio_startup_data()
7605 chipio_write_no_mutex(codec, 0x19003c, 0x000141c3); in sbz_chipio_startup_data()
7606 chipio_write_no_mutex(codec, 0x190040, 0x000150c4); in sbz_chipio_startup_data()
7607 chipio_write_no_mutex(codec, 0x190044, 0x000151c5); in sbz_chipio_startup_data()
7608 chipio_write_no_mutex(codec, 0x190050, 0x000142c8); in sbz_chipio_startup_data()
7609 chipio_write_no_mutex(codec, 0x190054, 0x000143c9); in sbz_chipio_startup_data()
7610 chipio_write_no_mutex(codec, 0x190058, 0x000152ca); in sbz_chipio_startup_data()
7611 chipio_write_no_mutex(codec, 0x19005c, 0x000153cb); in sbz_chipio_startup_data()
7613 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in sbz_chipio_startup_data()
7620 * Custom DSP SCP commands where the src value is 0x00 instead of 0x20. This is
7632 for (i = 0; i < 2; i++) { in ca0132_alt_dsp_scp_startup()
7637 tmp = 0x00000003; in ca0132_alt_dsp_scp_startup()
7638 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7639 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7640 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp); in ca0132_alt_dsp_scp_startup()
7641 tmp = 0x00000001; in ca0132_alt_dsp_scp_startup()
7642 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp); in ca0132_alt_dsp_scp_startup()
7643 tmp = 0x00000004; in ca0132_alt_dsp_scp_startup()
7644 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7645 tmp = 0x00000005; in ca0132_alt_dsp_scp_startup()
7646 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7647 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7648 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7652 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7653 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp); in ca0132_alt_dsp_scp_startup()
7654 tmp = 0x00000001; in ca0132_alt_dsp_scp_startup()
7655 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp); in ca0132_alt_dsp_scp_startup()
7656 tmp = 0x00000004; in ca0132_alt_dsp_scp_startup()
7657 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7658 tmp = 0x00000005; in ca0132_alt_dsp_scp_startup()
7659 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7660 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7661 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7675 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_dsp_initial_mic_setup()
7676 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_dsp_initial_mic_setup()
7682 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_dsp_initial_mic_setup()
7684 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_dsp_initial_mic_setup()
7685 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_dsp_initial_mic_setup()
7689 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7690 chipio_write(codec, 0x18b09C, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7693 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7694 chipio_write(codec, 0x18b09c, 0x0000004c); in ca0132_alt_dsp_initial_mic_setup()
7705 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_post_dsp_register_set()
7706 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_register_set()
7707 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae5_post_dsp_register_set()
7708 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_register_set()
7709 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae5_post_dsp_register_set()
7711 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7712 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7713 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7714 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7715 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7716 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7717 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7718 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7719 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7720 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7721 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7722 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7724 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x3f); in ae5_post_dsp_register_set()
7725 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_post_dsp_register_set()
7726 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_register_set()
7736 chipio_set_control_param(codec, 3, 0); in ae5_post_dsp_param_setup()
7743 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae5_post_dsp_param_setup()
7744 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_post_dsp_param_setup()
7746 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7747 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92); in ae5_post_dsp_param_setup()
7748 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7749 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa); in ae5_post_dsp_param_setup()
7750 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7751 VENDOR_CHIPIO_8051_DATA_WRITE, 0x22); in ae5_post_dsp_param_setup()
7756 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7757 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41); in ae5_post_dsp_pll_setup()
7758 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7759 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8); in ae5_post_dsp_pll_setup()
7761 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7762 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x45); in ae5_post_dsp_pll_setup()
7763 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7764 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcc); in ae5_post_dsp_pll_setup()
7766 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7767 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x40); in ae5_post_dsp_pll_setup()
7768 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7769 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcb); in ae5_post_dsp_pll_setup()
7771 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7772 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae5_post_dsp_pll_setup()
7773 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7774 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae5_post_dsp_pll_setup()
7776 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7777 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x51); in ae5_post_dsp_pll_setup()
7778 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7779 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x8d); in ae5_post_dsp_pll_setup()
7788 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae5_post_dsp_stream_setup()
7790 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae5_post_dsp_stream_setup()
7792 chipio_set_stream_channels(codec, 0x0C, 6); in ae5_post_dsp_stream_setup()
7793 chipio_set_stream_control(codec, 0x0C, 1); in ae5_post_dsp_stream_setup()
7795 chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0); in ae5_post_dsp_stream_setup()
7797 chipio_set_stream_source_dest(codec, 0x18, 0x9, 0xd0); in ae5_post_dsp_stream_setup()
7798 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae5_post_dsp_stream_setup()
7799 chipio_set_stream_channels(codec, 0x18, 6); in ae5_post_dsp_stream_setup()
7800 chipio_set_stream_control(codec, 0x18, 1); in ae5_post_dsp_stream_setup()
7804 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_stream_setup()
7805 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae5_post_dsp_stream_setup()
7806 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_stream_setup()
7807 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae5_post_dsp_stream_setup()
7809 ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80); in ae5_post_dsp_stream_setup()
7820 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae5_post_dsp_startup_data()
7821 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae5_post_dsp_startup_data()
7822 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae5_post_dsp_startup_data()
7823 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae5_post_dsp_startup_data()
7825 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
7827 ca0113_mmio_command_set(codec, 0x48, 0x0b, 0x12); in ae5_post_dsp_startup_data()
7828 ca0113_mmio_command_set(codec, 0x48, 0x04, 0x00); in ae5_post_dsp_startup_data()
7829 ca0113_mmio_command_set(codec, 0x48, 0x06, 0x48); in ae5_post_dsp_startup_data()
7830 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
7831 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_startup_data()
7832 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
7833 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
7834 ca0113_mmio_gpio_set(codec, 0, true); in ae5_post_dsp_startup_data()
7836 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x80); in ae5_post_dsp_startup_data()
7838 chipio_write_no_mutex(codec, 0x18b03c, 0x00000012); in ae5_post_dsp_startup_data()
7840 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
7841 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
7847 0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3, 0x0001e2c4, 0x0001e3c5,
7848 0x0001e8c6, 0x0001e9c7, 0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb
7858 chipio_set_stream_channels(codec, 0x0c, 6); in ae7_post_dsp_setup_ports()
7859 chipio_set_stream_control(codec, 0x0c, 1); in ae7_post_dsp_setup_ports()
7862 addr = 0x190030; in ae7_post_dsp_setup_ports()
7863 for (i = 0; i < count; i++) { in ae7_post_dsp_setup_ports()
7867 addr += 0x04; in ae7_post_dsp_setup_ports()
7871 * Port setting always ends with a write of 0x1 to address 0x19042c. in ae7_post_dsp_setup_ports()
7873 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in ae7_post_dsp_setup_ports()
7875 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_post_dsp_setup_ports()
7876 ca0113_mmio_command_set(codec, 0x48, 0x0d, 0x40); in ae7_post_dsp_setup_ports()
7877 ca0113_mmio_command_set(codec, 0x48, 0x17, 0x00); in ae7_post_dsp_setup_ports()
7878 ca0113_mmio_command_set(codec, 0x48, 0x19, 0x00); in ae7_post_dsp_setup_ports()
7879 ca0113_mmio_command_set(codec, 0x48, 0x11, 0xff); in ae7_post_dsp_setup_ports()
7880 ca0113_mmio_command_set(codec, 0x48, 0x12, 0xff); in ae7_post_dsp_setup_ports()
7881 ca0113_mmio_command_set(codec, 0x48, 0x13, 0xff); in ae7_post_dsp_setup_ports()
7882 ca0113_mmio_command_set(codec, 0x48, 0x14, 0x7f); in ae7_post_dsp_setup_ports()
7893 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae7_post_dsp_asi_stream_setup()
7894 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_post_dsp_asi_stream_setup()
7896 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae7_post_dsp_asi_stream_setup()
7897 chipio_set_stream_channels(codec, 0x0c, 6); in ae7_post_dsp_asi_stream_setup()
7898 chipio_set_stream_control(codec, 0x0c, 1); in ae7_post_dsp_asi_stream_setup()
7900 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_stream_setup()
7901 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_stream_setup()
7903 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_stream_setup()
7904 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_stream_setup()
7905 chipio_set_stream_control(codec, 0x18, 1); in ae7_post_dsp_asi_stream_setup()
7915 0x41, 0x45, 0x40, 0x43, 0x51 in ae7_post_dsp_pll_setup()
7918 0xc8, 0xcc, 0xcb, 0xc7, 0x8d in ae7_post_dsp_pll_setup()
7922 for (i = 0; i < ARRAY_SIZE(addr); i++) { in ae7_post_dsp_pll_setup()
7923 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_pll_setup()
7925 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_pll_setup()
7934 0x0b, 0x04, 0x06, 0x0a, 0x0c, 0x11, 0x12, 0x13, 0x14 in ae7_post_dsp_asi_setup_ports()
7937 0x12, 0x00, 0x48, 0x05, 0x5f, 0xff, 0xff, 0xff, 0x7f in ae7_post_dsp_asi_setup_ports()
7943 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup_ports()
7944 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae7_post_dsp_asi_setup_ports()
7945 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup_ports()
7946 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae7_post_dsp_asi_setup_ports()
7948 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
7949 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
7950 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae7_post_dsp_asi_setup_ports()
7951 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae7_post_dsp_asi_setup_ports()
7956 for (i = 0; i < ARRAY_SIZE(target); i++) in ae7_post_dsp_asi_setup_ports()
7957 ca0113_mmio_command_set(codec, 0x48, target[i], data[i]); in ae7_post_dsp_asi_setup_ports()
7959 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
7960 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
7961 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
7963 chipio_set_stream_source_dest(codec, 0x21, 0x64, 0x56); in ae7_post_dsp_asi_setup_ports()
7964 chipio_set_stream_channels(codec, 0x21, 2); in ae7_post_dsp_asi_setup_ports()
7965 chipio_set_conn_rate_no_mutex(codec, 0x56, SR_8_000); in ae7_post_dsp_asi_setup_ports()
7967 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_post_dsp_asi_setup_ports()
7973 chipio_set_control_param_no_mutex(codec, 0x20, 0x21); in ae7_post_dsp_asi_setup_ports()
7975 chipio_write_no_mutex(codec, 0x18b038, 0x00000088); in ae7_post_dsp_asi_setup_ports()
7979 * seemingly sends data to the HDA node 0x09, which is the digital in ae7_post_dsp_asi_setup_ports()
7986 ca0113_mmio_gpio_set(codec, 0, 1); in ae7_post_dsp_asi_setup_ports()
7989 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
7990 chipio_write_no_mutex(codec, 0x18b03c, 0x00000000); in ae7_post_dsp_asi_setup_ports()
7991 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
7992 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
7994 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_setup_ports()
7995 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_setup_ports()
7997 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_setup_ports()
7998 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_setup_ports()
8017 chipio_8051_write_direct(codec, 0x93, 0x10); in ae7_post_dsp_asi_setup()
8019 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8020 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae7_post_dsp_asi_setup()
8021 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8022 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae7_post_dsp_asi_setup()
8024 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup()
8025 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_post_dsp_asi_setup()
8030 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae7_post_dsp_asi_setup()
8031 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_post_dsp_asi_setup()
8032 snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00); in ae7_post_dsp_asi_setup()
8034 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8035 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92); in ae7_post_dsp_asi_setup()
8036 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8037 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa); in ae7_post_dsp_asi_setup()
8038 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8039 VENDOR_CHIPIO_8051_DATA_WRITE, 0x22); in ae7_post_dsp_asi_setup()
8044 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8045 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae7_post_dsp_asi_setup()
8046 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8047 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae7_post_dsp_asi_setup()
8067 for (idx = 0; idx < num_fx; idx++) { in ca0132_setup_defaults()
8068 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ca0132_setup_defaults()
8077 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ca0132_setup_defaults()
8080 dspio_set_uint_param(codec, 0x8f, 0x01, tmp); in ca0132_setup_defaults()
8084 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_setup_defaults()
8085 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_setup_defaults()
8089 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_setup_defaults()
8093 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ca0132_setup_defaults()
8115 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in r3d_setup_defaults()
8119 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in r3d_setup_defaults()
8123 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in r3d_setup_defaults()
8136 for (idx = 0; idx < num_fx; idx++) { in r3d_setup_defaults()
8137 for (i = 0; i <= ca0132_effects[idx].params; i++) { in r3d_setup_defaults()
8165 chipio_set_stream_control(codec, 0x03, 1); in sbz_setup_defaults()
8166 chipio_set_stream_control(codec, 0x04, 1); in sbz_setup_defaults()
8173 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in sbz_setup_defaults()
8174 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in sbz_setup_defaults()
8178 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in sbz_setup_defaults()
8182 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in sbz_setup_defaults()
8186 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in sbz_setup_defaults()
8192 for (idx = 0; idx < num_fx; idx++) { in sbz_setup_defaults()
8193 for (i = 0; i <= ca0132_effects[idx].params; i++) { in sbz_setup_defaults()
8221 chipio_set_stream_control(codec, 0x03, 1); in ae5_setup_defaults()
8222 chipio_set_stream_control(codec, 0x04, 1); in ae5_setup_defaults()
8226 dspio_set_uint_param(codec, 0x96, 0x29, tmp); in ae5_setup_defaults()
8227 dspio_set_uint_param(codec, 0x96, 0x2a, tmp); in ae5_setup_defaults()
8228 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae5_setup_defaults()
8229 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae5_setup_defaults()
8231 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_setup_defaults()
8232 ca0113_mmio_gpio_set(codec, 0, false); in ae5_setup_defaults()
8233 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae5_setup_defaults()
8237 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae5_setup_defaults()
8238 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae5_setup_defaults()
8242 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae5_setup_defaults()
8246 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae5_setup_defaults()
8250 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae5_setup_defaults()
8261 for (idx = 0; idx < num_fx; idx++) { in ae5_setup_defaults()
8262 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae5_setup_defaults()
8293 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8295 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8298 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_setup_defaults()
8301 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae7_setup_defaults()
8302 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae7_setup_defaults()
8304 ca0113_mmio_gpio_set(codec, 0, false); in ae7_setup_defaults()
8308 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae7_setup_defaults()
8309 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae7_setup_defaults()
8313 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae7_setup_defaults()
8317 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae7_setup_defaults()
8321 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae7_setup_defaults()
8322 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae7_setup_defaults()
8333 * Not sure why, but these are both set to 1. They're only set to 0 in ae7_setup_defaults()
8336 ca0113_mmio_gpio_set(codec, 0, true); in ae7_setup_defaults()
8340 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x04); in ae7_setup_defaults()
8341 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x04); in ae7_setup_defaults()
8342 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x80); in ae7_setup_defaults()
8346 for (idx = 0; idx < num_fx; idx++) { in ae7_setup_defaults()
8347 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae7_setup_defaults()
8373 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8374 chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0); in ca0132_init_flags()
8376 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8380 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8382 CONTROL_FLAG_PORT_A_COMMON_MODE, 0); in ca0132_init_flags()
8384 CONTROL_FLAG_PORT_D_COMMON_MODE, 0); in ca0132_init_flags()
8386 CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0); in ca0132_init_flags()
8388 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8402 chipio_set_conn_rate(codec, 0x0B, SR_48_000); in ca0132_init_params()
8403 chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0); in ca0132_init_params()
8404 chipio_set_control_param(codec, 0, 0); in ca0132_init_params()
8405 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_init_params()
8442 codec->card->dev) != 0) in ca0132_download_dsp_images()
8449 codec->card->dev) != 0) in ca0132_download_dsp_images()
8464 codec->card->dev) != 0) in ca0132_download_dsp_images()
8469 if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) { in ca0132_download_dsp_images()
8516 if (dspio_get_response_data(codec) >= 0) in ca0132_process_dsp_response()
8517 spec->wait_scp = 0; in ca0132_process_dsp_response()
8569 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1},
8576 {0x01, AC_VERB_SET_POWER_STATE, 0x03},
8578 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0},
8586 {0x15, 0x70D, 0xF0},
8587 {0x15, 0x70E, 0xFE},
8588 {0x15, 0x707, 0x75},
8589 {0x15, 0x707, 0xD3},
8590 {0x15, 0x707, 0x09},
8591 {0x15, 0x707, 0x53},
8592 {0x15, 0x707, 0xD4},
8593 {0x15, 0x707, 0xEF},
8594 {0x15, 0x707, 0x75},
8595 {0x15, 0x707, 0xD3},
8596 {0x15, 0x707, 0x09},
8597 {0x15, 0x707, 0x02},
8598 {0x15, 0x707, 0x37},
8599 {0x15, 0x707, 0x78},
8600 {0x15, 0x53C, 0xCE},
8601 {0x15, 0x575, 0xC9},
8602 {0x15, 0x53D, 0xCE},
8603 {0x15, 0x5B7, 0xC9},
8604 {0x15, 0x70D, 0xE8},
8605 {0x15, 0x70E, 0xFE},
8606 {0x15, 0x707, 0x02},
8607 {0x15, 0x707, 0x68},
8608 {0x15, 0x707, 0x62},
8609 {0x15, 0x53A, 0xCE},
8610 {0x15, 0x546, 0xC9},
8611 {0x15, 0x53B, 0xCE},
8612 {0x15, 0x5E8, 0xC9},
8618 {0x15, 0x70D, 0x20},
8619 {0x15, 0x70E, 0x19},
8620 {0x15, 0x707, 0x00},
8621 {0x15, 0x539, 0xCE},
8622 {0x15, 0x546, 0xC9},
8623 {0x15, 0x70D, 0xB7},
8624 {0x15, 0x70E, 0x09},
8625 {0x15, 0x707, 0x10},
8626 {0x15, 0x70D, 0xAF},
8627 {0x15, 0x70E, 0x09},
8628 {0x15, 0x707, 0x01},
8629 {0x15, 0x707, 0x05},
8630 {0x15, 0x70D, 0x73},
8631 {0x15, 0x70E, 0x09},
8632 {0x15, 0x707, 0x14},
8633 {0x15, 0x6FF, 0xC4},
8652 spec->cur_mic_boost = 0; in ca0132_init_chip()
8654 for (i = 0; i < VNODES_COUNT; i++) { in ca0132_init_chip()
8655 spec->vnode_lvol[i] = 0x5a; in ca0132_init_chip()
8656 spec->vnode_rvol[i] = 0x5a; in ca0132_init_chip()
8657 spec->vnode_lswitch[i] = 0; in ca0132_init_chip()
8658 spec->vnode_rswitch[i] = 0; in ca0132_init_chip()
8665 for (i = 0; i < num_fx; i++) { in ca0132_init_chip()
8666 on = (unsigned int)ca0132_effects[i].reqs[0]; in ca0132_init_chip()
8667 spec->effects_switch[i] = on ? 1 : 0; in ca0132_init_chip()
8675 spec->speaker_range_val[0] = 1; in ca0132_init_chip()
8679 for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++) in ca0132_init_chip()
8685 spec->voicefx_val = 0; in ca0132_init_chip()
8687 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0; in ca0132_init_chip()
8708 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00); in r3di_gpio_shutdown()
8719 for (i = 0; i < 4; i++) in sbz_region2_exit()
8720 writeb(0x0, spec->mem_base + 0x100); in sbz_region2_exit()
8721 for (i = 0; i < 8; i++) in sbz_region2_exit()
8722 writeb(0xb3, spec->mem_base + 0x304); in sbz_region2_exit()
8724 ca0113_mmio_gpio_set(codec, 0, false); in sbz_region2_exit()
8733 static const hda_nid_t pins[] = {0x0B, 0x0C, 0x0E, 0x12, 0x13}; in sbz_set_pin_ctl_default()
8736 snd_hda_codec_write(codec, 0x11, 0, in sbz_set_pin_ctl_default()
8737 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x40); in sbz_set_pin_ctl_default()
8739 for (i = 0; i < ARRAY_SIZE(pins); i++) in sbz_set_pin_ctl_default()
8740 snd_hda_codec_write(codec, pins[i], 0, in sbz_set_pin_ctl_default()
8741 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x00); in sbz_set_pin_ctl_default()
8746 static const hda_nid_t pins[] = {0x0B, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13}; in ca0132_clear_unsolicited()
8749 for (i = 0; i < ARRAY_SIZE(pins); i++) { in ca0132_clear_unsolicited()
8750 snd_hda_codec_write(codec, pins[i], 0, in ca0132_clear_unsolicited()
8751 AC_VERB_SET_UNSOLICITED_ENABLE, 0x00); in ca0132_clear_unsolicited()
8759 if (dir >= 0) in sbz_gpio_shutdown_commands()
8760 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8762 if (mask >= 0) in sbz_gpio_shutdown_commands()
8763 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8766 if (data >= 0) in sbz_gpio_shutdown_commands()
8767 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8773 static const hda_nid_t pins[] = {0x05, 0x0c, 0x09, 0x0e, 0x08, 0x11, 0x01}; in zxr_dbpro_power_state_shutdown()
8776 for (i = 0; i < ARRAY_SIZE(pins); i++) in zxr_dbpro_power_state_shutdown()
8777 snd_hda_codec_write(codec, pins[i], 0, in zxr_dbpro_power_state_shutdown()
8778 AC_VERB_SET_POWER_STATE, 0x03); in zxr_dbpro_power_state_shutdown()
8783 chipio_set_stream_control(codec, 0x03, 0); in sbz_exit_chip()
8784 chipio_set_stream_control(codec, 0x04, 0); in sbz_exit_chip()
8787 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1); in sbz_exit_chip()
8788 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05); in sbz_exit_chip()
8789 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01); in sbz_exit_chip()
8791 chipio_set_stream_control(codec, 0x14, 0); in sbz_exit_chip()
8792 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8794 chipio_set_conn_rate(codec, 0x41, SR_192_000); in sbz_exit_chip()
8795 chipio_set_conn_rate(codec, 0x91, SR_192_000); in sbz_exit_chip()
8797 chipio_write(codec, 0x18a020, 0x00000083); in sbz_exit_chip()
8799 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03); in sbz_exit_chip()
8800 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07); in sbz_exit_chip()
8801 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06); in sbz_exit_chip()
8803 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8805 chipio_set_control_param(codec, 0x0D, 0x24); in sbz_exit_chip()
8810 snd_hda_codec_write(codec, 0x0B, 0, in sbz_exit_chip()
8811 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in sbz_exit_chip()
8819 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in r3d_exit_chip()
8820 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5b); in r3d_exit_chip()
8825 chipio_set_stream_control(codec, 0x03, 0); in ae5_exit_chip()
8826 chipio_set_stream_control(codec, 0x04, 0); in ae5_exit_chip()
8828 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae5_exit_chip()
8829 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8830 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8831 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae5_exit_chip()
8832 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae5_exit_chip()
8833 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x00); in ae5_exit_chip()
8834 ca0113_mmio_gpio_set(codec, 0, false); in ae5_exit_chip()
8837 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae5_exit_chip()
8838 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae5_exit_chip()
8840 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_exit_chip()
8842 chipio_set_stream_control(codec, 0x18, 0); in ae5_exit_chip()
8843 chipio_set_stream_control(codec, 0x0c, 0); in ae5_exit_chip()
8845 snd_hda_codec_write(codec, 0x01, 0, 0x724, 0x83); in ae5_exit_chip()
8850 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
8851 chipio_set_stream_source_dest(codec, 0x21, 0xc8, 0xc8); in ae7_exit_chip()
8852 chipio_set_stream_channels(codec, 0x21, 0); in ae7_exit_chip()
8853 chipio_set_control_param(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_exit_chip()
8854 chipio_set_control_param(codec, 0x20, 0x01); in ae7_exit_chip()
8856 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_exit_chip()
8858 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
8859 chipio_set_stream_control(codec, 0x0c, 0); in ae7_exit_chip()
8861 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_exit_chip()
8862 snd_hda_codec_write(codec, 0x15, 0, 0x724, 0x83); in ae7_exit_chip()
8863 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_exit_chip()
8864 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_exit_chip()
8865 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x00); in ae7_exit_chip()
8866 ca0113_mmio_gpio_set(codec, 0, false); in ae7_exit_chip()
8868 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae7_exit_chip()
8870 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae7_exit_chip()
8871 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae7_exit_chip()
8876 chipio_set_stream_control(codec, 0x03, 0); in zxr_exit_chip()
8877 chipio_set_stream_control(codec, 0x04, 0); in zxr_exit_chip()
8878 chipio_set_stream_control(codec, 0x14, 0); in zxr_exit_chip()
8879 chipio_set_stream_control(codec, 0x0C, 0); in zxr_exit_chip()
8881 chipio_set_conn_rate(codec, 0x41, SR_192_000); in zxr_exit_chip()
8882 chipio_set_conn_rate(codec, 0x91, SR_192_000); in zxr_exit_chip()
8884 chipio_write(codec, 0x18a020, 0x00000083); in zxr_exit_chip()
8886 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in zxr_exit_chip()
8887 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in zxr_exit_chip()
8891 snd_hda_codec_write(codec, 0x0B, 0, AC_VERB_SET_EAPD_BTLENABLE, 0x00); in zxr_exit_chip()
8896 ca0113_mmio_gpio_set(codec, 0, false); in zxr_exit_chip()
8898 ca0113_mmio_gpio_set(codec, 0, true); in zxr_exit_chip()
8924 unsigned int cur_address = 0x390; in sbz_dsp_startup_check()
8926 unsigned int failure = 0; in sbz_dsp_startup_check()
8934 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8936 cur_address += 0x4; in sbz_dsp_startup_check()
8938 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8939 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
8951 while (failure && (reload != 0)) { in sbz_dsp_startup_check()
8956 failure = 0; in sbz_dsp_startup_check()
8957 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8959 cur_address += 0x4; in sbz_dsp_startup_check()
8961 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8962 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
8978 * This is for the extra volume verbs 0x797 (left) and 0x798 (right). These add
8983 * to 0 just incase a value has lingered from a boot into Windows.
8987 snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8988 snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8989 snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8990 snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8991 snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8992 snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8993 snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8994 snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9004 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9005 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9007 chipio_write(codec, 0x18b0a4, 0x000000c2); in sbz_pre_dsp_setup()
9009 snd_hda_codec_write(codec, 0x11, 0, in sbz_pre_dsp_setup()
9010 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in sbz_pre_dsp_setup()
9015 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3d_pre_dsp_setup()
9017 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9018 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E); in r3d_pre_dsp_setup()
9019 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9020 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C); in r3d_pre_dsp_setup()
9021 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9022 VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B); in r3d_pre_dsp_setup()
9024 snd_hda_codec_write(codec, 0x11, 0, in r3d_pre_dsp_setup()
9025 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in r3d_pre_dsp_setup()
9030 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3di_pre_dsp_setup()
9032 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9033 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E); in r3di_pre_dsp_setup()
9034 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9035 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C); in r3di_pre_dsp_setup()
9036 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9037 VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B); in r3di_pre_dsp_setup()
9039 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9040 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20); in r3di_pre_dsp_setup()
9041 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9042 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in r3di_pre_dsp_setup()
9043 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9044 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in r3di_pre_dsp_setup()
9045 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9046 VENDOR_CHIPIO_8051_DATA_WRITE, 0x40); in r3di_pre_dsp_setup()
9048 snd_hda_codec_write(codec, 0x11, 0, in r3di_pre_dsp_setup()
9049 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04); in r3di_pre_dsp_setup()
9058 0x400, 0x408, 0x40c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c,
9059 0xc0c, 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04
9063 0x00000030, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9064 0x00000003, 0x000000c1, 0x000000f1, 0x00000001, 0x000000c7,
9065 0x000000c1, 0x00000080
9069 0x00000030, 0x00000000, 0x00000000, 0x00000003, 0x00000003,
9070 0x00000003, 0x00000001, 0x000000f1, 0x00000001, 0x000000c7,
9071 0x000000c1, 0x00000080
9075 0x400, 0x42c, 0x46c, 0x4ac, 0x4ec, 0x43c, 0x47c, 0x4bc, 0x4fc, 0x408,
9076 0x100, 0x410, 0x40c, 0x100, 0x100, 0x830, 0x86c, 0x800, 0x86c, 0x800,
9077 0x804, 0x20c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c, 0xc0c,
9078 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04, 0x01c
9082 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
9083 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001,
9084 0x00000600, 0x00000014, 0x00000001, 0x0000060f, 0x0000070f,
9085 0x00000aff, 0x00000000, 0x0000006b, 0x00000001, 0x0000006b,
9086 0x00000057, 0x00800000, 0x00880680, 0x00000080, 0x00000030,
9087 0x00000000, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9088 0x00000001, 0x000000f1, 0x00000001, 0x000000c7, 0x000000c1,
9089 0x00000080, 0x00880680
9099 for (i = 0; i < 3; i++) in ca0132_mmio_init_sbz()
9100 writel(0x00000000, spec->mem_base + addr[i]); in ca0132_mmio_init_sbz()
9105 tmp[0] = 0x00880480; in ca0132_mmio_init_sbz()
9106 tmp[1] = 0x00000080; in ca0132_mmio_init_sbz()
9109 tmp[0] = 0x00820680; in ca0132_mmio_init_sbz()
9110 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9113 tmp[0] = 0x00880680; in ca0132_mmio_init_sbz()
9114 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9117 tmp[0] = 0x00000000; in ca0132_mmio_init_sbz()
9118 tmp[1] = 0x00000000; in ca0132_mmio_init_sbz()
9122 for (i = 0; i < 2; i++) in ca0132_mmio_init_sbz()
9138 for (i = 0; i < count; i++) in ca0132_mmio_init_sbz()
9153 writel(0x00000680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9154 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9157 for (i = 0; i < count; i++) { in ca0132_mmio_init_ae5()
9160 * a different value to 0x20c. in ca0132_mmio_init_ae5()
9163 writel(0x00800001, spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9171 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9193 0x304, 0x304, 0x304, 0x304, 0x100, 0x304, 0x100, 0x304, 0x100, 0x304,
9194 0x100, 0x304, 0x86c, 0x800, 0x86c, 0x800, 0x804
9198 0x0f, 0x0e, 0x1f, 0x0c, 0x3f, 0x08, 0x7f, 0x00, 0xff, 0x00, 0x6b,
9199 0x01, 0x6b, 0x57
9204 * eventually resets the codec with the 0x7ff verb. Not quite sure why it does
9217 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9218 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41); in ae5_register_set()
9219 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9220 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8); in ae5_register_set()
9223 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_register_set()
9224 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9225 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae5_register_set()
9226 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9227 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae5_register_set()
9230 tmp[0] = 0x03; in ae5_register_set()
9231 tmp[1] = 0x03; in ae5_register_set()
9232 tmp[2] = 0x07; in ae5_register_set()
9234 tmp[0] = 0x0f; in ae5_register_set()
9235 tmp[1] = 0x0f; in ae5_register_set()
9236 tmp[2] = 0x0f; in ae5_register_set()
9239 for (i = cur_addr = 0; i < 3; i++, cur_addr++) in ae5_register_set()
9246 for (i = 0; cur_addr < 12; i++, cur_addr++) in ae5_register_set()
9252 writel(0x00800001, spec->mem_base + 0x20c); in ae5_register_set()
9255 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9256 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_register_set()
9258 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_register_set()
9261 chipio_8051_write_direct(codec, 0x90, 0x00); in ae5_register_set()
9262 chipio_8051_write_direct(codec, 0x90, 0x10); in ae5_register_set()
9265 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9267 chipio_write(codec, 0x18b0a4, 0x000000c2); in ae5_register_set()
9269 snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00); in ae5_register_set()
9270 snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00); in ae5_register_set()
9299 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4); in ca0132_alt_init()
9308 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9309 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49); in ca0132_alt_init()
9310 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9311 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88); in ca0132_alt_init()
9312 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9315 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9319 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9320 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49); in ca0132_alt_init()
9321 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9322 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88); in ca0132_alt_init()
9325 chipio_write(codec, 0x18b008, 0x000000f8); in ca0132_alt_init()
9326 chipio_write(codec, 0x18b008, 0x000000f0); in ca0132_alt_init()
9327 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9328 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9364 return 0; in ca0132_init()
9415 for (i = 0; i < spec->num_outputs; i++) in ca0132_init()
9416 init_output(codec, spec->out_pins[i], spec->dacs[0]); in ca0132_init()
9418 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in ca0132_init()
9420 for (i = 0; i < spec->num_inputs; i++) in ca0132_init()
9427 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9428 VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D); in ca0132_init()
9429 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9430 VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20); in ca0132_init()
9458 return 0; in ca0132_init()
9467 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in dbpro_init()
9470 for (i = 0; i < spec->num_inputs; i++) in dbpro_init()
9473 return 0; in dbpro_init()
9538 return 0; in ca0132_suspend()
9565 spec->dacs[0] = 0x2; in ca0132_config()
9566 spec->dacs[1] = 0x3; in ca0132_config()
9567 spec->dacs[2] = 0x4; in ca0132_config()
9613 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9614 spec->out_pins[1] = 0x0f; in ca0132_config()
9615 spec->shared_out_nid = 0x2; in ca0132_config()
9616 spec->unsol_tag_hp = 0x0f; in ca0132_config()
9618 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9619 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9620 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9623 spec->input_pins[0] = 0x12; in ca0132_config()
9624 spec->input_pins[1] = 0x11; in ca0132_config()
9625 spec->input_pins[2] = 0x13; in ca0132_config()
9626 spec->shared_mic_nid = 0x7; in ca0132_config()
9627 spec->unsol_tag_amic1 = 0x11; in ca0132_config()
9632 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9633 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9634 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9635 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9636 spec->shared_out_nid = 0x2; in ca0132_config()
9640 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9641 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9642 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9645 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9646 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9647 spec->shared_mic_nid = 0x7; in ca0132_config()
9648 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9651 spec->dig_out = 0x05; in ca0132_config()
9653 spec->dig_in = 0x09; in ca0132_config()
9657 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9658 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9659 spec->out_pins[2] = 0x10; /* Center/LFE */ in ca0132_config()
9660 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9661 spec->shared_out_nid = 0x2; in ca0132_config()
9665 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9666 spec->adcs[1] = 0x8; /* Not connected, no front mic */ in ca0132_config()
9667 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9670 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9671 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9672 spec->shared_mic_nid = 0x7; in ca0132_config()
9673 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9676 spec->adcs[0] = 0x8; /* ZxR DBPro Aux In */ in ca0132_config()
9679 spec->input_pins[0] = 0x11; /* RCA Line-in */ in ca0132_config()
9681 spec->dig_out = 0x05; in ca0132_config()
9684 spec->dig_in = 0x09; in ca0132_config()
9689 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9690 spec->out_pins[1] = 0x11; /* Rear headphone out */ in ca0132_config()
9691 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9692 spec->out_pins[3] = 0x0F; /* Rear surround */ in ca0132_config()
9693 spec->shared_out_nid = 0x2; in ca0132_config()
9697 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9698 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9699 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9702 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9703 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9704 spec->shared_mic_nid = 0x7; in ca0132_config()
9705 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9708 spec->dig_out = 0x05; in ca0132_config()
9713 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9714 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9715 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9716 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9717 spec->shared_out_nid = 0x2; in ca0132_config()
9721 spec->adcs[0] = 0x07; /* Rear Mic / Line-in */ in ca0132_config()
9722 spec->adcs[1] = 0x08; /* Front Mic, but only if no DSP */ in ca0132_config()
9723 spec->adcs[2] = 0x0a; /* what u hear */ in ca0132_config()
9726 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9727 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9728 spec->shared_mic_nid = 0x7; in ca0132_config()
9729 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9732 spec->dig_out = 0x05; in ca0132_config()
9737 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9738 spec->out_pins[1] = 0x10; /* headphone out */ in ca0132_config()
9739 spec->shared_out_nid = 0x2; in ca0132_config()
9742 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9743 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9744 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9747 spec->input_pins[0] = 0x12; in ca0132_config()
9748 spec->input_pins[1] = 0x11; in ca0132_config()
9749 spec->input_pins[2] = 0x13; in ca0132_config()
9750 spec->shared_mic_nid = 0x7; in ca0132_config()
9751 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9754 spec->dig_out = 0x05; in ca0132_config()
9756 spec->dig_in = 0x09; in ca0132_config()
9781 spec->spec_init_verbs[0].nid = 0x0b; in ca0132_prepare_verbs()
9782 spec->spec_init_verbs[0].param = 0x78D; in ca0132_prepare_verbs()
9783 spec->spec_init_verbs[0].verb = 0x00; in ca0132_prepare_verbs()
9787 spec->spec_init_verbs[2].nid = 0x0b; in ca0132_prepare_verbs()
9789 spec->spec_init_verbs[2].verb = 0x02; in ca0132_prepare_verbs()
9791 spec->spec_init_verbs[3].nid = 0x10; in ca0132_prepare_verbs()
9792 spec->spec_init_verbs[3].param = 0x78D; in ca0132_prepare_verbs()
9793 spec->spec_init_verbs[3].verb = 0x02; in ca0132_prepare_verbs()
9795 spec->spec_init_verbs[4].nid = 0x10; in ca0132_prepare_verbs()
9797 spec->spec_init_verbs[4].verb = 0x02; in ca0132_prepare_verbs()
9801 return 0; in ca0132_prepare_verbs()
9815 case 0x11020033: in sbz_detect_quirk()
9818 case 0x1102003f: in sbz_detect_quirk()
9865 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9869 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9875 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9879 spec->mixers[0] = r3di_mixer; in patch_ca0132()
9883 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9887 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9891 spec->mixers[0] = ca0132_mixer; in patch_ca0132()
9920 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); in patch_ca0132()
9938 if (err < 0) in patch_ca0132()
9942 if (err < 0) in patch_ca0132()
9945 return 0; in patch_ca0132()
9956 HDA_CODEC_ENTRY(0x11020011, "CA0132", patch_ca0132),