Lines Matching +full:dmic +full:- +full:ref
1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt5682.c -- RT5682 ALSA SoC audio component driver
26 #include <sound/soc-dapm.h>
54 ret = regmap_multi_reg_write(rt5682->regmap, patch_list, in rt5682_apply_patch_list()
743 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
744 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
811 regmap_write(rt5682->regmap, RT5682_RESET, 0); in rt5682_reset()
812 if (!rt5682->is_sdw) in rt5682_reset()
813 regmap_write(rt5682->regmap, RT5682_I2C_MODE, 1); in rt5682_reset()
818 * rt5682_sel_asrc_clk_src - select ASRC clock source for a set of filters
841 return -EINVAL; in rt5682_sel_asrc_clk_src()
867 dev_dbg(component->dev, "%s btn_type=%x\n", __func__, btn_type); in rt5682_button_detect()
888 if (rt5682->is_sdw) in rt5682_enable_push_button_irq()
912 * rt5682_headset_detect - Detect headset.
923 struct snd_soc_dapm_context *dapm = &component->dapm; in rt5682_headset_detect()
956 rt5682->jack_type = SND_JACK_HEADSET; in rt5682_headset_detect()
960 rt5682->jack_type = SND_JACK_HEADPHONE; in rt5682_headset_detect()
991 rt5682->jack_type = 0; in rt5682_headset_detect()
994 dev_dbg(component->dev, "jack_type = %d\n", rt5682->jack_type); in rt5682_headset_detect()
995 return rt5682->jack_type; in rt5682_headset_detect()
1004 rt5682->hs_jack = hs_jack; in rt5682_set_jack_detect()
1007 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, in rt5682_set_jack_detect()
1009 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, in rt5682_set_jack_detect()
1011 cancel_delayed_work_sync(&rt5682->jack_detect_work); in rt5682_set_jack_detect()
1016 if (!rt5682->is_sdw) { in rt5682_set_jack_detect()
1017 switch (rt5682->pdata.jd_src) { in rt5682_set_jack_detect()
1030 regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1, in rt5682_set_jack_detect()
1032 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, in rt5682_set_jack_detect()
1036 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2, in rt5682_set_jack_detect()
1038 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, in rt5682_set_jack_detect()
1041 regmap_update_bits(rt5682->regmap, RT5682_4BTN_IL_CMD_4, in rt5682_set_jack_detect()
1042 0x7f7f, (rt5682->pdata.btndet_delay << 8 | in rt5682_set_jack_detect()
1043 rt5682->pdata.btndet_delay)); in rt5682_set_jack_detect()
1044 regmap_update_bits(rt5682->regmap, RT5682_4BTN_IL_CMD_5, in rt5682_set_jack_detect()
1045 0x7f7f, (rt5682->pdata.btndet_delay << 8 | in rt5682_set_jack_detect()
1046 rt5682->pdata.btndet_delay)); in rt5682_set_jack_detect()
1047 regmap_update_bits(rt5682->regmap, RT5682_4BTN_IL_CMD_6, in rt5682_set_jack_detect()
1048 0x7f7f, (rt5682->pdata.btndet_delay << 8 | in rt5682_set_jack_detect()
1049 rt5682->pdata.btndet_delay)); in rt5682_set_jack_detect()
1050 regmap_update_bits(rt5682->regmap, RT5682_4BTN_IL_CMD_7, in rt5682_set_jack_detect()
1051 0x7f7f, (rt5682->pdata.btndet_delay << 8 | in rt5682_set_jack_detect()
1052 rt5682->pdata.btndet_delay)); in rt5682_set_jack_detect()
1054 &rt5682->jack_detect_work, in rt5682_set_jack_detect()
1059 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, in rt5682_set_jack_detect()
1061 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, in rt5682_set_jack_detect()
1066 dev_warn(component->dev, "Wrong JD source\n"); in rt5682_set_jack_detect()
1080 while (!rt5682->component) in rt5682_jack_detect_handler()
1083 while (!rt5682->component->card->instantiated) in rt5682_jack_detect_handler()
1086 mutex_lock(&rt5682->calibrate_mutex); in rt5682_jack_detect_handler()
1088 val = snd_soc_component_read(rt5682->component, RT5682_AJD1_CTRL) in rt5682_jack_detect_handler()
1092 if (rt5682->jack_type == 0) { in rt5682_jack_detect_handler()
1094 rt5682->jack_type = in rt5682_jack_detect_handler()
1095 rt5682_headset_detect(rt5682->component, 1); in rt5682_jack_detect_handler()
1096 } else if ((rt5682->jack_type & SND_JACK_HEADSET) == in rt5682_jack_detect_handler()
1099 rt5682->jack_type = SND_JACK_HEADSET; in rt5682_jack_detect_handler()
1100 btn_type = rt5682_button_detect(rt5682->component); in rt5682_jack_detect_handler()
1112 rt5682->jack_type |= SND_JACK_BTN_0; in rt5682_jack_detect_handler()
1117 rt5682->jack_type |= SND_JACK_BTN_1; in rt5682_jack_detect_handler()
1122 rt5682->jack_type |= SND_JACK_BTN_2; in rt5682_jack_detect_handler()
1127 rt5682->jack_type |= SND_JACK_BTN_3; in rt5682_jack_detect_handler()
1132 dev_err(rt5682->component->dev, in rt5682_jack_detect_handler()
1140 rt5682->jack_type = rt5682_headset_detect(rt5682->component, 0); in rt5682_jack_detect_handler()
1143 snd_soc_jack_report(rt5682->hs_jack, rt5682->jack_type, in rt5682_jack_detect_handler()
1148 if (!rt5682->is_sdw) { in rt5682_jack_detect_handler()
1149 if (rt5682->jack_type & (SND_JACK_BTN_0 | SND_JACK_BTN_1 | in rt5682_jack_detect_handler()
1151 schedule_delayed_work(&rt5682->jd_check_work, 0); in rt5682_jack_detect_handler()
1153 cancel_delayed_work_sync(&rt5682->jd_check_work); in rt5682_jack_detect_handler()
1156 mutex_unlock(&rt5682->calibrate_mutex); in rt5682_jack_detect_handler()
1186 if (rt5682->sysclk < target) { in rt5682_div_sel()
1187 dev_err(rt5682->component->dev, in rt5682_div_sel()
1188 "sysclk rate %d is too low\n", rt5682->sysclk); in rt5682_div_sel()
1192 for (i = 0; i < size - 1; i++) { in rt5682_div_sel()
1193 dev_dbg(rt5682->component->dev, "div[%d]=%d\n", i, div[i]); in rt5682_div_sel()
1194 if (target * div[i] == rt5682->sysclk) in rt5682_div_sel()
1196 if (target * div[i + 1] > rt5682->sysclk) { in rt5682_div_sel()
1197 dev_dbg(rt5682->component->dev, in rt5682_div_sel()
1199 rt5682->sysclk); in rt5682_div_sel()
1204 if (target * div[i] < rt5682->sysclk) in rt5682_div_sel()
1205 dev_err(rt5682->component->dev, in rt5682_div_sel()
1206 "sysclk rate %d is too high\n", rt5682->sysclk); in rt5682_div_sel()
1208 return size - 1; in rt5682_div_sel()
1212 * set_dmic_clk - Set parameter of dmic.
1218 * Choose dmic clock between 1MHz and 3MHz.
1225 snd_soc_dapm_to_component(w->dapm); in set_dmic_clk()
1227 int idx = -EINVAL, dmic_clk_rate = 3072000; in set_dmic_clk()
1230 if (rt5682->pdata.dmic_clk_rate) in set_dmic_clk()
1231 dmic_clk_rate = rt5682->pdata.dmic_clk_rate; in set_dmic_clk()
1245 snd_soc_dapm_to_component(w->dapm); in set_filter_clk()
1247 int ref, val, reg, idx = -EINVAL; in set_filter_clk() local
1251 if (rt5682->is_sdw) in set_filter_clk()
1256 if (w->shift == RT5682_PWR_ADC_S1F_BIT && in set_filter_clk()
1258 ref = 256 * rt5682->lrck[RT5682_AIF2]; in set_filter_clk()
1260 ref = 256 * rt5682->lrck[RT5682_AIF1]; in set_filter_clk()
1262 idx = rt5682_div_sel(rt5682, ref, div_f, ARRAY_SIZE(div_f)); in set_filter_clk()
1264 if (w->shift == RT5682_PWR_ADC_S1F_BIT) in set_filter_clk()
1274 if (rt5682->sysclk <= 12288000 * div_o[idx]) in set_filter_clk()
1290 snd_soc_dapm_to_component(w->dapm); in is_sys_clk_from_pll1()
1305 snd_soc_dapm_to_component(w->dapm); in is_sys_clk_from_pll2()
1320 snd_soc_dapm_to_component(w->dapm); in is_using_asrc()
1322 switch (w->shift) { in is_using_asrc()
1395 /* MX-26 [13] [5] */
1415 /* MX-26 [11:10] [3:2] */
1435 /* MX-26 [12] [4] */
1437 "DAC MIX", "DMIC"
1454 /* MX-79 [6:4] I2S1 ADC data location */
1474 /* MX-2B [4], MX-2B [0]*/
1505 snd_soc_dapm_to_component(w->dapm); in rt5682_hp_event()
1536 snd_soc_dapm_to_component(w->dapm); in set_dmic_power()
1540 if (rt5682->pdata.dmic_delay) in set_dmic_power()
1541 delay = rt5682->pdata.dmic_delay; in set_dmic_power()
1558 if (!rt5682->jack_type) { in set_dmic_power()
1559 if (!snd_soc_dapm_get_pin_status(w->dapm, "MICBIAS")) in set_dmic_power()
1562 if (!snd_soc_dapm_get_pin_status(w->dapm, "Vref2")) in set_dmic_power()
1576 snd_soc_dapm_to_component(w->dapm); in rt5682_set_verf()
1580 switch (w->shift) { in rt5682_set_verf()
1595 switch (w->shift) { in rt5682_set_verf()
1654 SND_SOC_DAPM_SUPPLY_S("DMIC ASRC", 1, RT5682_PLL_TRACK_1,
1664 SND_SOC_DAPM_INPUT("DMIC L1"),
1665 SND_SOC_DAPM_INPUT("DMIC R1"),
1669 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1867 {"DMIC L1", NULL, "DMIC CLK"},
1868 {"DMIC L1", NULL, "DMIC1 Power"},
1869 {"DMIC R1", NULL, "DMIC CLK"},
1870 {"DMIC R1", NULL, "DMIC1 Power"},
1871 {"DMIC CLK", NULL, "DMIC ASRC"},
1880 {"Stereo1 ADC L2 Mux", "DMIC", "DMIC L1"},
1885 {"Stereo1 ADC R2 Mux", "DMIC", "DMIC R1"},
1996 struct snd_soc_component *component = dai->component; in rt5682_set_tdm_slot()
2022 return -EINVAL; in rt5682_set_tdm_slot()
2031 return -EINVAL; in rt5682_set_tdm_slot()
2051 return -EINVAL; in rt5682_set_tdm_slot()
2065 struct snd_soc_component *component = dai->component; in rt5682_hw_params()
2070 rt5682->lrck[dai->id] = params_rate(params); in rt5682_hw_params()
2071 pre_div = rl6231_get_clk_info(rt5682->sysclk, rt5682->lrck[dai->id]); in rt5682_hw_params()
2075 dev_err(component->dev, "Unsupported frame size: %d\n", in rt5682_hw_params()
2077 return -EINVAL; in rt5682_hw_params()
2080 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n", in rt5682_hw_params()
2081 rt5682->lrck[dai->id], pre_div, dai->id); in rt5682_hw_params()
2103 return -EINVAL; in rt5682_hw_params()
2106 switch (dai->id) { in rt5682_hw_params()
2110 if (rt5682->master[RT5682_AIF1]) { in rt5682_hw_params()
2115 (rt5682->sysclk_src) << RT5682_I2S_CLK_SRC_SFT); in rt5682_hw_params()
2129 if (rt5682->master[RT5682_AIF2]) { in rt5682_hw_params()
2144 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); in rt5682_hw_params()
2145 return -EINVAL; in rt5682_hw_params()
2153 struct snd_soc_component *component = dai->component; in rt5682_set_dai_fmt()
2159 rt5682->master[dai->id] = 1; in rt5682_set_dai_fmt()
2162 rt5682->master[dai->id] = 0; in rt5682_set_dai_fmt()
2165 return -EINVAL; in rt5682_set_dai_fmt()
2176 if (dai->id == RT5682_AIF1) in rt5682_set_dai_fmt()
2179 return -EINVAL; in rt5682_set_dai_fmt()
2182 if (dai->id == RT5682_AIF1) in rt5682_set_dai_fmt()
2186 return -EINVAL; in rt5682_set_dai_fmt()
2189 return -EINVAL; in rt5682_set_dai_fmt()
2208 return -EINVAL; in rt5682_set_dai_fmt()
2211 switch (dai->id) { in rt5682_set_dai_fmt()
2219 tdm_ctrl | rt5682->master[dai->id]); in rt5682_set_dai_fmt()
2222 if (rt5682->master[dai->id] == 0) in rt5682_set_dai_fmt()
2229 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); in rt5682_set_dai_fmt()
2230 return -EINVAL; in rt5682_set_dai_fmt()
2241 if (freq == rt5682->sysclk && clk_id == rt5682->sysclk_src) in rt5682_set_component_sysclk()
2262 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id); in rt5682_set_component_sysclk()
2263 return -EINVAL; in rt5682_set_component_sysclk()
2268 if (rt5682->master[RT5682_AIF2]) { in rt5682_set_component_sysclk()
2274 rt5682->sysclk = freq; in rt5682_set_component_sysclk()
2275 rt5682->sysclk_src = clk_id; in rt5682_set_component_sysclk()
2277 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n", in rt5682_set_component_sysclk()
2292 if (source == rt5682->pll_src[pll_id] && in rt5682_set_component_pll()
2293 freq_in == rt5682->pll_in[pll_id] && in rt5682_set_component_pll()
2294 freq_out == rt5682->pll_out[pll_id]) in rt5682_set_component_pll()
2298 dev_dbg(component->dev, "PLL disabled\n"); in rt5682_set_component_pll()
2300 rt5682->pll_in[pll_id] = 0; in rt5682_set_component_pll()
2301 rt5682->pll_out[pll_id] = 0; in rt5682_set_component_pll()
2315 dev_err(component->dev, "Unknown PLL2 Source %d\n", in rt5682_set_component_pll()
2317 return -EINVAL; in rt5682_set_component_pll()
2327 dev_err(component->dev, "Unsupport input clock %d\n", in rt5682_set_component_pll()
2331 dev_dbg(component->dev, "PLL2F: fin=%d fout=%d bypass=%d m=%d n=%d k=%d\n", in rt5682_set_component_pll()
2339 dev_err(component->dev, "Unsupport input clock %d\n", in rt5682_set_component_pll()
2343 dev_dbg(component->dev, "PLL2B: fin=%d fout=%d bypass=%d m=%d n=%d k=%d\n", in rt5682_set_component_pll()
2383 dev_err(component->dev, "Unknown PLL1 Source %d\n", in rt5682_set_component_pll()
2385 return -EINVAL; in rt5682_set_component_pll()
2390 dev_err(component->dev, "Unsupport input clock %d\n", in rt5682_set_component_pll()
2395 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n", in rt5682_set_component_pll()
2406 rt5682->pll_in[pll_id] = freq_in; in rt5682_set_component_pll()
2407 rt5682->pll_out[pll_id] = freq_out; in rt5682_set_component_pll()
2408 rt5682->pll_src[pll_id] = source; in rt5682_set_component_pll()
2415 struct snd_soc_component *component = dai->component; in rt5682_set_bclk1_ratio()
2418 rt5682->bclk[dai->id] = ratio; in rt5682_set_bclk1_ratio()
2438 dev_err(dai->dev, "Invalid bclk1 ratio %d\n", ratio); in rt5682_set_bclk1_ratio()
2439 return -EINVAL; in rt5682_set_bclk1_ratio()
2447 struct snd_soc_component *component = dai->component; in rt5682_set_bclk2_ratio()
2450 rt5682->bclk[dai->id] = ratio; in rt5682_set_bclk2_ratio()
2464 dev_err(dai->dev, "Invalid bclk2 ratio %d\n", ratio); in rt5682_set_bclk2_ratio()
2465 return -EINVAL; in rt5682_set_bclk2_ratio()
2478 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, in rt5682_set_bias_level()
2480 regmap_update_bits(rt5682->regmap, RT5682_PWR_DIG_1, in rt5682_set_bias_level()
2486 regmap_update_bits(rt5682->regmap, RT5682_PWR_DIG_1, in rt5682_set_bias_level()
2490 regmap_update_bits(rt5682->regmap, RT5682_PWR_DIG_1, in rt5682_set_bias_level()
2492 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, in rt5682_set_bias_level()
2509 if (!rt5682->master[RT5682_AIF1]) { in rt5682_clk_check()
2510 dev_dbg(rt5682->component->dev, "sysclk/dai not set correctly\n"); in rt5682_clk_check()
2521 struct snd_soc_component *component = rt5682->component; in rt5682_wclk_prepare()
2526 return -EINVAL; in rt5682_wclk_prepare()
2557 struct snd_soc_component *component = rt5682->component; in rt5682_wclk_unprepare()
2568 if (!rt5682->jack_type) in rt5682_wclk_unprepare()
2587 struct snd_soc_component *component = rt5682->component; in rt5682_wclk_recalc_rate()
2595 if (rt5682->lrck[RT5682_AIF1] != CLK_48 && in rt5682_wclk_recalc_rate()
2596 rt5682->lrck[RT5682_AIF1] != CLK_44) { in rt5682_wclk_recalc_rate()
2597 dev_warn(component->dev, "%s: clk %s only support %d or %d Hz output\n", in rt5682_wclk_recalc_rate()
2602 return rt5682->lrck[RT5682_AIF1]; in rt5682_wclk_recalc_rate()
2611 struct snd_soc_component *component = rt5682->component; in rt5682_wclk_round_rate()
2615 return -EINVAL; in rt5682_wclk_round_rate()
2621 dev_warn(component->dev, "%s: clk %s only support %d or %d Hz output\n", in rt5682_wclk_round_rate()
2635 struct snd_soc_component *component = rt5682->component; in rt5682_wclk_set_rate()
2642 return -EINVAL; in rt5682_wclk_set_rate()
2651 parent_clk = clk_get_parent(hw->clk); in rt5682_wclk_set_rate()
2653 dev_warn(component->dev, in rt5682_wclk_set_rate()
2658 dev_warn(component->dev, "clk %s only support %d Hz input\n", in rt5682_wclk_set_rate()
2672 rt5682->lrck[RT5682_AIF1] = rate; in rt5682_wclk_set_rate()
2674 pre_div = rl6231_get_clk_info(rt5682->sysclk, rate); in rt5682_wclk_set_rate()
2679 (rt5682->sysclk_src) << RT5682_I2S_CLK_SRC_SFT); in rt5682_wclk_set_rate()
2690 struct snd_soc_component *component = rt5682->component; in rt5682_bclk_recalc_rate()
2734 return -EINVAL; in rt5682_bclk_round_rate()
2754 struct snd_soc_component *component = rt5682->component; in rt5682_bclk_set_rate()
2759 return -EINVAL; in rt5682_bclk_set_rate()
2764 if (dai->id == RT5682_AIF1) in rt5682_bclk_set_rate()
2767 dev_err(component->dev, "dai %d not found in component\n", in rt5682_bclk_set_rate()
2769 return -ENODEV; in rt5682_bclk_set_rate()
2792 struct device *dev = component->dev; in rt5682_register_dai_clks()
2794 struct rt5682_platform_data *pdata = &rt5682->pdata; in rt5682_register_dai_clks()
2801 dai_clk_hw = &rt5682->dai_clks_hw[i]; in rt5682_register_dai_clks()
2806 if (rt5682->mclk) { in rt5682_register_dai_clks()
2816 &rt5682->dai_clks_hw[RT5682_DAI_WCLK_IDX] in rt5682_register_dai_clks()
2822 return -EINVAL; in rt5682_register_dai_clks()
2825 init.name = pdata->dai_clk_names[i]; in rt5682_register_dai_clks()
2828 dai_clk_hw->init = &init; in rt5682_register_dai_clks()
2837 if (dev->of_node) { in rt5682_register_dai_clks()
2858 struct snd_soc_dapm_context *dapm = &component->dapm; in rt5682_probe()
2863 rt5682->component = component; in rt5682_probe()
2865 if (rt5682->is_sdw) { in rt5682_probe()
2866 slave = rt5682->slave; in rt5682_probe()
2868 &slave->initialization_complete, in rt5682_probe()
2871 dev_err(&slave->dev, "Initialization not complete, timed out\n"); in rt5682_probe()
2872 return -ETIMEDOUT; in rt5682_probe()
2877 rt5682->mclk = devm_clk_get(component->dev, "mclk"); in rt5682_probe()
2878 if (IS_ERR(rt5682->mclk)) { in rt5682_probe()
2879 if (PTR_ERR(rt5682->mclk) != -ENOENT) { in rt5682_probe()
2880 ret = PTR_ERR(rt5682->mclk); in rt5682_probe()
2883 rt5682->mclk = NULL; in rt5682_probe()
2892 rt5682->lrck[RT5682_AIF1] = CLK_48; in rt5682_probe()
2914 regcache_cache_only(rt5682->regmap, true); in rt5682_suspend()
2915 regcache_mark_dirty(rt5682->regmap); in rt5682_suspend()
2923 regcache_cache_only(rt5682->regmap, false); in rt5682_resume()
2924 regcache_sync(rt5682->regmap); in rt5682_resume()
2927 &rt5682->jack_detect_work, msecs_to_jiffies(250)); in rt5682_resume()
2975 device_property_read_u32(dev, "realtek,dmic1-data-pin", in rt5682_parse_dt()
2976 &rt5682->pdata.dmic1_data_pin); in rt5682_parse_dt()
2977 device_property_read_u32(dev, "realtek,dmic1-clk-pin", in rt5682_parse_dt()
2978 &rt5682->pdata.dmic1_clk_pin); in rt5682_parse_dt()
2979 device_property_read_u32(dev, "realtek,jd-src", in rt5682_parse_dt()
2980 &rt5682->pdata.jd_src); in rt5682_parse_dt()
2981 device_property_read_u32(dev, "realtek,btndet-delay", in rt5682_parse_dt()
2982 &rt5682->pdata.btndet_delay); in rt5682_parse_dt()
2983 device_property_read_u32(dev, "realtek,dmic-clk-rate-hz", in rt5682_parse_dt()
2984 &rt5682->pdata.dmic_clk_rate); in rt5682_parse_dt()
2985 device_property_read_u32(dev, "realtek,dmic-delay-ms", in rt5682_parse_dt()
2986 &rt5682->pdata.dmic_delay); in rt5682_parse_dt()
2988 rt5682->pdata.ldo1_en = of_get_named_gpio(dev->of_node, in rt5682_parse_dt()
2989 "realtek,ldo1-en-gpios", 0); in rt5682_parse_dt()
2991 if (device_property_read_string_array(dev, "clock-output-names", in rt5682_parse_dt()
2992 rt5682->pdata.dai_clk_names, in rt5682_parse_dt()
2995 rt5682->pdata.dai_clk_names[RT5682_DAI_WCLK_IDX], in rt5682_parse_dt()
2996 rt5682->pdata.dai_clk_names[RT5682_DAI_BCLK_IDX]); in rt5682_parse_dt()
3006 mutex_lock(&rt5682->calibrate_mutex); in rt5682_calibrate()
3009 regmap_write(rt5682->regmap, RT5682_I2C_CTRL, 0x000f); in rt5682_calibrate()
3010 regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0xa2af); in rt5682_calibrate()
3012 regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0xf2af); in rt5682_calibrate()
3013 regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0300); in rt5682_calibrate()
3014 regmap_write(rt5682->regmap, RT5682_GLB_CLK, 0x8000); in rt5682_calibrate()
3015 regmap_write(rt5682->regmap, RT5682_PWR_DIG_1, 0x0100); in rt5682_calibrate()
3016 regmap_write(rt5682->regmap, RT5682_HP_IMP_SENS_CTRL_19, 0x3800); in rt5682_calibrate()
3017 regmap_write(rt5682->regmap, RT5682_CHOP_DAC, 0x3000); in rt5682_calibrate()
3018 regmap_write(rt5682->regmap, RT5682_CALIB_ADC_CTRL, 0x7005); in rt5682_calibrate()
3019 regmap_write(rt5682->regmap, RT5682_STO1_ADC_MIXER, 0x686c); in rt5682_calibrate()
3020 regmap_write(rt5682->regmap, RT5682_CAL_REC, 0x0d0d); in rt5682_calibrate()
3021 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_2, 0x0321); in rt5682_calibrate()
3022 regmap_write(rt5682->regmap, RT5682_HP_LOGIC_CTRL_2, 0x0004); in rt5682_calibrate()
3023 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_1, 0x7c00); in rt5682_calibrate()
3024 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_3, 0x06a1); in rt5682_calibrate()
3025 regmap_write(rt5682->regmap, RT5682_A_DAC1_MUX, 0x0311); in rt5682_calibrate()
3026 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_1, 0x7c00); in rt5682_calibrate()
3028 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_1, 0xfc00); in rt5682_calibrate()
3031 regmap_read(rt5682->regmap, RT5682_HP_CALIB_STA_1, &value); in rt5682_calibrate()
3039 dev_err(rt5682->component->dev, "HP Calibration Failure\n"); in rt5682_calibrate()
3042 regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0x002f); in rt5682_calibrate()
3043 regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080); in rt5682_calibrate()
3044 regmap_write(rt5682->regmap, RT5682_GLB_CLK, 0x0000); in rt5682_calibrate()
3045 regmap_write(rt5682->regmap, RT5682_PWR_DIG_1, 0x0000); in rt5682_calibrate()
3046 regmap_write(rt5682->regmap, RT5682_CHOP_DAC, 0x2000); in rt5682_calibrate()
3047 regmap_write(rt5682->regmap, RT5682_CALIB_ADC_CTRL, 0x2005); in rt5682_calibrate()
3048 regmap_write(rt5682->regmap, RT5682_STO1_ADC_MIXER, 0xc0c4); in rt5682_calibrate()
3049 regmap_write(rt5682->regmap, RT5682_CAL_REC, 0x0c0c); in rt5682_calibrate()
3051 mutex_unlock(&rt5682->calibrate_mutex); in rt5682_calibrate()