Lines Matching refs:clks
163 clocks = <&clks IMX7ULP_CLK_DMA1>, <&clks IMX7ULP_CLK_DMA_MUX1>;
197 clocks = <&clks IMX7ULP_CLK_SNVS>;
205 clocks = <&clks IMX7ULP_CLK_LPTPM5>;
213 clocks = <&clks IMX7ULP_CLK_LPIT1>;
215 assigned-clocks = <&clks IMX7ULP_CLK_LPIT1>;
216 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
223 clocks = <&clks IMX7ULP_CLK_LPI2C4>;
225 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C4>;
226 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
235 clocks = <&clks IMX7ULP_CLK_LPI2C5>;
237 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C5>;
238 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
247 clocks = <&clks IMX7ULP_CLK_LPSPI2>;
249 assigned-clocks = <&clks IMX7ULP_CLK_LPSPI2>;
250 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
259 clocks = <&clks IMX7ULP_CLK_LPSPI3>;
261 assigned-clocks = <&clks IMX7ULP_CLK_LPSPI3>;
262 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
271 clocks = <&clks IMX7ULP_CLK_LPUART4>;
273 assigned-clocks = <&clks IMX7ULP_CLK_LPUART4>;
274 assigned-clock-parents = <&clks IMX7ULP_CLK_OSC>;
283 clocks = <&clks IMX7ULP_CLK_LPUART5>;
285 assigned-clocks = <&clks IMX7ULP_CLK_LPUART5>;
286 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
298 clocks = <&clks IMX7ULP_CLK_USB0>;
319 clocks = <&clks IMX7ULP_CLK_USB_PHY>;
327 clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>,
328 <&clks IMX7ULP_CLK_NIC1_DIV>,
329 <&clks IMX7ULP_CLK_USDHC0>;
341 clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>,
342 <&clks IMX7ULP_CLK_NIC1_DIV>,
343 <&clks IMX7ULP_CLK_USDHC1>;
355 clocks = <&clks IMX7ULP_CLK_WDG1>;
356 assigned-clocks = <&clks IMX7ULP_CLK_WDG1>;
357 assigned-clocks-parents = <&clks IMX7ULP_CLK_FIRC>;
370 clocks = <&clks IMX7ULP_CLK_WDG2>;
371 assigned-clocks = <&clks IMX7ULP_CLK_WDG2>;
372 assigned-clocks-parents = <&clks IMX7ULP_CLK_FIRC>;
376 clks: scg1@403E0000 { label
384 assigned-clocks = <&clks IMX7ULP_CLK_LPTPM5>,
385 <&clks IMX7ULP_CLK_USDHC1>;
386 assigned-clock-parents = <&clks IMX7ULP_CLK_OSC>,
387 <&clks IMX7ULP_CLK_NIC1_DIV>;
418 clocks = <&clks IMX7ULP_CLK_LPI2C6>;
420 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C6>;
421 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
430 clocks = <&clks IMX7ULP_CLK_LPI2C7>;
432 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C7>;
433 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
442 clocks = <&clks IMX7ULP_CLK_LPUART6>;
444 assigned-clocks = <&clks IMX7ULP_CLK_LPUART6>;
445 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
456 clocks = <&clks IMX7ULP_CLK_LPUART7>;
458 assigned-clocks = <&clks IMX7ULP_CLK_LPUART7>;
459 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
470 clocks = <&clks IMX7ULP_CLK_DUMMY>,
471 <&clks IMX7ULP_CLK_LCDIF>,
472 <&clks IMX7ULP_CLK_DUMMY>;
481 clocks = <&clks IMX7ULP_CLK_DSI>;
587 clocks = <&clks IMX7ULP_CLK_DUMMY>,
588 <&clks IMX7ULP_CLK_DUMMY>;
602 clocks = <&clks IMX7ULP_CLK_GPU3D>,
603 <&clks IMX7ULP_CLK_NIC1_DIV>,
604 <&clks IMX7ULP_CLK_GPU_DIV>,
605 <&clks IMX7ULP_CLK_GPU2D>,
606 <&clks IMX7ULP_CLK_NIC1_DIV>,
607 <&clks IMX7ULP_CLK_NIC1_DIV>;