Lines Matching refs:clocks
80 clocks {
163 clocks = <&clks IMX7ULP_CLK_DMA1>, <&clks IMX7ULP_CLK_DMA_MUX1>;
197 clocks = <&clks IMX7ULP_CLK_SNVS>;
205 clocks = <&clks IMX7ULP_CLK_LPTPM5>;
212 /* clocks = <&lpclk>;*/
213 clocks = <&clks IMX7ULP_CLK_LPIT1>;
215 assigned-clocks = <&clks IMX7ULP_CLK_LPIT1>;
223 clocks = <&clks IMX7ULP_CLK_LPI2C4>;
225 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C4>;
235 clocks = <&clks IMX7ULP_CLK_LPI2C5>;
237 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C5>;
247 clocks = <&clks IMX7ULP_CLK_LPSPI2>;
249 assigned-clocks = <&clks IMX7ULP_CLK_LPSPI2>;
259 clocks = <&clks IMX7ULP_CLK_LPSPI3>;
261 assigned-clocks = <&clks IMX7ULP_CLK_LPSPI3>;
271 clocks = <&clks IMX7ULP_CLK_LPUART4>;
273 assigned-clocks = <&clks IMX7ULP_CLK_LPUART4>;
283 clocks = <&clks IMX7ULP_CLK_LPUART5>;
285 assigned-clocks = <&clks IMX7ULP_CLK_LPUART5>;
298 clocks = <&clks IMX7ULP_CLK_USB0>;
319 clocks = <&clks IMX7ULP_CLK_USB_PHY>;
327 clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>,
341 clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>,
355 clocks = <&clks IMX7ULP_CLK_WDG1>;
356 assigned-clocks = <&clks IMX7ULP_CLK_WDG1>;
357 assigned-clocks-parents = <&clks IMX7ULP_CLK_FIRC>;
370 clocks = <&clks IMX7ULP_CLK_WDG2>;
371 assigned-clocks = <&clks IMX7ULP_CLK_WDG2>;
372 assigned-clocks-parents = <&clks IMX7ULP_CLK_FIRC>;
379 clocks = <&ckil>, <&osc>, <&sirc>,
384 assigned-clocks = <&clks IMX7ULP_CLK_LPTPM5>,
418 clocks = <&clks IMX7ULP_CLK_LPI2C6>;
420 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C6>;
430 clocks = <&clks IMX7ULP_CLK_LPI2C7>;
432 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C7>;
442 clocks = <&clks IMX7ULP_CLK_LPUART6>;
444 assigned-clocks = <&clks IMX7ULP_CLK_LPUART6>;
456 clocks = <&clks IMX7ULP_CLK_LPUART7>;
458 assigned-clocks = <&clks IMX7ULP_CLK_LPUART7>;
470 clocks = <&clks IMX7ULP_CLK_DUMMY>,
481 clocks = <&clks IMX7ULP_CLK_DSI>;
587 clocks = <&clks IMX7ULP_CLK_DUMMY>,
602 clocks = <&clks IMX7ULP_CLK_GPU3D>,