Lines Matching refs:gd
38 size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE), in dram_init_banksize()
39 gd->ram_top); in dram_init_banksize()
43 gd->bd->bi_dram[0].start = 0x200000; in dram_init_banksize()
44 gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; in dram_init_banksize()
53 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
54 gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr in dram_init_banksize()
56 gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr + in dram_init_banksize()
58 gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start in dram_init_banksize()
59 + top - gd->bd->bi_dram[1].start; in dram_init_banksize()
61 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
62 gd->bd->bi_dram[0].size = 0x8400000; in dram_init_banksize()
64 gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE in dram_init_banksize()
65 + gd->bd->bi_dram[0].size + 0x2000000; in dram_init_banksize()
66 gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start in dram_init_banksize()
67 + top - gd->bd->bi_dram[1].start; in dram_init_banksize()
70 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
71 gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; in dram_init_banksize()
201 gd->ram_size = ram.size; in dram_init()
212 return (gd->ram_top > top) ? top : gd->ram_top; in board_get_usable_ram_top()