110 static int gen3_clk_setup_sdif_div(struct clk *clk, ulong rate)  in gen3_clk_setup_sdif_div()  argument
136 	writel((rate == 400000000) ? 0x4 : 0x1, priv->base + core->offset);  in gen3_clk_setup_sdif_div()
164 	u64 rate = 0;  in gen3_clk_get_rate64()  local
176 		rate = gen3_clk_get_rate64(&parent);  in gen3_clk_get_rate64()
178 		      __func__, __LINE__, parent.id, rate);  in gen3_clk_get_rate64()
179 		return rate;  in gen3_clk_get_rate64()
189 			rate = clk_get_rate(&priv->clk_extal);  in gen3_clk_get_rate64()
191 			      __func__, __LINE__, rate);  in gen3_clk_get_rate64()
192 			return rate;  in gen3_clk_get_rate64()
196 			rate = clk_get_rate(&priv->clk_extalr);  in gen3_clk_get_rate64()
198 			      __func__, __LINE__, rate);  in gen3_clk_get_rate64()
199 			return rate;  in gen3_clk_get_rate64()
205 		rate = gen3_clk_get_rate64(&parent) / pll_config->extal_div;  in gen3_clk_get_rate64()
208 		      core->parent, pll_config->extal_div, rate);  in gen3_clk_get_rate64()
209 		return rate;  in gen3_clk_get_rate64()
214 		rate = gen3_clk_get_rate64(&parent) * mult;  in gen3_clk_get_rate64()
216 		      __func__, __LINE__, core->parent, mult, rate);  in gen3_clk_get_rate64()
217 		return rate;  in gen3_clk_get_rate64()
220 		rate = gen3_clk_get_rate64(&parent) * pll_config->pll1_mult;  in gen3_clk_get_rate64()
221 		rate /= pll_config->pll1_div;  in gen3_clk_get_rate64()
225 		      pll_config->pll1_div, rate);  in gen3_clk_get_rate64()
226 		return rate;  in gen3_clk_get_rate64()
231 		rate = gen3_clk_get_rate64(&parent) * mult;  in gen3_clk_get_rate64()
233 		      __func__, __LINE__, core->parent, mult, rate);  in gen3_clk_get_rate64()
234 		return rate;  in gen3_clk_get_rate64()
237 		rate = gen3_clk_get_rate64(&parent) * pll_config->pll3_mult;  in gen3_clk_get_rate64()
238 		rate /= pll_config->pll3_div;  in gen3_clk_get_rate64()
242 		      pll_config->pll3_div, rate);  in gen3_clk_get_rate64()
243 		return rate;  in gen3_clk_get_rate64()
248 		rate = gen3_clk_get_rate64(&parent) * mult;  in gen3_clk_get_rate64()
250 		      __func__, __LINE__, core->parent, mult, rate);  in gen3_clk_get_rate64()
251 		return rate;  in gen3_clk_get_rate64()
254 		rate = (gen3_clk_get_rate64(&parent) * core->mult) / core->div;  in gen3_clk_get_rate64()
257 		      core->parent, core->mult, core->div, rate);  in gen3_clk_get_rate64()
258 		return rate;  in gen3_clk_get_rate64()
262 		rate = gen3_clk_get_rate64(&parent) / div;  in gen3_clk_get_rate64()
266 		      div, rate);  in gen3_clk_get_rate64()
267 		return rate;  in gen3_clk_get_rate64()
277 			rate = gen3_clk_get_rate64(&parent) /  in gen3_clk_get_rate64()
281 			      core->parent, cpg_sd_div_table[i].div, rate);  in gen3_clk_get_rate64()
283 			return rate;  in gen3_clk_get_rate64()
289 		rate = gen3_clk_get_rate64(&parent);  in gen3_clk_get_rate64()
296 			rate /= 5;  in gen3_clk_get_rate64()
298 			rate /= 6;  in gen3_clk_get_rate64()
304 		rate /= postdiv + 1;  in gen3_clk_get_rate64()
308 		      core->parent, prediv, postdiv, rate);  in gen3_clk_get_rate64()
324 static ulong gen3_clk_set_rate(struct clk *clk, ulong rate)  in gen3_clk_set_rate()  argument
327 	gen3_clk_setup_sdif_div(clk, rate);  in gen3_clk_set_rate()