Lines Matching refs:BIT
16 [CLK_BUS_MMC0] = GATE(0x060, BIT(8)),
17 [CLK_BUS_MMC1] = GATE(0x060, BIT(9)),
18 [CLK_BUS_MMC2] = GATE(0x060, BIT(10)),
19 [CLK_BUS_SPI0] = GATE(0x060, BIT(20)),
20 [CLK_BUS_SPI1] = GATE(0x060, BIT(21)),
21 [CLK_BUS_OTG] = GATE(0x060, BIT(24)),
22 [CLK_BUS_EHCI] = GATE(0x060, BIT(26)),
23 [CLK_BUS_OHCI] = GATE(0x060, BIT(29)),
25 [CLK_BUS_UART0] = GATE(0x06c, BIT(16)),
26 [CLK_BUS_UART1] = GATE(0x06c, BIT(17)),
27 [CLK_BUS_UART2] = GATE(0x06c, BIT(18)),
28 [CLK_BUS_UART3] = GATE(0x06c, BIT(19)),
29 [CLK_BUS_UART4] = GATE(0x06c, BIT(20)),
31 [CLK_SPI0] = GATE(0x0a0, BIT(31)),
32 [CLK_SPI1] = GATE(0x0a4, BIT(31)),
34 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
35 [CLK_USB_PHY1] = GATE(0x0cc, BIT(9)),
36 [CLK_USB_HSIC] = GATE(0x0cc, BIT(10)),
37 [CLK_USB_HSIC_12M] = GATE(0x0cc, BIT(11)),
38 [CLK_USB_OHCI] = GATE(0x0cc, BIT(16)),
42 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
43 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
44 [RST_USB_HSIC] = RESET(0x0cc, BIT(2)),
46 [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)),
47 [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)),
48 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
49 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
50 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
51 [RST_BUS_OTG] = RESET(0x2c0, BIT(24)),
52 [RST_BUS_EHCI] = RESET(0x2c0, BIT(26)),
53 [RST_BUS_OHCI] = RESET(0x2c0, BIT(29)),
55 [RST_BUS_UART0] = RESET(0x2d8, BIT(16)),
56 [RST_BUS_UART1] = RESET(0x2d8, BIT(17)),
57 [RST_BUS_UART2] = RESET(0x2d8, BIT(18)),
58 [RST_BUS_UART3] = RESET(0x2d8, BIT(19)),
59 [RST_BUS_UART4] = RESET(0x2d8, BIT(20)),