125 	unsigned int reg;  in usb2_eye_config()  local
127 	reg = readl(USB2_PHY_BASE_REG + HIXVP_PHY_ANA_CFG_0_OFFSET);  in usb2_eye_config()
128 	reg &= ~HIXVP_PHY_PRE_DRIVE_MASK;  in usb2_eye_config()
129 	reg |= HIXVP_PHY_PRE_DRIVE_VAL;  in usb2_eye_config()
130 	writel(reg, USB2_PHY_BASE_REG + HIXVP_PHY_ANA_CFG_0_OFFSET);  in usb2_eye_config()
133 	reg = readl(USB2_PHY_BASE_REG + HIXVP_PHY_ANA_CFG_2_OFFSET);  in usb2_eye_config()
134 	reg |= HIXVP_PHY_TX_TEST_BIT;  in usb2_eye_config()
135 	writel(reg, USB2_PHY_BASE_REG + HIXVP_PHY_ANA_CFG_2_OFFSET);  in usb2_eye_config()
138 	reg = readl(USB2_PHY_BASE_REG + HIXVP_PHY_ANA_CFG_2_OFFSET);  in usb2_eye_config()
139 	reg &= ~HIXVP_PHY_DISCONNECT_REFERENCE_MASK;  in usb2_eye_config()
140 	reg |= HIXVP_PHY_DISCONNECT_REFERENCE_VAL;  in usb2_eye_config()
141 	writel(reg, USB2_PHY_BASE_REG + HIXVP_PHY_ANA_CFG_2_OFFSET);  in usb2_eye_config()
144 	reg = readl(USB2_PHY_BASE_REG + HIXVP_PHY_ANA_CFG_4_OFFSET);  in usb2_eye_config()
145 	reg &= ~HIXVP_PHY_TX_REFERENCE_MASK;  in usb2_eye_config()
146 	reg |= HIXVP_PHY_TX_REFERENCE_VAL;  in usb2_eye_config()
147 	writel(reg, USB2_PHY_BASE_REG + HIXVP_PHY_ANA_CFG_4_OFFSET);  in usb2_eye_config()
150 	reg = readl(USB2_PHY_BASE_REG + HIXVP_PHY_ANA_CFG_4_OFFSET);  in usb2_eye_config()
151 	reg &= ~HIXVP_PHY_SQUELCH_REFERENCE_MASK;  in usb2_eye_config()
152 	reg |= HIXVP_PHY_SQUELCH_REFERENCE_VAL;  in usb2_eye_config()
153 	writel(reg, USB2_PHY_BASE_REG + HIXVP_PHY_ANA_CFG_4_OFFSET);  in usb2_eye_config()
159 	unsigned int reg;  in usb2_trim_config()  local
164 	reg = readl(USB2_PHY_BASE_REG + USB2_TRIM_OFFSET);  in usb2_trim_config()
165 	reg &= ~USB2_TRIM_MASK;  in usb2_trim_config()
168 		reg |= usb2_trim_val(trim_val);  in usb2_trim_config()
170 		reg |= usb2_trim_val(USB2_TRIM_DEFAULT_VAL);  in usb2_trim_config()
172 	writel(reg, USB2_PHY_BASE_REG + USB2_TRIM_OFFSET);  in usb2_trim_config()
178 	unsigned int reg;  in usb2_svb_config()  local
181 	reg = readl(USB2_PHY_BASE_REG + USB_SVB_OFFSET);  in usb2_svb_config()
182 	reg &= ~USB_SVB_MASK;  in usb2_svb_config()
185 		reg |= USB_SVB_PREDEV_5_PHY_VAL;  in usb2_svb_config()
187 		reg |= USB_SVB_PREDEV_4_PHY_VAL;  in usb2_svb_config()
189 		reg |= USB_SVB_PREDEV_3_PHY_VAL;  in usb2_svb_config()
191 		reg |= USB_SVB_PREDEV_2_PHY_VAL;  in usb2_svb_config()
193 		reg |= USB_SVB_PREDEV_4_PHY_VAL;  in usb2_svb_config()
195 	writel(reg, USB2_PHY_BASE_REG + USB_SVB_OFFSET);  in usb2_svb_config()
200 	unsigned int reg;  in phy_hiusb_init_crg_clk()  local
203 	reg = USB2_CRG_DEFAULT_VAL;  in phy_hiusb_init_crg_clk()
204 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
208 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
209 	reg |= USB2_UTMI_CKEN;  in phy_hiusb_init_crg_clk()
210 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
213 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
214 	reg |= USB2_PHY_APB_CKEN;  in phy_hiusb_init_crg_clk()
215 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
218 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
219 	reg |= USB2_REF_CKEN;  in phy_hiusb_init_crg_clk()
220 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
223 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
224 	reg |= USB2_BUS_CKEN;  in phy_hiusb_init_crg_clk()
225 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
228 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
229 	reg |= USB2_PHY_PLL_CKEN;  in phy_hiusb_init_crg_clk()
230 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
233 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
234 	reg |= USB2_PHY_XTAL_CKEN;  in phy_hiusb_init_crg_clk()
235 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
238 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
239 	reg |= USB2_FREECLK_CKSEL;  in phy_hiusb_init_crg_clk()
240 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init_crg_clk()
247 	unsigned int reg;  in phy_hiusb_init()  local
250 	reg = USB_VBUS_IO_CONFIG_VAL;  in phy_hiusb_init()
251 	writel(reg, USB_VBUS_IO_CONFIG_REG);  in phy_hiusb_init()
253 	reg = USB_PWREN_CONFIG_VAL;  in phy_hiusb_init()
254 	writel(reg, USB_PWREN_CONFIG_REG);  in phy_hiusb_init()
260 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init()
261 	reg &= ~USB2_PHY_APB_RST;  in phy_hiusb_init()
262 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init()
267 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init()
268 	reg &= ~USB2_PHY_REQ;  in phy_hiusb_init()
269 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init()
271 	reg = readl(USB2_PHY_BASE_REG + PHY_PLL_OFFSET);  in phy_hiusb_init()
272 	reg &= ~RG_PLL_EN_MASK;  in phy_hiusb_init()
273 	reg |= RG_PLL_EN_VAL;  in phy_hiusb_init()
274 	writel(reg, USB2_PHY_BASE_REG + PHY_PLL_OFFSET);  in phy_hiusb_init()
279 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init()
280 	reg &= ~USB2_PHY_PORT_TREQ;  in phy_hiusb_init()
281 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init()
285 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init()
286 	reg &= ~USB2_VCC_SRST_REQ;  in phy_hiusb_init()
287 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in phy_hiusb_init()
290 	reg = readl(USB3_CTRL_REG_BASE + REG_GUSB3PIPECTL0);  in phy_hiusb_init()
291 	reg |= PCS_SSP_SOFT_RESET;  in phy_hiusb_init()
292 	writel(reg, USB3_CTRL_REG_BASE + REG_GUSB3PIPECTL0);  in phy_hiusb_init()
295 	reg = readl(USB3_CTRL_REG_BASE + REG_GCTL);  in phy_hiusb_init()
296 	reg &= ~PORT_CAP_DIR;  in phy_hiusb_init()
297 	reg |= PORT_SET_HOST; /* [13:12] 01: Host; 10: Device; 11: OTG */  in phy_hiusb_init()
298 	writel(reg, USB3_CTRL_REG_BASE + REG_GCTL);  in phy_hiusb_init()
301 	reg = readl(USB3_CTRL_REG_BASE + REG_GUSB3PIPECTL0);  in phy_hiusb_init()
302 	reg &= ~PCS_SSP_SOFT_RESET;  in phy_hiusb_init()
303 	reg &= ~PORT_DISABLE_SUSPEND; /* disable suspend */  in phy_hiusb_init()
304 	writel(reg, USB3_CTRL_REG_BASE + REG_GUSB3PIPECTL0);  in phy_hiusb_init()
324 	unsigned int reg;  in xhci_hcd_stop()  local
327 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in xhci_hcd_stop()
328 	reg |= USB2_PHY_REQ;  in xhci_hcd_stop()
329 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in xhci_hcd_stop()
334 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in xhci_hcd_stop()
335 	reg |= USB2_PHY_PORT_TREQ;  in xhci_hcd_stop()
336 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in xhci_hcd_stop()
340 	reg = readl(CRG_REG_BASE + USB2_CTRL);  in xhci_hcd_stop()
341 	reg |= USB2_VCC_SRST_REQ;  in xhci_hcd_stop()
342 	writel(reg, CRG_REG_BASE + USB2_CTRL);  in xhci_hcd_stop()