1 /* 2 * Copyright (c) 2021 Bestechnic (Shanghai) Co., Ltd. All rights reserved. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 #ifndef __HAL_IOMUX_BEST2003_H__ 16 #define __HAL_IOMUX_BEST2003_H__ 17 18 #ifdef __cplusplus 19 extern "C" { 20 #endif 21 22 #include "plat_types.h" 23 24 #ifndef ROM_BUILD 25 #define PMU_HAS_LED_PIN 26 #endif 27 28 enum HAL_IOMUX_PIN_T { 29 HAL_IOMUX_PIN_P0_0 = 0, 30 HAL_IOMUX_PIN_P0_1, 31 HAL_IOMUX_PIN_P0_2, 32 HAL_IOMUX_PIN_P0_3, 33 HAL_IOMUX_PIN_P0_4, 34 HAL_IOMUX_PIN_P0_5, 35 HAL_IOMUX_PIN_P0_6, 36 HAL_IOMUX_PIN_P0_7, 37 38 HAL_IOMUX_PIN_P1_0, 39 HAL_IOMUX_PIN_P1_1, 40 HAL_IOMUX_PIN_P1_2, 41 HAL_IOMUX_PIN_P1_3, 42 HAL_IOMUX_PIN_P1_4, 43 HAL_IOMUX_PIN_P1_5, 44 HAL_IOMUX_PIN_P1_6, 45 HAL_IOMUX_PIN_P1_7, 46 47 HAL_IOMUX_PIN_P2_0, 48 HAL_IOMUX_PIN_P2_1, 49 HAL_IOMUX_PIN_P2_2, 50 HAL_IOMUX_PIN_P2_3, 51 HAL_IOMUX_PIN_P2_4, 52 HAL_IOMUX_PIN_P2_5, 53 HAL_IOMUX_PIN_P2_6, 54 HAL_IOMUX_PIN_P2_7, 55 56 HAL_IOMUX_PIN_P3_0, 57 HAL_IOMUX_PIN_P3_1, 58 HAL_IOMUX_PIN_P3_2, 59 HAL_IOMUX_PIN_P3_3, 60 HAL_IOMUX_PIN_P3_4, 61 HAL_IOMUX_PIN_P3_5, 62 HAL_IOMUX_PIN_P3_6, 63 HAL_IOMUX_PIN_P3_7, 64 65 HAL_IOMUX_PIN_NUM, 66 67 HAL_IOMUX_PIN_LED1 = HAL_IOMUX_PIN_NUM, 68 HAL_IOMUX_PIN_LED2, 69 70 HAL_IOMUX_PIN_LED_NUM, 71 }; 72 73 enum HAL_GPIO_PIN_T { 74 HAL_GPIO_PIN_P0_0 = HAL_IOMUX_PIN_P0_0, 75 HAL_GPIO_PIN_P0_1 = HAL_IOMUX_PIN_P0_1, 76 HAL_GPIO_PIN_P0_2 = HAL_IOMUX_PIN_P0_2, 77 HAL_GPIO_PIN_P0_3 = HAL_IOMUX_PIN_P0_3, 78 HAL_GPIO_PIN_P0_4 = HAL_IOMUX_PIN_P0_4, 79 HAL_GPIO_PIN_P0_5 = HAL_IOMUX_PIN_P0_5, 80 HAL_GPIO_PIN_P0_6 = HAL_IOMUX_PIN_P0_6, 81 HAL_GPIO_PIN_P0_7 = HAL_IOMUX_PIN_P0_7, 82 83 HAL_GPIO_PIN_P1_0 = HAL_IOMUX_PIN_P1_0, 84 HAL_GPIO_PIN_P1_1 = HAL_IOMUX_PIN_P1_1, 85 HAL_GPIO_PIN_P1_2 = HAL_IOMUX_PIN_P1_2, 86 HAL_GPIO_PIN_P1_3 = HAL_IOMUX_PIN_P1_3, 87 HAL_GPIO_PIN_P1_4 = HAL_IOMUX_PIN_P1_4, 88 HAL_GPIO_PIN_P1_5 = HAL_IOMUX_PIN_P1_5, 89 HAL_GPIO_PIN_P1_6 = HAL_IOMUX_PIN_P1_6, 90 HAL_GPIO_PIN_P1_7 = HAL_IOMUX_PIN_P1_7, 91 92 HAL_GPIO_PIN_P2_0 = HAL_IOMUX_PIN_P2_0, 93 HAL_GPIO_PIN_P2_1 = HAL_IOMUX_PIN_P2_1, 94 HAL_GPIO_PIN_P2_2 = HAL_IOMUX_PIN_P2_2, 95 HAL_GPIO_PIN_P2_3 = HAL_IOMUX_PIN_P2_3, 96 HAL_GPIO_PIN_P2_4 = HAL_IOMUX_PIN_P2_4, 97 HAL_GPIO_PIN_P2_5 = HAL_IOMUX_PIN_P2_5, 98 HAL_GPIO_PIN_P2_6 = HAL_IOMUX_PIN_P2_6, 99 HAL_GPIO_PIN_P2_7 = HAL_IOMUX_PIN_P2_7, 100 101 HAL_GPIO_PIN_P3_0 = HAL_IOMUX_PIN_P3_0, 102 HAL_GPIO_PIN_P3_1 = HAL_IOMUX_PIN_P3_1, 103 HAL_GPIO_PIN_P3_2 = HAL_IOMUX_PIN_P3_2, 104 HAL_GPIO_PIN_P3_3 = HAL_IOMUX_PIN_P3_3, 105 HAL_GPIO_PIN_P3_4 = HAL_IOMUX_PIN_P3_4, 106 HAL_GPIO_PIN_P3_5 = HAL_IOMUX_PIN_P3_5, 107 HAL_GPIO_PIN_P3_6 = HAL_IOMUX_PIN_P3_6, 108 HAL_GPIO_PIN_P3_7 = HAL_IOMUX_PIN_P3_7, 109 110 HAL_GPIO_PIN_NUM = HAL_IOMUX_PIN_NUM, 111 112 HAL_GPIO_PIN_LED1 = HAL_IOMUX_PIN_LED1, 113 HAL_GPIO_PIN_LED2 = HAL_IOMUX_PIN_LED2, 114 115 HAL_GPIO_PIN_LED_NUM = HAL_IOMUX_PIN_LED_NUM, 116 }; 117 118 enum HAL_IOMUX_FUNCTION_T { 119 HAL_IOMUX_FUNC_NONE = 0, 120 HAL_IOMUX_FUNC_GPIO, 121 HAL_IOMUX_FUNC_AS_GPIO = HAL_IOMUX_FUNC_GPIO, 122 HAL_IOMUX_FUNC_BT_UART_CTS, 123 HAL_IOMUX_FUNC_BT_UART_RTS, 124 HAL_IOMUX_FUNC_BT_UART_RX, 125 HAL_IOMUX_FUNC_BT_UART_TX, 126 HAL_IOMUX_FUNC_CLK_32K_IN, 127 HAL_IOMUX_FUNC_CLK_REQ_IN, 128 HAL_IOMUX_FUNC_CLK_REQ_OUT, 129 HAL_IOMUX_FUNC_CLK_OUT, 130 HAL_IOMUX_FUNC_I2C_M0_SCL, 131 HAL_IOMUX_FUNC_I2C_M0_SDA, 132 HAL_IOMUX_FUNC_I2C_M1_SCL, 133 HAL_IOMUX_FUNC_I2C_M2_SCL, 134 HAL_IOMUX_FUNC_I2C_M2_SDA, 135 HAL_IOMUX_FUNC_I2C_M1_SDA, 136 HAL_IOMUX_FUNC_I2S_MCLK, 137 HAL_IOMUX_FUNC_I2S0_SCK, 138 HAL_IOMUX_FUNC_I2S0_SDI0, 139 HAL_IOMUX_FUNC_I2S0_SDI1, 140 HAL_IOMUX_FUNC_I2S0_SDI2, 141 HAL_IOMUX_FUNC_I2S0_SDI3, 142 HAL_IOMUX_FUNC_I2S0_SDO0, 143 HAL_IOMUX_FUNC_I2S0_SDO1, 144 HAL_IOMUX_FUNC_I2S0_SDO2, 145 HAL_IOMUX_FUNC_I2S0_SDO3, 146 HAL_IOMUX_FUNC_I2S0_WS, 147 HAL_IOMUX_FUNC_I2S1_SCK, 148 HAL_IOMUX_FUNC_I2S1_SDI0, 149 HAL_IOMUX_FUNC_I2S1_SDI1, 150 HAL_IOMUX_FUNC_I2S1_SDI2, 151 HAL_IOMUX_FUNC_I2S1_SDI3, 152 HAL_IOMUX_FUNC_I2S1_SDO0, 153 HAL_IOMUX_FUNC_I2S1_SDO1, 154 HAL_IOMUX_FUNC_I2S1_SDO2, 155 HAL_IOMUX_FUNC_I2S1_SDO3, 156 HAL_IOMUX_FUNC_I2S1_WS, 157 HAL_IOMUX_FUNC_PCM_CLK, 158 HAL_IOMUX_FUNC_PCM_DI, 159 HAL_IOMUX_FUNC_PCM_DO, 160 HAL_IOMUX_FUNC_PCM_FSYNC, 161 HAL_IOMUX_FUNC_PDM0_CK, 162 HAL_IOMUX_FUNC_PDM0_D, 163 HAL_IOMUX_FUNC_PDM1_CK, 164 HAL_IOMUX_FUNC_PDM1_D, 165 HAL_IOMUX_FUNC_PDM2_CK, 166 HAL_IOMUX_FUNC_PDM2_D, 167 HAL_IOMUX_FUNC_PWM0, 168 HAL_IOMUX_FUNC_PWM1, 169 HAL_IOMUX_FUNC_PWM2, 170 HAL_IOMUX_FUNC_PWM3, 171 HAL_IOMUX_FUNC_PWM4, 172 HAL_IOMUX_FUNC_PWM5, 173 HAL_IOMUX_FUNC_PWM6, 174 HAL_IOMUX_FUNC_PWM7, 175 HAL_IOMUX_FUNC_SDMMC_CLK, 176 HAL_IOMUX_FUNC_SDMMC_CMD, 177 HAL_IOMUX_FUNC_SDMMC_DATA0, 178 HAL_IOMUX_FUNC_SDMMC_DATA1, 179 HAL_IOMUX_FUNC_SDMMC_DATA2, 180 HAL_IOMUX_FUNC_SDMMC_DATA3, 181 HAL_IOMUX_FUNC_SDMMC_DATA4, 182 HAL_IOMUX_FUNC_SDMMC_DATA5, 183 HAL_IOMUX_FUNC_SDMMC_DATA6, 184 HAL_IOMUX_FUNC_SDMMC_DATA7, 185 HAL_IOMUX_FUNC_SPDIF0_DI, 186 HAL_IOMUX_FUNC_SPDIF0_DO, 187 HAL_IOMUX_FUNC_SPI_CLK,//spi0 188 HAL_IOMUX_FUNC_SPI_CS0, 189 HAL_IOMUX_FUNC_SPI_CS1, 190 HAL_IOMUX_FUNC_SPI_CS2, 191 HAL_IOMUX_FUNC_SPI_CS3, 192 HAL_IOMUX_FUNC_SPI_DCN, 193 HAL_IOMUX_FUNC_SPI_DI0, 194 HAL_IOMUX_FUNC_SPI_DI1, 195 HAL_IOMUX_FUNC_SPI_DI2, 196 HAL_IOMUX_FUNC_SPI_DI3, 197 HAL_IOMUX_FUNC_SPI_DIO, 198 HAL_IOMUX_FUNC_SPILCD_CLK,//spi1 199 HAL_IOMUX_FUNC_SPILCD_CS0, 200 HAL_IOMUX_FUNC_SPILCD_CS1, 201 HAL_IOMUX_FUNC_SPILCD_CS2, 202 HAL_IOMUX_FUNC_SPILCD_CS3, 203 HAL_IOMUX_FUNC_SPILCD_DCN, 204 HAL_IOMUX_FUNC_SPILCD_DI0, 205 HAL_IOMUX_FUNC_SPILCD_DI1, 206 HAL_IOMUX_FUNC_SPILCD_DI2, 207 HAL_IOMUX_FUNC_SPILCD_DI3, 208 HAL_IOMUX_FUNC_SPILCD_DIO, 209 HAL_IOMUX_FUNC_UART0_RX, 210 HAL_IOMUX_FUNC_UART0_TX, 211 HAL_IOMUX_FUNC_UART1_CTS, 212 HAL_IOMUX_FUNC_UART1_RTS, 213 HAL_IOMUX_FUNC_UART1_RX, 214 HAL_IOMUX_FUNC_UART1_TX, 215 HAL_IOMUX_FUNC_UART2_RX, 216 HAL_IOMUX_FUNC_UART2_TX, 217 HAL_IOMUX_FUNC_UART2_CTS, 218 HAL_IOMUX_FUNC_UART2_RTS, 219 HAL_IOMUX_FUNC_UART3_RX, 220 HAL_IOMUX_FUNC_UART3_TX, 221 HAL_IOMUX_FUNC_UART3_CTS, 222 HAL_IOMUX_FUNC_UART3_RTS, 223 HAL_IOMUX_FUNC_WF_UART_CTS, 224 HAL_IOMUX_FUNC_WF_UART_RTS, 225 HAL_IOMUX_FUNC_WF_UART_RX, 226 HAL_IOMUX_FUNC_WF_UART_TX, 227 HAL_IOMUX_FUNC_WF_FEM_CNTL0,//no ctrl1 228 HAL_IOMUX_FUNC_WF_FEM_CNTL2, 229 HAL_IOMUX_FUNC_WF_FEM_CNTL3, 230 HAL_IOMUX_FUNC_WF_FEM_CNTL4, 231 HAL_IOMUX_FUNC_WF_FEM_CNTL5, 232 HAL_IOMUX_FUNC_WF_FEM_CNTL6, 233 HAL_IOMUX_FUNC_WF_FEM_CNTL7, 234 HAL_IOMUX_FUNC_WF_FEM_CNTL8, 235 HAL_IOMUX_FUNC_WF_FEM_CNTL9, 236 HAL_IOMUX_FUNC_WF_SDIO_CLK, 237 HAL_IOMUX_FUNC_WF_SDIO_CMD, 238 HAL_IOMUX_FUNC_WF_SDIO_DATA0, 239 HAL_IOMUX_FUNC_WF_SDIO_DATA1, 240 HAL_IOMUX_FUNC_WF_SDIO_DATA2, 241 HAL_IOMUX_FUNC_WF_SDIO_DATA3, 242 HAL_IOMUX_FUNC_WF_WAKE_HOST, 243 HAL_IOMUX_FUNC_WF_TXON, 244 HAL_IOMUX_FUNC_DISPLAY_TE, 245 HAL_IOMUX_FUNC_DISPLAY_BL_PWM, 246 HAL_IOMUX_FUNC_DISPLAY_BL_EN, 247 HAL_IOMUX_FUNC_DISPLAY_SPI_CLK, 248 HAL_IOMUX_FUNC_DISPLAY_SPI_CS, 249 HAL_IOMUX_FUNC_DISPLAY_SPI_DIO, 250 HAL_IOMUX_FUNC_DISPLAY_SPI_DO1_DCN, 251 HAL_IOMUX_FUNC_DISPLAY_SPI_DO2, 252 HAL_IOMUX_FUNC_DISPLAY_SPI_DO3, 253 HAL_IOMUX_FUNC_DISPLAY_SPI_DI, 254 HAL_IOMUX_FUNC_IR_RX, 255 HAL_IOMUX_FUNC_IR_TX, 256 HAL_IOMUX_FUNC_END 257 }; 258 259 enum HAL_IOMUX_ISPI_ACCESS_T { 260 HAL_IOMUX_ISPI_BT_RF = (1 << 0), 261 HAL_IOMUX_ISPI_BT_PMU = (1 << 1), 262 HAL_IOMUX_ISPI_BT_ANA = (1 << 2), 263 HAL_IOMUX_ISPI_MCU_RF = (1 << 3), 264 HAL_IOMUX_ISPI_MCU_PMU = (1 << 4), 265 HAL_IOMUX_ISPI_MCU_ANA = (1 << 5), 266 }; 267 268 void hal_iomux_set_i2s_mclk(void); 269 270 void hal_iomux_set_i2s1(void); 271 272 void hal_iomux_set_mcu_clock_out(void); 273 274 void hal_iomux_set_bt_clock_out(void); 275 276 uint32_t hal_iomux_set_io_drv(enum HAL_IOMUX_PIN_T pin, uint32_t val); 277 278 void hal_iomux_set_dsi_te(void); 279 280 void hal_iomux_set_wf_fem(int rf_switch); 281 282 #ifdef __cplusplus 283 } 284 #endif 285 286 #endif 287