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Searched defs:Order (Results 1 – 25 of 57) sorted by relevance

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/third_party/icu/icu4c/source/test/intltest/
Dtscoll.h28 struct Order struct
53 Order *getOrders(CollationElementIterator &iter, int32_t &orderLength); argument
Dssearch.cpp334 struct Order struct
350 const Order *get(int32_t index) const; argument
/third_party/node/deps/npm/docs/content/using-npm/
Dscripts.md81 #### [`npm publish`](/cli-commands/npm-publish)
89 #### [`npm pack`](/cli-commands/npm-pack)
94 #### [`npm install`](/cli-commands/npm-install)
105 #### [`npm start`](/cli-commands/npm-start)
/third_party/typescript/tests/cases/conformance/salsa/
DenumMergeWithExpando.ts7 export enum Order { ASC, DESC } enum
/third_party/boost/libs/math/example/
Dautodiff_fourth_power.cpp19 constexpr unsigned Order = 5; // Highest order derivative to be calculated. in main() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSDNodeDbgValue.h51 unsigned Order; variable
77 bool IsIndirect, DebugLoc DL, unsigned Order, in SDDbgValue()
147 unsigned Order; variable
DScheduleDAGSDNodes.cpp734 DenseMap<SDValue, unsigned> &VRBaseMap, unsigned Order) { in ProcessSDDbgValues()
764 unsigned Order = N->getIROrder(); in ProcessSourceNode() local
951 unsigned Order = Orders[i].first; in EmitSchedule() local
997 unsigned Order = InstrOrder.first; in EmitSchedule() local
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceIntrinsics.cpp32 bool Intrinsics::isMemoryOrderValid(IntrinsicID ID, uint64_t Order, in isMemoryOrderValid()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DRegAllocGreedy.cpp763 AllocationOrder &Order, in tryAssign()
810 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix); in canReassign() local
1022 unsigned RAGreedy::getCheapestEvicteeWeight(const AllocationOrder &Order, in getCheapestEvicteeWeight()
1107 AllocationOrder &Order, in tryEvict()
1486 const AllocationOrder &Order) { in splitCanCauseEvictionChain()
1546 const AllocationOrder &Order) { in splitCanCauseLocalSpill()
1584 const AllocationOrder &Order, in calcGlobalSplitCost()
1829 unsigned RAGreedy::tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order, in tryRegionSplit()
1873 AllocationOrder &Order, in calculateRegionSplitCost()
2019 unsigned RAGreedy::tryBlockSplit(LiveInterval &VirtReg, AllocationOrder &Order, in tryBlockSplit()
[all …]
DAllocationOrder.h31 ArrayRef<MCPhysReg> Order; variable
DLocalStackSlotAllocation.cpp59 unsigned Order; member in __anonae8cfb4c0111::FrameRef
302 unsigned Order = 0; in insertFrameReferenceRegisters() local
DBreakFalseDeps.cpp144 ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(OpRC); in pickBestRegisterForUndef() local
DRegAllocBasic.cpp262 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix); in selectOrSplit() local
DTargetRegisterInfo.cpp212 ArrayRef<MCPhysReg> Order = RC->getRawAllocationOrder(MF); in getAllocatableSetForRC() local
384 ArrayRef<MCPhysReg> Order, in getRegAllocationHints()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/
DDynamicLibrary.cpp76 void *LibLookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in LibLookup()
91 void *Lookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in Lookup()
/third_party/boost/boost/numeric/ublas/opencl/
Dprod.hpp54 …clblasOrder Order = std::is_same<L1, ublas::basic_row_major<> >::value ? clblasRowMajor : clblasCo… in prod() local
129 …clblasOrder Order = std::is_same<L, ublas::basic_row_major<> >::value ? clblasRowMajor : clblasCol… in prod() local
203 …clblasOrder Order = std::is_same<L, ublas::basic_row_major<> >::value ? clblasRowMajor : clblasCol… in prod() local
298 …clblasOrder Order = std::is_same<L, ublas::basic_row_major<> >::value ? clblasRowMajor : clblasCol… in outer_prod() local
/third_party/python/Doc/library/
Dstruct.rst181 .. _format-characters:
/third_party/boost/tools/build/src/util/
Dorder.py6 class Order: class
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.h1543 X86StoreSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl, in X86StoreSDNode()
1561 X86MaskedStoreSDNode(unsigned Opcode, unsigned Order, in X86MaskedStoreSDNode()
1579 TruncSStoreSDNode(unsigned Order, const DebugLoc &dl, in TruncSStoreSDNode()
1591 TruncUSStoreSDNode(unsigned Order, const DebugLoc &dl, in TruncUSStoreSDNode()
1603 MaskedTruncSStoreSDNode(unsigned Order, in MaskedTruncSStoreSDNode()
1616 MaskedTruncUSStoreSDNode(unsigned Order, in MaskedTruncUSStoreSDNode()
1631 X86MaskedGatherScatterSDNode(unsigned Opc, unsigned Order, in X86MaskedGatherScatterSDNode()
1649 X86MaskedGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, in X86MaskedGatherSDNode()
1663 X86MaskedScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, in X86MaskedScatterSDNode()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DRegisterClassInfo.h37 std::unique_ptr<MCPhysReg[]> Order; member
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZRegisterInfo.cpp59 static void addHints(ArrayRef<MCPhysReg> Order, in addHints()
78 ArrayRef<MCPhysReg> Order, in getRegAllocationHints()
/third_party/flutter/skia/tests/
DGrTRecorderTest.cpp161 class Order { class
163 Order() { this->reset(); } in Order() function in Order
/third_party/boost/boost/endian/
Dbuffers.hpp184 const endian_buffer<Order, T, n_bits, A>& x) in operator <<()
194 endian_buffer<Order, T, n_bits, A>& x) in operator >>()
/third_party/python/Doc/whatsnew/
D3.6.rst564 .. _whatsnew36-pep468:
578 .. _whatsnew36-compactdict:
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DInstructions.h228 AtomicOrdering Order, SyncScope::ID SSID, BasicBlock *InsertAtEnd) in LoadInst()

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