1 #ifndef __USB3_DRIVER_H__ 2 #define __USB3_DRIVER_H__ 3 4 #include "sys.h" 5 #include "usb3.h" 6 #include "usb3_hw.h" 7 #include "debug.h" 8 9 /* time limit of waiting for key enents */ 10 #define USB_WAIT_FOR_ENUM_DONE_TIME_MS (300 * 1000) 11 #define USB_WAIT_FOR_RX_NEXT_TIME_MS (60 * 1000) 12 13 enum usb_error_type { 14 USB_RX_NEXT_TIMEOUT = -5, 15 USB_ENUM_DONE_TIMEOUT = -3, 16 USB_PROCESS_ERR = -1, 17 USB_NO_ERR = 0, 18 }; 19 20 struct usb_data_handle { 21 UINT32 uFileType; 22 UINT32 uFileAddress; 23 UINT32 uFileLength; 24 25 UINT32 IsRxStart; 26 27 UINT32 InitTimeStamp; 28 UINT32 RxTimeStamp; 29 }; 30 31 #define USB_DEBUG 32 33 #ifdef USB_DEBUG 34 #define dbg(format, arg...) \ 35 do { \ 36 debug_printf("[%s]", __func__); \ 37 debug_printf(format, ##arg); \ 38 } while(0); 39 #else 40 #define dbg(format, arg...) 41 #endif 42 43 #define usb_info(format, arg...) debug_printf("[USBINFO]"format, ##arg); 44 #define usb_err(format, arg...) debug_printf("[USBERR]"format, ##arg); 45 46 typedef enum pcd_state { 47 USB3_STATE_UNCONNECTED, /* no host */ 48 USB3_STATE_DEFAULT, 49 USB3_STATE_ADDRESSED, 50 USB3_STATE_CONFIGURED, 51 } pcdstate_e; 52 53 typedef enum ep0_state { 54 EP0_IDLE, 55 EP0_IN_DATA_PHASE, 56 EP0_OUT_DATA_PHASE, 57 EP0_IN_WAIT_NRDY, 58 EP0_OUT_WAIT_NRDY, 59 EP0_IN_STATUS_PHASE, 60 EP0_OUT_STATUS_PHASE, 61 EP0_STALL, 62 } ep0state_e; 63 64 typedef union usb_setup_pkt { 65 usb_device_request_t req; 66 uint32_t d32[2]; 67 uint8_t d8[8]; 68 } usb_setup_pkt_t; 69 70 typedef struct usb3_pcd_req { 71 usb3_dma_desc_t *trb; 72 phys_addr_t trbdma; 73 74 uint32_t length; 75 uint32_t actual; 76 77 // void *bufdma; 78 uint8_t *bufdma; 79 void (*complete)(void *); 80 } usb3_pcd_req_t; 81 82 typedef struct usb3_pcd_ep { 83 struct usb3_pcd *pcd; 84 85 usb3_dev_ep_regs_t *out_ep_reg; 86 usb3_dev_ep_regs_t *in_ep_reg; 87 88 uint8_t phys; 89 uint8_t num; 90 uint8_t type; 91 uint8_t maxburst; 92 uint16_t maxpacket; 93 /* Tx FIFO # for IN EPs */ 94 uint8_t tx_fifo_num; 95 96 /* The Transfer Resource Index from the Start Transfer command */ 97 uint8_t tri_out; 98 uint8_t tri_in; 99 100 uint8_t stopped; 101 /* Send ZLP */ 102 uint8_t send_zlp; 103 /* True if 3-stage control transfer */ 104 uint8_t three_stage; 105 /* True if transfer has been started on EP */ 106 uint8_t xfer_started; 107 /* EP direction 0 = OUT */ 108 uint8_t is_in; 109 /* True if endpoint is active */ 110 uint8_t active; 111 /* Initial data pid of bulk endpoint */ 112 uint8_t data_pid_start; 113 114 /* ep_desc (excluding ep0) */ 115 usb3_dma_desc_t *ep_desc; 116 117 /* TRB descriptor must be aligned to 16 bytes */ 118 uint8_t epx_desc[32]; 119 120 /* request (excluding ep0) */ 121 usb3_pcd_req_t req; 122 } usb3_pcd_ep_t; 123 124 typedef struct usb3_pcd { 125 struct usb3_device *usb3_dev; 126 127 int32_t link_state; 128 pcdstate_e state; 129 uint8_t new_config; 130 ep0state_e ep0state; 131 132 uint32_t eps_enabled; 133 uint32_t ltm_enable; 134 135 usb3_pcd_ep_t ep0; 136 usb3_pcd_ep_t out_ep; 137 usb3_pcd_ep_t in_ep; 138 139 usb3_dev_global_regs_t *dev_global_regs; 140 usb3_dev_ep_regs_t *out_ep_regs; 141 usb3_dev_ep_regs_t *in_ep_regs; 142 143 usb3_pcd_req_t ep0_req; 144 145 uint8_t speed; 146 147 usb3_dma_desc_t *ep0_setup_desc; 148 usb3_dma_desc_t *ep0_in_desc; 149 usb3_dma_desc_t *ep0_out_desc; 150 151 /* TRB descriptor must be aligned to 16 bytes */ 152 uint8_t ep0_setup[32]; 153 uint8_t ep0_in[32]; 154 uint8_t ep0_out[32]; 155 156 usb_setup_pkt_t ep0_setup_pkt[5]; 157 158 #define USB3_STATUS_BUF_SIZE 512 159 uint8_t ep0_status_buf[USB3_STATUS_BUF_SIZE]; 160 161 #define USB3_BULK_BUF_SIZE 512 162 uint8_t ss_bulk_buf[USB3_BULK_BUF_SIZE]; 163 164 uint32_t file_type; 165 uint32_t file_address; 166 uint32_t file_capacity; 167 uint32_t file_total_frame; 168 uint32_t file_curr_frame; 169 uint32_t file_next_frame; 170 uint32_t file_received; 171 uint32_t file_complete; 172 } usb3_pcd_t; 173 174 #define usb3_pcd_ep_to_pcd(pcd_ep) ((pcd_ep)->usb3_pcd_ep_t.pcd) 175 #define usb3_pcd_ep_num(pcd_ep) ((pcd_ep)->usb3_pcd_ep_t.num) 176 #define usb3_pcd_ep_type(pcd_ep) ((pcd_ep)->usb3_pcd_ep_t.type) 177 #define usb3_pcd_ep_is_in(pcd_ep) ((pcd_ep)->usb3_pcd_ep_t.is_in) 178 179 #define dwc_usb3_is_hwo(desc) ((desc)->control & USB3_DSCCTL_HWO_BIT) 180 #define dwc_usb3_is_ioc(desc) ((desc)->control & USB3_DSCCTL_IOC_BIT) 181 182 #define usb3_get_xfercnt(desc) \ 183 (((desc)->status >> USB3_DSCSTS_XFRCNT_SHIFT) & \ 184 (USB3_DSCSTS_XFRCNT_BITS >> USB3_DSCSTS_XFRCNT_SHIFT)) 185 #define usb3_get_xfersts(desc) \ 186 (((desc)->status >> USB3_DSCSTS_TRBRSP_SHIFT) & \ 187 (USB3_DSCSTS_TRBRSP_BITS >> USB3_DSCSTS_TRBRSP_SHIFT)) 188 189 #define map_to_dma_addr(addr) \ 190 ((addr)) 191 // ((addr) + (REG_BASE_LP_RAM_ACORE - REG_BASE_LP_RAM)) 192 193 typedef struct usb3_device { 194 volatile uint8_t *base; 195 void *dev_desc; 196 uint8_t string_manu[32]; 197 uint8_t string_prod[32]; 198 uint32_t string_manu_len; 199 uint32_t string_prod_len; 200 usb3_pcd_t pcd; 201 uint32_t snpsid; 202 usb3_core_global_regs_t *core_global_regs; 203 204 #define USB3_EVENT_BUF_SIZE 256 205 uint32_t event_buf[USB3_EVENT_BUF_SIZE]; 206 uint32_t *event_ptr; 207 struct usb_data_handle *p_handle; 208 } usb3_device_t; 209 210 void usb3_memset(void *buf, uint8_t value, uint32_t size); 211 void usb3_memcpy(void *dst, void *src, uint32_t size); 212 uint32_t usb3_rd32(volatile uint32_t *addr); 213 void usb3_wr32(volatile uint32_t *addr, uint32_t val); 214 void usb3_set_address(usb3_pcd_t *pcd, uint32_t addr); 215 void usb3_accept_u1(usb3_pcd_t *pcd); 216 void usb3_accept_u2(usb3_pcd_t *pcd); 217 void usb3_enable_u1(usb3_pcd_t *pcd); 218 void usb3_enable_u2(usb3_pcd_t *pcd); 219 void usb3_disable_u1(usb3_pcd_t *pcd); 220 void usb3_disable_u2(usb3_pcd_t *pcd); 221 uint32_t usb3_u1_enabled(usb3_pcd_t *pcd); 222 uint32_t usb3_u2_enabled(usb3_pcd_t *pcd); 223 void usb3_dep_cstall(usb3_pcd_t *pcd, 224 usb3_dev_ep_regs_t *ep_reg); 225 void usb3_dep_sstall(usb3_pcd_t *pcd, 226 usb3_dev_ep_regs_t *ep_reg); 227 uint32_t handshake(usb3_device_t *dev, volatile uint32_t *ptr, 228 uint32_t mask, uint32_t done); 229 void usb3_fill_desc(usb3_dma_desc_t *desc, phys_addr_t dma_addr, 230 uint32_t dma_len, uint32_t stream, uint32_t type, 231 uint32_t ctrlbits, int own); 232 void usb3_dep_startnewcfg(usb3_pcd_t *pcd, 233 usb3_dev_ep_regs_t *ep_reg, uint32_t rsrcidx); 234 void usb3_dep_cfg(usb3_pcd_t *pcd, usb3_dev_ep_regs_t *ep_reg, 235 uint32_t depcfg0, uint32_t depcfg1, uint32_t depcfg2); 236 void usb3_dep_xfercfg(usb3_pcd_t *pcd, 237 usb3_dev_ep_regs_t *ep_reg, uint32_t depstrmcfg); 238 uint8_t usb3_dep_startxfer(usb3_pcd_t *pcd, usb3_dev_ep_regs_t *ep_reg, 239 phys_addr_t dma_addr, uint32_t stream_or_uf); 240 void usb3_dep_updatexfer(usb3_pcd_t *pcd, 241 usb3_dev_ep_regs_t *ep_reg, 242 uint32_t tri); 243 void usb3_ep_activate(usb3_pcd_t *pcd, usb3_pcd_ep_t *ep); 244 void usb3_ep0_out_start(usb3_pcd_t *pcd); 245 void usb3_ep0_start_transfer(usb3_pcd_t *pcd, usb3_pcd_req_t *req); 246 void usb3_resume_usb2_phy(usb3_pcd_t *pcd); 247 //int usb_connected = 0; 248 249 #endif /* __USB3_DRIVER_H */ 250 251