1 /* 2 * Copyright (c) 2021 Bestechnic (Shanghai) Co., Ltd. All rights reserved. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 #ifndef __LINK_SYM_ARMCLANG_H__ 16 #define __LINK_SYM_ARMCLANG_H__ 17 18 #ifdef __ARMCC_VERSION 19 20 #ifdef __cplusplus 21 extern "C" { 22 #endif 23 24 #include "plat_addr_map.h" 25 26 #if defined(ROM_BUILD) && !defined(ROM_IN_FLASH) 27 28 #define __rom_got_info_start Image$$rom_got_info$$Base 29 #define __audio_const_rom_start Image$$rom_audio_const$$Base 30 #define __audio_const_rom_end Image$$rom_audio_const$$Limit 31 #define __audio_const_rom_size Image$$rom_audio_const$$Length 32 #define __rom_text0_end Load$$rom_ramx$$Base 33 #define __rom_ramx_start Image$$rom_ramx$$Base 34 #define __rom_ramx_end Image$$rom_ramx$$Limit 35 #define __rom_etext Load$$rom_data$$Base 36 #define __rom_data_start__ Image$$rom_data$$Base 37 #define __rom_data_end__ Image$$rom_data$$Limit 38 #define __rom_bss_start__ Image$$rom_bss$$Base 39 #define __rom_bss_end__ Image$$rom_bss$$ZI$$Limit 40 #define __rom_HeapBase Image$$ARM_LIB_HEAP$$Base 41 #define __rom_HeapLimit Image$$ARM_LIB_HEAP$$ZI$$Limit 42 #define __rom_StackTop Image$$ARM_LIB_STACK$$ZI$$Limit 43 #define __rom_stack __rom_StackTop 44 #define __rom_StackLimit Image$$ARM_LIB_STACK$$Base 45 #define __cp_ramx_last_dummy_start Image$$cp_ramx_last_dummy$$Base 46 #define __cp_ram_last_dummy_start Image$$cp_ram_last_dummy$$Base 47 #define __cp_stack_limit Image$$cp_stack$$Base 48 #define __cp_stack_top Image$$cp_stack$$ZI$$Limit 49 #define __export_fn_rom Image$$rom_export_fn$$Base 50 51 #define __boot_sram_start_flash__ __rom_HeapLimit 52 #define __boot_sram_start__ __rom_HeapLimit 53 #define __boot_sram_end_flash__ __rom_HeapLimit 54 #define __boot_bss_sram_start__ __rom_HeapLimit 55 #define __boot_bss_sram_end__ __rom_HeapLimit 56 #define __fast_sram_text_data_start_flash__ __rom_HeapLimit 57 #define __fast_sram_text_data_start__ __rom_HeapLimit 58 #define __fast_sram_text_data_end__ __rom_HeapLimit 59 #define __fast_sram_text_data_end_flash__ __rom_HeapLimit 60 #define __sram_text_data_start_flash__ __rom_HeapLimit 61 #define __sram_text_data_start__ __rom_HeapLimit 62 #define __sram_text_data_end_flash__ __rom_HeapLimit 63 #define __sram_bss_start__ __rom_HeapLimit 64 #define __sram_bss_end__ __rom_HeapLimit 65 66 #ifndef NOSTD 67 #define __bss_start__ __rom_bss_start__ 68 #define __bss_end__ __rom_bss_end__ 69 #define __end__ __rom_HeapBase 70 /* 71 #define end __rom_HeapBase 72 */ 73 #define __StackTop __rom_StackTop 74 #define __stack __rom_StackTop 75 #endif 76 77 #elif defined(PROGRAMMER) 78 79 #define __exec_struct_start Image$$exec_struct$$Base 80 #define __got_info_start Image$$got_info$$Base 81 #define __cust_cmd_init_tbl_start Image$$cust_cmd_init_tbl$$Base 82 #define __cust_cmd_init_tbl_end Image$$cust_cmd_init_tbl$$Limit 83 #define __cust_cmd_hldr_tbl_start Image$$cust_cmd_hdlr_tbl$$Base 84 #define __cust_cmd_hldr_tbl_end Image$$cust_cmd_hdlr_tbl$$Limit 85 #define __etext Load$$data$$Base 86 #define __data_start__ Image$$data$$Base 87 #define __data_end__ Image$$data$$Limit 88 #define __bss_start__ Image$$bss$$Base 89 #define __bss_end__ Image$$bss$$ZI$$Limit 90 #define __HeapBase Image$$ARM_LIB_HEAP$$Base 91 #define __end__ __HeapBase 92 /* 93 #define end __HeapBase 94 */ 95 #define __HeapLimit Image$$ARM_LIB_HEAP$$ZI$$Limit 96 #define __StackTop Image$$ARM_LIB_STACK$$ZI$$Limit 97 #define __stack __StackTop 98 #define __StackLimit Image$$ARM_LIB_STACK$$Base 99 100 #define __boot_sram_start_flash__ __HeapLimit 101 #define __boot_sram_start__ __HeapLimit 102 #define __boot_sram_end_flash__ __HeapLimit 103 #define __boot_bss_sram_start__ __HeapLimit 104 #define __boot_bss_sram_end__ __HeapLimit 105 #define __fast_sram_text_data_start_flash__ __HeapLimit 106 #define __fast_sram_text_data_start__ __HeapLimit 107 #define __fast_sram_text_data_end__ __HeapLimit 108 #define __fast_sram_text_data_end_flash__ __HeapLimit 109 #define __sram_text_data_start_flash__ __HeapLimit 110 #define __sram_text_data_start__ __HeapLimit 111 #define __sram_text_data_end_flash__ __HeapLimit 112 #define __sram_bss_start__ __HeapLimit 113 #define __sram_bss_end__ __HeapLimit 114 #define __cp_stack_limit __HeapLimit 115 #define __cp_stack_top __HeapLimit 116 117 #else 118 119 #define __got_info_start Image$$got_info$$Base 120 121 #define Boot_Loader __main 122 #define __flash_start Image$$boot_struct$$Base 123 #define __userdata_pool_end__ Image$$userdata_pool$$Base 124 #define __boot_sram_start_flash__ Load$$boot_text_sram$$Base 125 #define __boot_sram_start__ Image$$boot_text_sram$$Base 126 #define __boot_sram_end_flash__ Load$$boot_data_sram$$Limit 127 /* 128 * CAUTION: 129 * If the section name of BSS variables has no ".bss." prefix, they will be considered as DATA, not BSS (ZI) ! 130 */ 131 #define __boot_bss_sram_start__ Image$$boot_bss_sram$$Base 132 #define __boot_bss_sram_end__ Image$$boot_bss_sram$$ZI$$Limit 133 #define __fast_sram_text_data_start_flash__ Load$$fast_text_sram$$Base 134 #define __fast_sram_text_data_start__ Image$$fast_text_sram$$Base 135 #define __fast_sram_text_data_end__ Image$$fast_text_sram$$Limit 136 #define __fast_sram_text_data_end_flash__ Load$$fast_text_sram$$Limit 137 138 #define __cp_text_sram_start_flash__ Load$$cp_text_sram$$Base 139 #define __cp_text_sram_exec_start__ Image$$cp_text_sram$$Base 140 #define __cp_text_sram_exec_end__ Image$$cp_text_sram$$Limit 141 #define __cp_text_sram_start Image$$cp_text_sram_start$$Base 142 #define __cp_text_sram_end Image$$cp_text_sram_start$$Limit 143 #define __cp_data_sram_start_flash__ Load$$cp_data_sram$$Base 144 #define __cp_data_sram_start Image$$cp_data_sram$$Base 145 #define __cp_data_sram_end Image$$cp_data_sram$$Limit 146 #define __cp_sram_end_flash__ Load$$cp_data_sram$$Limit 147 #define __cp_bss_sram_start Image$$cp_bss_sram$$Base 148 #define __cp_bss_sram_end Image$$cp_bss_sram$$ZI$$Limit 149 #define __cp_stack_limit Image$$cp_stack$$Base 150 #define __cp_stack_top Image$$cp_stack$$ZI$$Limit 151 152 #define __overlay_text_start__ Image$$overlay_start$$Base 153 #define __overlay_text_exec_start__ Image$$overlay_text0$$Base 154 155 #define __load_start_overlay_text0 Load$$overlay_text0$$Base 156 #define __load_stop_overlay_text0 Load$$overlay_text0$$Limit 157 #define __load_start_overlay_text1 Load$$overlay_text1$$Base 158 #define __load_stop_overlay_text1 Load$$overlay_text1$$Limit 159 #define __load_start_overlay_text2 Load$$overlay_text2$$Base 160 #define __load_stop_overlay_text2 Load$$overlay_text2$$Limit 161 #define __load_start_overlay_text3 Load$$overlay_text3$$Base 162 #define __load_stop_overlay_text3 Load$$overlay_text3$$Limit 163 #define __load_start_overlay_text4 Load$$overlay_text4$$Base 164 #define __load_stop_overlay_text4 Load$$overlay_text4$$Limit 165 #define __load_start_overlay_text5 Load$$overlay_text5$$Base 166 #define __load_stop_overlay_text5 Load$$overlay_text5$$Limit 167 #define __load_start_overlay_text6 Load$$overlay_text6$$Base 168 #define __load_stop_overlay_text6 Load$$overlay_text6$$Limit 169 #define __load_start_overlay_text7 Load$$overlay_text7$$Base 170 #define __load_stop_overlay_text7 Load$$overlay_text7$$Limit 171 172 #define __overlay_text_exec_end__ Image$$overlay_text_end$$Base 173 #define __overlay_data_start__ Image$$overlay_data0$$Base 174 175 #define __load_start_overlay_data0 Load$$overlay_data0$$Base 176 #define __load_stop_overlay_data0 Load$$overlay_data0$$Limit 177 #define __load_start_overlay_data1 Load$$overlay_data1$$Base 178 #define __load_stop_overlay_data1 Load$$overlay_data1$$Limit 179 #define __load_start_overlay_data2 Load$$overlay_data2$$Base 180 #define __load_stop_overlay_data2 Load$$overlay_data2$$Limit 181 #define __load_start_overlay_data3 Load$$overlay_data3$$Base 182 #define __load_stop_overlay_data3 Load$$overlay_data3$$Limit 183 #define __load_start_overlay_data4 Load$$overlay_data4$$Base 184 #define __load_stop_overlay_data4 Load$$overlay_data4$$Limit 185 #define __load_start_overlay_data5 Load$$overlay_data5$$Base 186 #define __load_stop_overlay_data5 Load$$overlay_data5$$Limit 187 #define __load_start_overlay_data6 Load$$overlay_data6$$Base 188 #define __load_stop_overlay_data6 Load$$overlay_data6$$Limit 189 #define __load_start_overlay_data7 Load$$overlay_data7$$Base 190 #define __load_stop_overlay_data7 Load$$overlay_data7$$Limit 191 192 #define __sram_text_data_start_flash__ Load$$sram_text$$Base 193 #define __sram_text_data_start__ Image$$sram_text$$Base 194 #define __sram_text_data_end_flash__ Load$$sram_data$$Limit 195 #define __sram_bss_start__ Image$$sram_bss$$Base 196 #define __sram_bss_end__ Image$$sram_bss$$ZI$$Limit 197 #define __etext Load$$data$$Base 198 #define __data_start__ Image$$data$$Base 199 #define __data_end__ Image$$data$$Limit 200 #define __bss_start__ Image$$bss$$Base 201 #define __bss_end__ Image$$bss$$ZI$$Limit 202 #define __HeapBase Image$$ARM_LIB_HEAP$$Base 203 #define __end__ __HeapBase 204 /* 205 #define end __HeapBase 206 */ 207 #define __HeapLimit Image$$ARM_LIB_HEAP$$ZI$$Limit 208 #define __StackTop Image$$ARM_LIB_STACK$$ZI$$Limit 209 #define __stack __StackTop 210 #define __StackLimit Image$$ARM_LIB_STACK$$Base 211 #define __flash_end Image$$code_start_addr$$Limit 212 #define __custom_parameter_start Image$$custom_parameter$$Base 213 #define __custom_parameter_end Image$$custom_parameter$$ZI$$Limit 214 #define __lhdc_license_start Image$$lhdc_license$$Base 215 #define __lhdc_license_end Image$$lhdc_license$$ZI$$Limit 216 #define __userdata_start Image$$userdata$$Base 217 #define __userdata_end Image$$userdata$$ZI$$Limit 218 #define __aud_start Image$$audio$$Base 219 #define __aud_end Image$$audio$$ZI$$Limit 220 #define __reserved_start Image$$reserved$$Base 221 #define __reserved_end Image$$reserved$$ZI$$Limit 222 #define __factory_start Image$$factory$$Base 223 #define __factory_end Image$$factory$$ZI$$Limit 224 225 #endif 226 227 #ifdef __cplusplus 228 } 229 #endif 230 231 #endif 232 233 #endif 234 235