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Searched defs:_bit (Results 1 – 25 of 74) sorted by relevance

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/kernel/linux/linux-5.10/drivers/reset/sti/
Dreset-stih407.c18 #define STIH407_PDN_0(_bit) \ argument
20 #define STIH407_PDN_1(_bit) \ argument
22 #define STIH407_PDN_ETH(_bit, _stat) \ argument
57 #define STIH407_SRST_CORE(_reg, _bit) \ argument
60 #define STIH407_SRST_SBC(_reg, _bit) \ argument
63 #define STIH407_SRST_LPM(_reg, _bit) \ argument
/kernel/linux/linux-4.19/drivers/reset/sti/
Dreset-stih407.c22 #define STIH407_PDN_0(_bit) \ argument
24 #define STIH407_PDN_1(_bit) \ argument
26 #define STIH407_PDN_ETH(_bit, _stat) \ argument
61 #define STIH407_SRST_CORE(_reg, _bit) \ argument
64 #define STIH407_SRST_SBC(_reg, _bit) \ argument
67 #define STIH407_SRST_LPM(_reg, _bit) \ argument
/kernel/linux/linux-5.10/drivers/clk/meson/
Dclk-regmap.h117 #define __MESON_PCLK(_name, _reg, _bit, _ops, _pname) \ argument
132 #define MESON_PCLK(_name, _reg, _bit, _pname) \ argument
135 #define MESON_PCLK_RO(_name, _reg, _bit, _pname) \ argument
Dgxbb-aoclk.c23 #define GXBB_AO_GATE(_name, _bit) \ argument
Daxg-aoclk.c34 #define AXG_AO_GATE(_name, _bit) \ argument
Dg12a-aoclk.c43 #define AXG_AO_GATE(_name, _reg, _bit) \ argument
/kernel/linux/linux-4.19/drivers/memory/tegra/
Dtegra30.c963 #define TEGRA30_MC_RESET(_name, _control, _status, _bit) \ argument
Dtegra210.c1083 #define TEGRA210_MC_RESET(_name, _control, _status, _bit) \ argument
Dtegra114.c941 #define TEGRA114_MC_RESET(_name, _control, _status, _bit) \ argument
Dtegra124.c1015 #define TEGRA124_MC_RESET(_name, _control, _status, _bit) \ argument
/kernel/linux/linux-5.10/drivers/memory/tegra/
Dtegra114.c940 #define TEGRA114_MC_RESET(_name, _control, _status, _bit) \ argument
Dtegra210.c1080 #define TEGRA210_MC_RESET(_name, _control, _status, _bit) \ argument
Dtegra30.c984 #define TEGRA30_MC_RESET(_name, _control, _status, _bit) \ argument
Dtegra124.c971 #define TEGRA124_MC_RESET(_name, _control, _status, _bit) \ argument
Dtegra20.c170 #define TEGRA20_MC_RESET(_name, _control, _status, _reset, _bit) \ argument
/kernel/linux/linux-4.19/drivers/clk/meson/
Daxg-aoclk.c19 #define AXG_AO_GATE(_name, _bit) \ argument
Dgxbb-aoclk.c12 #define GXBB_AO_GATE(_name, _bit) \ argument
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4a/
Dclock-sh7366.c108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
128 #define MSTP(_parent, _reg, _bit, _flags) \ argument
Dclock-sh7343.c105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
125 #define MSTP(_parent, _reg, _bit, _flags) \ argument
/kernel/linux/linux-4.19/arch/sh/kernel/cpu/sh4a/
Dclock-sh7366.c120 #define DIV4(_reg, _bit, _mask, _flags) \ argument
140 #define MSTP(_parent, _reg, _bit, _flags) \ argument
Dclock-sh7343.c117 #define DIV4(_reg, _bit, _mask, _flags) \ argument
137 #define MSTP(_parent, _reg, _bit, _flags) \ argument
/kernel/linux/linux-4.19/drivers/reset/
Dreset-uniphier.c37 #define UNIPHIER_RESET(_id, _reg, _bit) \ argument
44 #define UNIPHIER_RESETX(_id, _reg, _bit) \ argument
/kernel/linux/linux-5.10/drivers/reset/
Dreset-uniphier.c28 #define UNIPHIER_RESET(_id, _reg, _bit) \ argument
35 #define UNIPHIER_RESETX(_id, _reg, _bit) \ argument
/kernel/linux/linux-4.19/drivers/clk/mvebu/
Darmada-37xx-periph.c118 #define PERIPH_GATE(_name, _bit) \ argument
170 #define PERIPH_CLK_FULL_DD(_name, _bit, _shift, _reg1, _reg2, _shift1, _shift2)\ argument
175 #define PERIPH_CLK_FULL(_name, _bit, _shift, _reg, _shift1, _table) \ argument
180 #define PERIPH_CLK_GATE_DIV(_name, _bit, _reg, _shift, _table) \ argument
/kernel/linux/linux-5.10/drivers/clk/mvebu/
Darmada-37xx-periph.c129 #define PERIPH_GATE(_name, _bit) \ argument
181 #define PERIPH_CLK_FULL_DD(_name, _bit, _shift, _reg1, _reg2, _shift1, _shift2)\ argument
186 #define PERIPH_CLK_FULL(_name, _bit, _shift, _reg, _shift1, _table) \ argument
191 #define PERIPH_CLK_GATE_DIV(_name, _bit, _reg, _shift, _table) \ argument

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