1 /* 2 * Copyright (c) 2021 Bestechnic (Shanghai) Co., Ltd. All rights reserved. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 #ifndef __HAL_DSI_H__ 16 #define __HAL_DSI_H__ 17 18 #ifdef __cplusplus 19 extern "C" { 20 #endif 21 22 #include "stdint.h" 23 #include "stdbool.h" 24 25 struct HAL_DSI_CFG_T { 26 uint32_t active_width; 27 uint32_t active_height;//screen size 28 uint32_t h_front_porch; 29 uint32_t h_back_porch; 30 uint32_t v_front_porch; 31 uint32_t v_back_porch; 32 uint32_t total_width; 33 uint32_t total_height; 34 35 // pn video 36 uint32_t y_mem_pitch; 37 uint32_t uv_mem_pitch; 38 uint32_t c_mem_pitch; 39 uint32_t image_h_sa; 40 uint32_t image_v_sa; 41 uint32_t image_width; 42 uint32_t image_height; 43 uint32_t zm_image_width; 44 uint32_t zm_image_height; 45 46 // pn graphic 47 uint32_t g_mem_pitch; 48 uint32_t graphic_h_sa; 49 uint32_t graphic_v_sa; 50 uint32_t graphic_width; 51 uint32_t graphic_height; 52 uint32_t zm_graphic_width; 53 uint32_t zm_graphic_height; 54 55 // tv graphic 56 uint32_t g_tv_mem_pitch; 57 uint32_t tvg_h_sa; 58 uint32_t tvg_v_sa; 59 uint32_t tvg_width; 60 uint32_t tvg_height; 61 uint32_t zm_tvg_width; 62 uint32_t zm_tvg_height; 63 64 // pn cursor 65 uint32_t cursor_h_sa; 66 uint32_t cursor_v_sa; 67 uint32_t cursor_width; 68 uint32_t cursor_height; 69 int hwc_color1; 70 int hwc_color2; 71 72 //background 73 int blankcolor; 74 75 // pn viedo setting 76 int cos0; 77 int sin0; 78 int c_mult_s; 79 int saturation; 80 int brightness; 81 int contrast; 82 83 // pn keys 84 int cfg_alpha_y; 85 int cfg_ckey_y; 86 int cfg_ckey_y1; 87 int cfg_ckey_y2; 88 int cfg_alpha_u; 89 int cfg_ckey_u; 90 int cfg_ckey_u1; 91 int cfg_ckey_u2; 92 int cfg_alpha_v; 93 int cfg_ckey_v; 94 int cfg_ckey_v1; 95 int cfg_ckey_v2; 96 }; 97 98 enum DSI_MODE_T { 99 /** Video mode */ 100 DSI_MODE_VIDEO, 101 /** Command mode */ 102 DSI_MODE_CMD, 103 }; 104 105 typedef void (*HAL_DSI_XFER_COMPLETE_CALLBACK_T)(uint8_t layerId, uint8_t channel, uint32_t addr); 106 107 void hal_dsi_init(uint16_t h_res); 108 109 /** 110 * @param 111 * h_res horizontal resolution 112 * mode @see enum DSI_MODE_T 113 * dsi_bitclk Mbps 114 * dsi_pclk KHz 115 * @note 116 * Total-pixel = H-total * V-total * fps 117 * Bitclk = Total-pixel * bpp(bit) / lane-number 118 * Byteclk = Bitclk / 8 119 * dsi_clk = Byteclk * lane-number = Total-pixel * bpp(bit) / 8 120 * dsi_pclk = dsi_clk / bpp(byte) = H-total * V-total * fps 121 */ 122 void hal_dsi_init_v2(uint16_t h_res, enum DSI_MODE_T mode, uint32_t dsi_bitclk, uint32_t dsi_pclk); 123 124 void hal_dsi_start(void); 125 126 void hal_lcdc_init(const struct HAL_DSI_CFG_T *cfg, const uint8_t *layer0, 127 const uint8_t *layer1, const uint8_t *layer2); 128 129 void hal_lcdc_gamma_enable(const uint8_t * config_R, const uint8_t * config_G, const uint8_t * config_B); 130 131 void hal_lcdc_gamma_disable(void); 132 133 void hal_lcdc_start(void); 134 135 void hal_dsi_send_cmd(uint8_t cmd); 136 int hal_dsi_read_cmd(uint8_t cmd, uint8_t *read_buf, uint8_t len); 137 void hal_dsi_send_cmd_data(uint8_t cmd, uint32_t len, uint8_t p0, uint8_t p1, uint8_t p2, uint8_t p3); 138 void hal_dsi_send_long_array(uint32_t len,uint32_t *data); 139 void hal_dsi_send_cmd_list(unsigned cmd, unsigned char para_count, unsigned char *para_list); 140 141 void hal_lcdc_update_addr(uint8_t layerId, uint8_t channel, uint32_t addr); 142 void hal_lcdc_set_callback(HAL_DSI_XFER_COMPLETE_CALLBACK_T callback); 143 144 #ifdef __cplusplus 145 } 146 #endif 147 148 #endif 149 150