1 /*!
2 \file gd32vf103_usart.c
3 \brief USART driver
4
5 \version 2019-6-5, V1.0.0, firmware for GD32VF103
6 */
7
8 /*
9 Copyright (c) 2019, GigaDevice Semiconductor Inc.
10
11 Redistribution and use in source and binary forms, with or without modification,
12 are permitted provided that the following conditions are met:
13
14 1. Redistributions of source code must retain the above copyright notice, this
15 list of conditions and the following disclaimer.
16 2. Redistributions in binary form must reproduce the above copyright notice,
17 this list of conditions and the following disclaimer in the documentation
18 and/or other materials provided with the distribution.
19 3. Neither the name of the copyright holder nor the names of its contributors
20 may be used to endorse or promote products derived from this software without
21 specific prior written permission.
22
23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
29 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
32 OF SUCH DAMAGE.
33 */
34
35 #include "gd32vf103_usart.h"
36
37 /*!
38 \brief reset USART/UART
39 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
40 \param[out] none
41 \retval none
42 */
usart_deinit(uint32_t usart_periph)43 void usart_deinit(uint32_t usart_periph)
44 {
45 switch(usart_periph){
46 case USART0:
47 /* reset USART0 */
48 rcu_periph_reset_enable(RCU_USART0RST);
49 rcu_periph_reset_disable(RCU_USART0RST);
50 break;
51 case USART1:
52 /* reset USART1 */
53 rcu_periph_reset_enable(RCU_USART1RST);
54 rcu_periph_reset_disable(RCU_USART1RST);
55 break;
56 case USART2:
57 /* reset USART2 */
58 rcu_periph_reset_enable(RCU_USART2RST);
59 rcu_periph_reset_disable(RCU_USART2RST);
60 break;
61 case UART3:
62 /* reset UART3 */
63 rcu_periph_reset_enable(RCU_UART3RST);
64 rcu_periph_reset_disable(RCU_UART3RST);
65 break;
66 case UART4:
67 /* reset UART4 */
68 rcu_periph_reset_enable(RCU_UART4RST);
69 rcu_periph_reset_disable(RCU_UART4RST);
70 break;
71 default:
72 break;
73 }
74 }
75
76 /*!
77 \brief configure USART baud rate value
78 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
79 \param[in] baudval: baud rate value
80 \param[out] none
81 \retval none
82 */
usart_baudrate_set(uint32_t usart_periph,uint32_t baudval)83 void usart_baudrate_set(uint32_t usart_periph, uint32_t baudval)
84 {
85 uint32_t uclk=0U, intdiv=0U, fradiv=0U, udiv=0U;
86 switch(usart_periph){
87 /* get clock frequency */
88 case USART0:
89 /* get USART0 clock */
90 uclk=rcu_clock_freq_get(CK_APB2);
91 break;
92 case USART1:
93 /* get USART1 clock */
94 uclk=rcu_clock_freq_get(CK_APB1);
95 break;
96 case USART2:
97 /* get USART2 clock */
98 uclk=rcu_clock_freq_get(CK_APB1);
99 break;
100 case UART3:
101 /* get UART3 clock */
102 uclk=rcu_clock_freq_get(CK_APB1);
103 break;
104 case UART4:
105 /* get UART4 clock */
106 uclk=rcu_clock_freq_get(CK_APB1);
107 break;
108 default:
109 break;
110 }
111 /* oversampling by 16, configure the value of USART_BAUD */
112 udiv = (uclk+baudval/2U)/baudval;
113 intdiv = udiv & (0x0000fff0U);
114 fradiv = udiv & (0x0000000fU);
115 USART_BAUD(usart_periph) = ((USART_BAUD_FRADIV | USART_BAUD_INTDIV) & (intdiv | fradiv));
116 }
117
118 /*!
119 \brief configure USART parity
120 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
121 \param[in] paritycfg: configure USART parity
122 only one parameter can be selected which is shown as below:
123 \arg USART_PM_NONE: no parity
124 \arg USART_PM_ODD: odd parity
125 \arg USART_PM_EVEN: even parity
126 \param[out] none
127 \retval none
128 */
usart_parity_config(uint32_t usart_periph,uint32_t paritycfg)129 void usart_parity_config(uint32_t usart_periph, uint32_t paritycfg)
130 {
131 /* clear USART_CTL0 PM,PCEN bits */
132 USART_CTL0(usart_periph) &= ~(USART_CTL0_PM | USART_CTL0_PCEN);
133 /* configure USART parity mode */
134 USART_CTL0(usart_periph) |= paritycfg ;
135 }
136
137 /*!
138 \brief configure USART word length
139 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
140 \param[in] wlen: USART word length configure
141 only one parameter can be selected which is shown as below:
142 \arg USART_WL_8BIT: 8 bits
143 \arg USART_WL_9BIT: 9 bits
144 \param[out] none
145 \retval none
146 */
usart_word_length_set(uint32_t usart_periph,uint32_t wlen)147 void usart_word_length_set(uint32_t usart_periph, uint32_t wlen)
148 {
149 /* clear USART_CTL0 WL bit */
150 USART_CTL0(usart_periph) &= ~USART_CTL0_WL;
151 /* configure USART word length */
152 USART_CTL0(usart_periph) |= wlen;
153 }
154
155 /*!
156 \brief configure USART stop bit length
157 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
158 \param[in] stblen: USART stop bit configure
159 only one parameter can be selected which is shown as below:
160 \arg USART_STB_1BIT: 1 bit
161 \arg USART_STB_0_5BIT: 0.5 bit, not available for UARTx(x=3,4)
162 \arg USART_STB_2BIT: 2 bits
163 \arg USART_STB_1_5BIT: 1.5 bits, not available for UARTx(x=3,4)
164 \param[out] none
165 \retval none
166 */
usart_stop_bit_set(uint32_t usart_periph,uint32_t stblen)167 void usart_stop_bit_set(uint32_t usart_periph, uint32_t stblen)
168 {
169 /* clear USART_CTL1 STB bits */
170 USART_CTL1(usart_periph) &= ~USART_CTL1_STB;
171 /* configure USART stop bits */
172 USART_CTL1(usart_periph) |= stblen;
173 }
174
175 /*!
176 \brief enable USART
177 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
178 \param[out] none
179 \retval none
180 */
usart_enable(uint32_t usart_periph)181 void usart_enable(uint32_t usart_periph)
182 {
183 USART_CTL0(usart_periph) |= USART_CTL0_UEN;
184 }
185
186 /*!
187 \brief disable USART
188 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
189 \param[out] none
190 \retval none
191 */
usart_disable(uint32_t usart_periph)192 void usart_disable(uint32_t usart_periph)
193 {
194 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
195 }
196
197 /*!
198 \brief configure USART transmitter
199 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
200 \param[in] txconfig: enable or disable USART transmitter
201 only one parameter can be selected which is shown as below:
202 \arg USART_TRANSMIT_ENABLE: enable USART transmission
203 \arg USART_TRANSMIT_DISABLE: disable USART transmission
204 \param[out] none
205 \retval none
206 */
usart_transmit_config(uint32_t usart_periph,uint32_t txconfig)207 void usart_transmit_config(uint32_t usart_periph, uint32_t txconfig)
208 {
209 uint32_t ctl = 0U;
210
211 ctl = USART_CTL0(usart_periph);
212 ctl &= ~USART_CTL0_TEN;
213 ctl |= txconfig;
214 /* configure transfer mode */
215 USART_CTL0(usart_periph) = ctl;
216 }
217
218 /*!
219 \brief configure USART receiver
220 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
221 \param[in] rxconfig: enable or disable USART receiver
222 only one parameter can be selected which is shown as below:
223 \arg USART_RECEIVE_ENABLE: enable USART reception
224 \arg USART_RECEIVE_DISABLE: disable USART reception
225 \param[out] none
226 \retval none
227 */
usart_receive_config(uint32_t usart_periph,uint32_t rxconfig)228 void usart_receive_config(uint32_t usart_periph, uint32_t rxconfig)
229 {
230 uint32_t ctl = 0U;
231
232 ctl = USART_CTL0(usart_periph);
233 ctl &= ~USART_CTL0_REN;
234 ctl |= rxconfig;
235 /* configure receiver mode */
236 USART_CTL0(usart_periph) = ctl;
237 }
238
239 /*!
240 \brief USART transmit data function
241 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
242 \param[in] data: data of transmission
243 \param[out] none
244 \retval none
245 */
usart_data_transmit(uint32_t usart_periph,uint32_t data)246 void usart_data_transmit(uint32_t usart_periph, uint32_t data)
247 {
248 USART_DATA(usart_periph) = USART_DATA_DATA & data;
249 }
250
251 /*!
252 \brief USART receive data function
253 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
254 \param[out] none
255 \retval data of received
256 */
usart_data_receive(uint32_t usart_periph)257 uint16_t usart_data_receive(uint32_t usart_periph)
258 {
259 return (uint16_t)(GET_BITS(USART_DATA(usart_periph), 0U, 8U));
260 }
261
262 /*!
263 \brief configure the address of the USART in wake up by address match mode
264 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
265 \param[in] addr: address of USART/UART
266 \param[out] none
267 \retval none
268 */
usart_address_config(uint32_t usart_periph,uint8_t addr)269 void usart_address_config(uint32_t usart_periph, uint8_t addr)
270 {
271 USART_CTL1(usart_periph) &= ~(USART_CTL1_ADDR);
272 USART_CTL1(usart_periph) |= (USART_CTL1_ADDR & addr);
273 }
274
275 /*!
276 \brief receiver in mute mode
277 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
278 \param[out] none
279 \retval none
280 */
usart_mute_mode_enable(uint32_t usart_periph)281 void usart_mute_mode_enable(uint32_t usart_periph)
282 {
283 USART_CTL0(usart_periph) |= USART_CTL0_RWU;
284 }
285
286 /*!
287 \brief receiver in active mode
288 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
289 \param[out] none
290 \retval none
291 */
usart_mute_mode_disable(uint32_t usart_periph)292 void usart_mute_mode_disable(uint32_t usart_periph)
293 {
294 USART_CTL0(usart_periph) &= ~(USART_CTL0_RWU);
295 }
296
297 /*!
298 \brief configure wakeup method in mute mode
299 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
300 \param[in] wmethod: two methods be used to enter or exit the mute mode
301 only one parameter can be selected which is shown as below:
302 \arg USART_WM_IDLE: idle line
303 \arg USART_WM_ADDR: address mask
304 \param[out] none
305 \retval none
306 */
usart_mute_mode_wakeup_config(uint32_t usart_periph,uint32_t wmethod)307 void usart_mute_mode_wakeup_config(uint32_t usart_periph, uint32_t wmethod)
308 {
309 USART_CTL0(usart_periph) &= ~(USART_CTL0_WM);
310 USART_CTL0(usart_periph) |= wmethod;
311 }
312
313 /*!
314 \brief enable LIN mode
315 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
316 \param[out] none
317 \retval none
318 */
usart_lin_mode_enable(uint32_t usart_periph)319 void usart_lin_mode_enable(uint32_t usart_periph)
320 {
321 USART_CTL1(usart_periph) |= USART_CTL1_LMEN;
322 }
323
324 /*!
325 \brief disable LIN mode
326 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
327 \param[out] none
328 \retval none
329 */
usart_lin_mode_disable(uint32_t usart_periph)330 void usart_lin_mode_disable(uint32_t usart_periph)
331 {
332 USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN);
333 }
334
335 /*!
336 \brief configure lin break frame length
337 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
338 \param[in] lblen: lin break frame length
339 only one parameter can be selected which is shown as below:
340 \arg USART_LBLEN_10B: 10 bits
341 \arg USART_LBLEN_11B: 11 bits
342 \param[out] none
343 \retval none
344 */
usart_lin_break_detection_length_config(uint32_t usart_periph,uint32_t lblen)345 void usart_lin_break_detection_length_config(uint32_t usart_periph, uint32_t lblen)
346 {
347 USART_CTL1(usart_periph) &= ~(USART_CTL1_LBLEN);
348 USART_CTL1(usart_periph) |= (USART_CTL1_LBLEN & lblen);
349 }
350
351 /*!
352 \brief send break frame
353 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
354 \param[out] none
355 \retval none
356 */
usart_send_break(uint32_t usart_periph)357 void usart_send_break(uint32_t usart_periph)
358 {
359 USART_CTL0(usart_periph) |= USART_CTL0_SBKCMD;
360 }
361
362 /*!
363 \brief enable half duplex mode
364 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
365 \param[out] none
366 \retval none
367 */
usart_halfduplex_enable(uint32_t usart_periph)368 void usart_halfduplex_enable(uint32_t usart_periph)
369 {
370 USART_CTL2(usart_periph) |= USART_CTL2_HDEN;
371 }
372
373 /*!
374 \brief disable half duplex mode
375 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
376 \param[out] none
377 \retval none
378 */
usart_halfduplex_disable(uint32_t usart_periph)379 void usart_halfduplex_disable(uint32_t usart_periph)
380 {
381 USART_CTL2(usart_periph) &= ~(USART_CTL2_HDEN);
382 }
383
384 /*!
385 \brief enable CK pin in synchronous mode
386 \param[in] usart_periph: USARTx(x=0,1,2)
387 \param[out] none
388 \retval none
389 */
usart_synchronous_clock_enable(uint32_t usart_periph)390 void usart_synchronous_clock_enable(uint32_t usart_periph)
391 {
392 USART_CTL1(usart_periph) |= USART_CTL1_CKEN;
393 }
394
395 /*!
396 \brief disable CK pin in synchronous mode
397 \param[in] usart_periph: USARTx(x=0,1,2)
398 \param[out] none
399 \retval none
400 */
usart_synchronous_clock_disable(uint32_t usart_periph)401 void usart_synchronous_clock_disable(uint32_t usart_periph)
402 {
403 USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN);
404 }
405
406 /*!
407 \brief configure USART synchronous mode parameters
408 \param[in] usart_periph: USARTx(x=0,1,2)
409 \param[in] clen: CK length
410 only one parameter can be selected which is shown as below:
411 \arg USART_CLEN_NONE: there are 7 CK pulses for an 8 bit frame and 8 CK pulses for a 9 bit frame
412 \arg USART_CLEN_EN: there are 8 CK pulses for an 8 bit frame and 9 CK pulses for a 9 bit frame
413 \param[in] cph: clock phase
414 only one parameter can be selected which is shown as below:
415 \arg USART_CPH_1CK: first clock transition is the first data capture edge
416 \arg USART_CPH_2CK: second clock transition is the first data capture edge
417 \param[in] cpl: clock polarity
418 only one parameter can be selected which is shown as below:
419 \arg USART_CPL_LOW: steady low value on CK pin
420 \arg USART_CPL_HIGH: steady high value on CK pin
421 \param[out] none
422 \retval none
423 */
usart_synchronous_clock_config(uint32_t usart_periph,uint32_t clen,uint32_t cph,uint32_t cpl)424 void usart_synchronous_clock_config(uint32_t usart_periph, uint32_t clen, uint32_t cph, uint32_t cpl)
425 {
426 uint32_t ctl = 0U;
427
428 /* read USART_CTL1 register */
429 ctl = USART_CTL1(usart_periph);
430 ctl &= ~(USART_CTL1_CLEN | USART_CTL1_CPH | USART_CTL1_CPL);
431 /* set CK length, CK phase, CK polarity */
432 ctl |= (USART_CTL1_CLEN & clen) | (USART_CTL1_CPH & cph) | (USART_CTL1_CPL & cpl);
433
434 USART_CTL1(usart_periph) = ctl;
435 }
436
437 /*!
438 \brief configure guard time value in smartcard mode
439 \param[in] usart_periph: USARTx(x=0,1,2)
440 \param[in] gaut: guard time value
441 \param[out] none
442 \retval none
443 */
usart_guard_time_config(uint32_t usart_periph,uint32_t gaut)444 void usart_guard_time_config(uint32_t usart_periph,uint32_t gaut)
445 {
446 USART_GP(usart_periph) &= ~(USART_GP_GUAT);
447 USART_GP(usart_periph) |= (USART_GP_GUAT & ((gaut)<<8));
448 }
449
450 /*!
451 \brief enable smartcard mode
452 \param[in] usart_periph: USARTx(x=0,1,2)
453 \param[out] none
454 \retval none
455 */
usart_smartcard_mode_enable(uint32_t usart_periph)456 void usart_smartcard_mode_enable(uint32_t usart_periph)
457 {
458 USART_CTL2(usart_periph) |= USART_CTL2_SCEN;
459 }
460
461 /*!
462 \brief disable smartcard mode
463 \param[in] usart_periph: USARTx(x=0,1,2)
464 \param[out] none
465 \retval none
466 */
usart_smartcard_mode_disable(uint32_t usart_periph)467 void usart_smartcard_mode_disable(uint32_t usart_periph)
468 {
469 USART_CTL2(usart_periph) &= ~(USART_CTL2_SCEN);
470 }
471
472 /*!
473 \brief enable NACK in smartcard mode
474 \param[in] usart_periph: USARTx(x=0,1,2)
475 \param[out] none
476 \retval none
477 */
usart_smartcard_mode_nack_enable(uint32_t usart_periph)478 void usart_smartcard_mode_nack_enable(uint32_t usart_periph)
479 {
480 USART_CTL2(usart_periph) |= USART_CTL2_NKEN;
481 }
482
483 /*!
484 \brief disable NACK in smartcard mode
485 \param[in] usart_periph: USARTx(x=0,1,2)
486 \param[out] none
487 \retval none
488 */
usart_smartcard_mode_nack_disable(uint32_t usart_periph)489 void usart_smartcard_mode_nack_disable(uint32_t usart_periph)
490 {
491 USART_CTL2(usart_periph) &= ~(USART_CTL2_NKEN);
492 }
493
494 /*!
495 \brief enable IrDA mode
496 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
497 \param[out] none
498 \retval none
499 */
usart_irda_mode_enable(uint32_t usart_periph)500 void usart_irda_mode_enable(uint32_t usart_periph)
501 {
502 USART_CTL2(usart_periph) |= USART_CTL2_IREN;
503 }
504
505 /*!
506 \brief disable IrDA mode
507 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
508 \param[out] none
509 \retval none
510 */
usart_irda_mode_disable(uint32_t usart_periph)511 void usart_irda_mode_disable(uint32_t usart_periph)
512 {
513 USART_CTL2(usart_periph) &= ~(USART_CTL2_IREN);
514 }
515
516 /*!
517 \brief configure the peripheral clock prescaler in USART IrDA low-power mode
518 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
519 \param[in] psc: 0x00-0xFF
520 \param[out] none
521 \retval none
522 */
usart_prescaler_config(uint32_t usart_periph,uint8_t psc)523 void usart_prescaler_config(uint32_t usart_periph, uint8_t psc)
524 {
525 USART_GP(usart_periph) &= ~(USART_GP_PSC);
526 USART_GP(usart_periph) |= psc;
527 }
528
529 /*!
530 \brief configure IrDA low-power
531 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
532 \param[in] irlp: IrDA low-power or normal
533 only one parameter can be selected which is shown as below:
534 \arg USART_IRLP_LOW: low-power
535 \arg USART_IRLP_NORMAL: normal
536 \param[out] none
537 \retval none
538 */
usart_irda_lowpower_config(uint32_t usart_periph,uint32_t irlp)539 void usart_irda_lowpower_config(uint32_t usart_periph, uint32_t irlp)
540 {
541 USART_CTL2(usart_periph) &= ~(USART_CTL2_IRLP);
542 USART_CTL2(usart_periph) |= (USART_CTL2_IRLP & irlp);
543 }
544
545 /*!
546 \brief configure hardware flow control RTS
547 \param[in] usart_periph: USARTx(x=0,1,2)
548 \param[in] rtsconfig: enable or disable RTS
549 only one parameter can be selected which is shown as below:
550 \arg USART_RTS_ENABLE: enable RTS
551 \arg USART_RTS_DISABLE: disable RTS
552 \param[out] none
553 \retval none
554 */
usart_hardware_flow_rts_config(uint32_t usart_periph,uint32_t rtsconfig)555 void usart_hardware_flow_rts_config(uint32_t usart_periph, uint32_t rtsconfig)
556 {
557 uint32_t ctl = 0U;
558
559 ctl = USART_CTL2(usart_periph);
560 ctl &= ~USART_CTL2_RTSEN;
561 ctl |= rtsconfig;
562 /* configure RTS */
563 USART_CTL2(usart_periph) = ctl;
564 }
565
566 /*!
567 \brief configure hardware flow control CTS
568 \param[in] usart_periph: USARTx(x=0,1,2)
569 \param[in] ctsconfig: enable or disable CTS
570 only one parameter can be selected which is shown as below:
571 \arg USART_CTS_ENABLE: enable CTS
572 \arg USART_CTS_DISABLE: disable CTS
573 \param[out] none
574 \retval none
575 */
usart_hardware_flow_cts_config(uint32_t usart_periph,uint32_t ctsconfig)576 void usart_hardware_flow_cts_config(uint32_t usart_periph, uint32_t ctsconfig)
577 {
578 uint32_t ctl = 0U;
579
580 ctl = USART_CTL2(usart_periph);
581 ctl &= ~USART_CTL2_CTSEN;
582 ctl |= ctsconfig;
583 /* configure CTS */
584 USART_CTL2(usart_periph) = ctl;
585 }
586
587 /*!
588 \brief configure USART DMA reception
589 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3)
590 \param[in] dmacmd: enable or disable DMA for reception
591 only one parameter can be selected which is shown as below:
592 \arg USART_DENR_ENABLE: DMA enable for reception
593 \arg USART_DENR_DISABLE: DMA disable for reception
594 \param[out] none
595 \retval none
596 */
usart_dma_receive_config(uint32_t usart_periph,uint32_t dmacmd)597 void usart_dma_receive_config(uint32_t usart_periph, uint32_t dmacmd)
598 {
599 uint32_t ctl = 0U;
600
601 ctl = USART_CTL2(usart_periph);
602 ctl &= ~USART_CTL2_DENR;
603 ctl |= dmacmd;
604 /* configure DMA reception */
605 USART_CTL2(usart_periph) = ctl;
606 }
607
608 /*!
609 \brief configure USART DMA transmission
610 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3)
611 \param[in] dmacmd: enable or disable DMA for transmission
612 only one parameter can be selected which is shown as below:
613 \arg USART_DENT_ENABLE: DMA enable for transmission
614 \arg USART_DENT_DISABLE: DMA disable for transmission
615 \param[out] none
616 \retval none
617 */
usart_dma_transmit_config(uint32_t usart_periph,uint32_t dmacmd)618 void usart_dma_transmit_config(uint32_t usart_periph, uint32_t dmacmd)
619 {
620 uint32_t ctl = 0U;
621
622 ctl = USART_CTL2(usart_periph);
623 ctl &= ~USART_CTL2_DENT;
624 ctl |= dmacmd;
625 /* configure DMA transmission */
626 USART_CTL2(usart_periph) = ctl;
627 }
628
629 /*!
630 \brief get flag in STAT register
631 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
632 \param[in] flag: USART flags, refer to usart_flag_enum
633 only one parameter can be selected which is shown as below:
634 \arg USART_FLAG_CTSF: CTS change flag
635 \arg USART_FLAG_LBDF: LIN break detected flag
636 \arg USART_FLAG_TBE: transmit data buffer empty
637 \arg USART_FLAG_TC: transmission complete
638 \arg USART_FLAG_RBNE: read data buffer not empty
639 \arg USART_FLAG_IDLEF: IDLE frame detected flag
640 \arg USART_FLAG_ORERR: overrun error
641 \arg USART_FLAG_NERR: noise error flag
642 \arg USART_FLAG_FERR: frame error flag
643 \arg USART_FLAG_PERR: parity error flag
644 \param[out] none
645 \retval FlagStatus: SET or RESET
646 */
usart_flag_get(uint32_t usart_periph,usart_flag_enum flag)647 FlagStatus usart_flag_get(uint32_t usart_periph, usart_flag_enum flag)
648 {
649 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){
650 return SET;
651 }else{
652 return RESET;
653 }
654 }
655
656 /*!
657 \brief clear flag in STAT register
658 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
659 \param[in] flag: USART flags, refer to usart_flag_enum
660 only one parameter can be selected which is shown as below:
661 \arg USART_FLAG_CTSF: CTS change flag
662 \arg USART_FLAG_LBDF: LIN break detected flag
663 \arg USART_FLAG_TC: transmission complete
664 \arg USART_FLAG_RBNE: read data buffer not empty
665 \param[out] none
666 \retval none
667 */
usart_flag_clear(uint32_t usart_periph,usart_flag_enum flag)668 void usart_flag_clear(uint32_t usart_periph, usart_flag_enum flag)
669 {
670 USART_REG_VAL(usart_periph, flag) &= ~BIT(USART_BIT_POS(flag));
671 }
672
673 /*!
674 \brief enable USART interrupt
675 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
676 \param[in] int_flag
677 only one parameter can be selected which is shown as below:
678 \arg USART_INT_PERR: parity error interrupt
679 \arg USART_INT_TBE: transmitter buffer empty interrupt
680 \arg USART_INT_TC: transmission complete interrupt
681 \arg USART_INT_RBNE: read data buffer not empty interrupt and overrun error interrupt
682 \arg USART_INT_IDLE: IDLE line detected interrupt
683 \arg USART_INT_LBD: LIN break detected interrupt
684 \arg USART_INT_ERR: error interrupt
685 \arg USART_INT_CTS: CTS interrupt
686 \param[out] none
687 \retval none
688 */
usart_interrupt_enable(uint32_t usart_periph,uint32_t int_flag)689 void usart_interrupt_enable(uint32_t usart_periph, uint32_t int_flag)
690 {
691 USART_REG_VAL(usart_periph, int_flag) |= BIT(USART_BIT_POS(int_flag));
692 }
693
694 /*!
695 \brief disable USART interrupt
696 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
697 \param[in] int_flag
698 only one parameter can be selected which is shown as below:
699 \arg USART_INT_PERR: parity error interrupt
700 \arg USART_INT_TBE: transmitter buffer empty interrupt
701 \arg USART_INT_TC: transmission complete interrupt
702 \arg USART_INT_RBNE: read data buffer not empty interrupt and overrun error interrupt
703 \arg USART_INT_IDLE: IDLE line detected interrupt
704 \arg USART_INT_LBD: LIN break detected interrupt
705 \arg USART_INT_ERR: error interrupt
706 \arg USART_INT_CTS: CTS interrupt
707 \param[out] none
708 \retval none
709 */
usart_interrupt_disable(uint32_t usart_periph,uint32_t int_flag)710 void usart_interrupt_disable(uint32_t usart_periph, uint32_t int_flag)
711 {
712 USART_REG_VAL(usart_periph, int_flag) &= ~BIT(USART_BIT_POS(int_flag));
713 }
714
715 /*!
716 \brief get USART interrupt and flag status
717 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
718 \param[in] int_flag
719 only one parameter can be selected which is shown as below:
720 \arg USART_INT_FLAG_PERR: parity error interrupt and flag
721 \arg USART_INT_FLAG_TBE: transmitter buffer empty interrupt and flag
722 \arg USART_INT_FLAG_TC: transmission complete interrupt and flag
723 \arg USART_INT_FLAG_RBNE: read data buffer not empty interrupt and flag
724 \arg USART_INT_FLAG_RBNE_ORERR: read data buffer not empty interrupt and overrun error flag
725 \arg USART_INT_FLAG_IDLE: IDLE line detected interrupt and flag
726 \arg USART_INT_FLAG_LBD: LIN break detected interrupt and flag
727 \arg USART_INT_FLAG_CTS: CTS interrupt and flag
728 \arg USART_INT_FLAG_ERR_ORERR: error interrupt and overrun error
729 \arg USART_INT_FLAG_ERR_NERR: error interrupt and noise error flag
730 \arg USART_INT_FLAG_ERR_FERR: error interrupt and frame error flag
731 \param[out] none
732 \retval FlagStatus: SET or RESET
733 */
usart_interrupt_flag_get(uint32_t usart_periph,uint32_t int_flag)734 FlagStatus usart_interrupt_flag_get(uint32_t usart_periph, uint32_t int_flag)
735 {
736 uint32_t intenable = 0U, flagstatus = 0U;
737 /* get the interrupt enable bit status */
738 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag)));
739 /* get the corresponding flag bit status */
740 flagstatus = (USART_REG_VAL2(usart_periph, int_flag) & BIT(USART_BIT_POS2(int_flag)));
741
742 if(flagstatus && intenable){
743 return SET;
744 }else{
745 return RESET;
746 }
747 }
748
749 /*!
750 \brief clear USART interrupt flag in STAT register
751 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
752 \param[in] flag: USART interrupt flag
753 only one parameter can be selected which is shown as below:
754 \arg USART_INT_FLAG_CTS: CTS change flag
755 \arg USART_INT_FLAG_LBD: LIN break detected flag
756 \arg USART_INT_FLAG_TC: transmission complete
757 \arg USART_INT_FLAG_RBNE: read data buffer not empty
758 \param[out] none
759 \retval none
760 */
usart_interrupt_flag_clear(uint32_t usart_periph,uint32_t flag)761 void usart_interrupt_flag_clear(uint32_t usart_periph, uint32_t flag)
762 {
763 USART_REG_VAL2(usart_periph, flag) &= ~BIT(USART_BIT_POS2(flag));
764 }
765
usart_write(uint32_t usart_periph,int ch)766 int usart_write(uint32_t usart_periph,int ch)
767 {
768 usart_data_transmit(usart_periph, (uint8_t) ch );
769 while (usart_flag_get(usart_periph, USART_FLAG_TBE)== RESET){
770 }
771
772 return ch;
773 }
774
775
usart_read(uint32_t usart_periph)776 uint8_t usart_read(uint32_t usart_periph)
777 {
778 /* loop until RBNE = 1 */
779 while (usart_flag_get(usart_periph, USART_FLAG_RBNE) == RESET);
780 return(usart_data_receive(usart_periph));
781 }
782